Our device have 2 different I/O regions:
- a 16550 UART mapped for 32-bit accesses
- 13 extra registers
Instead of mapping each region on the main bus, introduce
a container, map the 2 devices regions on the container,
and map the container on the main bus.
Before:
(qemu) info mtree
...
0000000020100000-000000002010001f (prio 0, i/o): serial
0000000020100020-000000002010101f (prio 0, i/o): mchp.pfsoc.mmuart
0000000020102000-000000002010201f (prio 0, i/o): serial
0000000020102020-000000002010301f (prio 0, i/o): mchp.pfsoc.mmuart
0000000020104000-000000002010401f (prio 0, i/o): serial
0000000020104020-000000002010501f (prio 0, i/o): mchp.pfsoc.mmuart
0000000020106000-000000002010601f (prio 0, i/o): serial
0000000020106020-000000002010701f (prio 0, i/o): mchp.pfsoc.mmuart
After:
(qemu) info mtree
...
0000000020100000-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart
0000000020100000-000000002010001f (prio 0, i/o): serial
0000000020100020-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
0000000020102000-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart
0000000020102000-000000002010201f (prio 0, i/o): serial
0000000020102020-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
0000000020104000-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart
0000000020104000-000000002010401f (prio 0, i/o): serial
0000000020104020-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
0000000020106000-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart
0000000020106000-000000002010601f (prio 0, i/o): serial
0000000020106020-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/char/mchp_pfsoc_mmuart.h | 1 +
hw/char/mchp_pfsoc_mmuart.c | 11 ++++++++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/include/hw/char/mchp_pfsoc_mmuart.h b/include/hw/char/mchp_pfsoc_mmuart.h
index 9c012e6c977..864ac1a36b5 100644
--- a/include/hw/char/mchp_pfsoc_mmuart.h
+++ b/include/hw/char/mchp_pfsoc_mmuart.h
@@ -33,6 +33,7 @@
#define MCHP_PFSOC_MMUART_REG_COUNT 13
typedef struct MchpPfSoCMMUartState {
+ MemoryRegion container;
MemoryRegion iomem;
hwaddr base;
qemu_irq irq;
diff --git a/hw/char/mchp_pfsoc_mmuart.c b/hw/char/mchp_pfsoc_mmuart.c
index 584e7fec17c..ea586559761 100644
--- a/hw/char/mchp_pfsoc_mmuart.c
+++ b/hw/char/mchp_pfsoc_mmuart.c
@@ -25,6 +25,8 @@
#include "chardev/char.h"
#include "hw/char/mchp_pfsoc_mmuart.h"
+#define REGS_OFFSET 0x20
+
static uint64_t mchp_pfsoc_mmuart_read(void *opaque, hwaddr addr, unsigned size)
{
MchpPfSoCMMUartState *s = opaque;
@@ -72,16 +74,19 @@ MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem,
s = g_new0(MchpPfSoCMMUartState, 1);
+ memory_region_init(&s->container, NULL, "mchp.pfsoc.mmuart", 0x1000);
+
memory_region_init_io(&s->iomem, NULL, &mchp_pfsoc_mmuart_ops, s,
- "mchp.pfsoc.mmuart", 0x1000);
+ "mchp.pfsoc.mmuart.regs", 0x1000 - REGS_OFFSET);
+ memory_region_add_subregion(&s->container, REGS_OFFSET, &s->iomem);
s->base = base;
s->irq = irq;
- s->serial = serial_mm_init(sysmem, base, 2, irq, 399193, chr,
+ s->serial = serial_mm_init(&s->container, 0, 2, irq, 399193, chr,
DEVICE_LITTLE_ENDIAN);
- memory_region_add_subregion(sysmem, base + 0x20, &s->iomem);
+ memory_region_add_subregion(sysmem, base, &s->container);
return s;
}
--
2.31.1
On Sat, Sep 25, 2021 at 9:37 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > Our device have 2 different I/O regions: > - a 16550 UART mapped for 32-bit accesses > - 13 extra registers > > Instead of mapping each region on the main bus, introduce > a container, map the 2 devices regions on the container, > and map the container on the main bus. > > Before: > > (qemu) info mtree > ... > 0000000020100000-000000002010001f (prio 0, i/o): serial > 0000000020100020-000000002010101f (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020102000-000000002010201f (prio 0, i/o): serial > 0000000020102020-000000002010301f (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020104000-000000002010401f (prio 0, i/o): serial > 0000000020104020-000000002010501f (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020106000-000000002010601f (prio 0, i/o): serial > 0000000020106020-000000002010701f (prio 0, i/o): mchp.pfsoc.mmuart > > After: > > (qemu) info mtree > ... > 0000000020100000-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020100000-000000002010001f (prio 0, i/o): serial > 0000000020100020-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > 0000000020102000-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020102000-000000002010201f (prio 0, i/o): serial > 0000000020102020-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > 0000000020104000-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020104000-000000002010401f (prio 0, i/o): serial > 0000000020104020-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > 0000000020106000-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020106000-000000002010601f (prio 0, i/o): serial > 0000000020106020-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > include/hw/char/mchp_pfsoc_mmuart.h | 1 + > hw/char/mchp_pfsoc_mmuart.c | 11 ++++++++--- > 2 files changed, 9 insertions(+), 3 deletions(-) > Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
On Sat, Sep 25, 2021 at 11:34 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Our device have 2 different I/O regions:
> - a 16550 UART mapped for 32-bit accesses
> - 13 extra registers
>
> Instead of mapping each region on the main bus, introduce
> a container, map the 2 devices regions on the container,
> and map the container on the main bus.
>
> Before:
>
> (qemu) info mtree
> ...
> 0000000020100000-000000002010001f (prio 0, i/o): serial
> 0000000020100020-000000002010101f (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020102000-000000002010201f (prio 0, i/o): serial
> 0000000020102020-000000002010301f (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020104000-000000002010401f (prio 0, i/o): serial
> 0000000020104020-000000002010501f (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020106000-000000002010601f (prio 0, i/o): serial
> 0000000020106020-000000002010701f (prio 0, i/o): mchp.pfsoc.mmuart
>
> After:
>
> (qemu) info mtree
> ...
> 0000000020100000-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020100000-000000002010001f (prio 0, i/o): serial
> 0000000020100020-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
> 0000000020102000-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020102000-000000002010201f (prio 0, i/o): serial
> 0000000020102020-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
> 0000000020104000-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020104000-000000002010401f (prio 0, i/o): serial
> 0000000020104020-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
> 0000000020106000-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart
> 0000000020106000-000000002010601f (prio 0, i/o): serial
> 0000000020106020-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart.regs
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/char/mchp_pfsoc_mmuart.h | 1 +
> hw/char/mchp_pfsoc_mmuart.c | 11 ++++++++---
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/char/mchp_pfsoc_mmuart.h b/include/hw/char/mchp_pfsoc_mmuart.h
> index 9c012e6c977..864ac1a36b5 100644
> --- a/include/hw/char/mchp_pfsoc_mmuart.h
> +++ b/include/hw/char/mchp_pfsoc_mmuart.h
> @@ -33,6 +33,7 @@
> #define MCHP_PFSOC_MMUART_REG_COUNT 13
>
> typedef struct MchpPfSoCMMUartState {
> + MemoryRegion container;
> MemoryRegion iomem;
> hwaddr base;
> qemu_irq irq;
> diff --git a/hw/char/mchp_pfsoc_mmuart.c b/hw/char/mchp_pfsoc_mmuart.c
> index 584e7fec17c..ea586559761 100644
> --- a/hw/char/mchp_pfsoc_mmuart.c
> +++ b/hw/char/mchp_pfsoc_mmuart.c
> @@ -25,6 +25,8 @@
> #include "chardev/char.h"
> #include "hw/char/mchp_pfsoc_mmuart.h"
>
> +#define REGS_OFFSET 0x20
> +
> static uint64_t mchp_pfsoc_mmuart_read(void *opaque, hwaddr addr, unsigned size)
> {
> MchpPfSoCMMUartState *s = opaque;
> @@ -72,16 +74,19 @@ MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem,
>
> s = g_new0(MchpPfSoCMMUartState, 1);
>
> + memory_region_init(&s->container, NULL, "mchp.pfsoc.mmuart", 0x1000);
> +
> memory_region_init_io(&s->iomem, NULL, &mchp_pfsoc_mmuart_ops, s,
> - "mchp.pfsoc.mmuart", 0x1000);
> + "mchp.pfsoc.mmuart.regs", 0x1000 - REGS_OFFSET);
> + memory_region_add_subregion(&s->container, REGS_OFFSET, &s->iomem);
>
> s->base = base;
> s->irq = irq;
>
> - s->serial = serial_mm_init(sysmem, base, 2, irq, 399193, chr,
> + s->serial = serial_mm_init(&s->container, 0, 2, irq, 399193, chr,
> DEVICE_LITTLE_ENDIAN);
>
> - memory_region_add_subregion(sysmem, base + 0x20, &s->iomem);
> + memory_region_add_subregion(sysmem, base, &s->container);
>
> return s;
> }
> --
> 2.31.1
>
© 2016 - 2026 Red Hat, Inc.