Based-on: 20210918184527.408540-1-richard.henderson@linaro.org
("linux-user: Streamline handling of SIGSEGV")

which is in turn based on at least 3 other patch sets, so:

  https://gitlab.com/rth7680/qemu/-/commits/tcg-siginfo

Changes since v2:
  * Rebase on top of sigsegv cleanup, which eliminates about
    half of the places that needed updating to force_sig_fault.
  * target/mips cleanups+fixes for EXCP_BREAK and EXCP_TRAP.


r~


Peter Maydell (2):
  linux-user/arm: Use force_sig_fault()
  linux-user/aarch64: Use force_sig_fault()

Richard Henderson (23):
  linux-user/alpha: Set TRAP_UNK for bugchk and unknown gentrap
  linux-user/alpha: Set FPE_FLTUNK for gentrap ROPRAND
  linux-user/alpha: Use force_sig_fault
  linux-user/cris: Use force_sig_fault
  linux-user/hppa: Use force_sig_fault
  linux-user/hppa: Use the proper si_code for PRIV_OPR, PRIV_REG,
    OVERFLOW
  linux-user/hppa: Set FPE_CONDTRAP for COND
  linux-user/i386: Split out maybe_handle_vm86_trap
  linux-user/i386: Use force_sig, force_sig_fault
  linux-user/m68k: Use force_sig_fault
  linux-user/microblaze: Use force_sig_fault
  linux-user/microblaze: Fix SIGFPE si_codes
  linux-user/mips: Improve do_break
  linux-user/mips: Use force_sig_fault
  target/mips: Extract break code into env->error_code
  target/mips: Extract trap code into env->error_code
  linux-user/openrisc: Use force_sig_fault
  linux-user/ppc: Use force_sig_fault
  linux-user/riscv: Use force_sig_fault
  linux-user/s390x: Use force_sig_fault
  linux-user/sh4: Use force_sig_fault
  linux-user/sparc: Use force_sig_fault
  linux-user/xtensa: Use force_sig_fault

 linux-user/syscall_defs.h                 |   2 +
 target/mips/tcg/translate.h               |   1 +
 linux-user/aarch64/cpu_loop.c             |  34 ++---
 linux-user/alpha/cpu_loop.c               |  69 +++------
 linux-user/arm/cpu_loop.c                 |  53 ++-----
 linux-user/cris/cpu_loop.c                |  13 +-
 linux-user/hppa/cpu_loop.c                |  34 ++---
 linux-user/i386/cpu_loop.c                |  79 +++++-----
 linux-user/m68k/cpu_loop.c                |  26 +---
 linux-user/microblaze/cpu_loop.c          |  73 +++++-----
 linux-user/mips/cpu_loop.c                | 167 +++++-----------------
 linux-user/openrisc/cpu_loop.c            |  18 +--
 linux-user/ppc/cpu_loop.c                 | 146 +++++--------------
 linux-user/riscv/cpu_loop.c               |  32 +----
 linux-user/s390x/cpu_loop.c               |   7 +-
 linux-user/sh4/cpu_loop.c                 |   8 +-
 linux-user/sparc/cpu_loop.c               |  15 +-
 linux-user/xtensa/cpu_loop.c              |  28 ++--
 target/mips/tcg/translate.c               |  36 ++++-
 target/mips/tcg/micromips_translate.c.inc |  10 +-
 target/mips/tcg/mips16e_translate.c.inc   |   2 +-
 target/mips/tcg/nanomips_translate.c.inc  |   4 +-
 22 files changed, 279 insertions(+), 578 deletions(-)

-- 
2.25.1

On 9/18/21 6:56 PM, Richard Henderson wrote:
> Based-on: 20210918184527.408540-1-richard.henderson@linaro.org
> ("linux-user: Streamline handling of SIGSEGV")
> 
> which is in turn based on at least 3 other patch sets, so:
> 
>    https://gitlab.com/rth7680/qemu/-/commits/tcg-siginfo
> 
> Changes since v2:
>    * Rebase on top of sigsegv cleanup, which eliminates about
>      half of the places that needed updating to force_sig_fault.
>    * target/mips cleanups+fixes for EXCP_BREAK and EXCP_TRAP.

Apologies to Phil and Peter, who gave me r-b on v2, which I failed to pick into this patch 
set.  I'll remedy that for v4.


r~