Add a function that generates a Virtual I/O Translation table (VIOT),
describing the topology of paravirtual IOMMUs. The table is created when
instantiating a virtio-iommu device. It contains a virtio-iommu node and
PCI Range nodes for endpoints managed by the IOMMU. By default, a single
node describes all PCI devices. When passing the "default_bus_bypass_iommu"
machine option and "bypass_iommu" PXB option, only buses that do not
bypass the IOMMU are described by PCI Range nodes.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
Sizes and types are hardcoded because it will now be the default style
https://lore.kernel.org/qemu-devel/20210708154617.1538485-1-imammedo@redhat.com/
---
hw/acpi/viot.h | 13 +++++
hw/acpi/viot.c | 112 ++++++++++++++++++++++++++++++++++++++++++++
hw/acpi/Kconfig | 4 ++
hw/acpi/meson.build | 1 +
4 files changed, 130 insertions(+)
create mode 100644 hw/acpi/viot.h
create mode 100644 hw/acpi/viot.c
diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h
new file mode 100644
index 0000000000..4cef29a640
--- /dev/null
+++ b/hw/acpi/viot.h
@@ -0,0 +1,13 @@
+/*
+ * ACPI Virtual I/O Translation Table implementation
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef VIOT_H
+#define VIOT_H
+
+void build_viot(GArray *table_data, BIOSLinker *linker,
+ uint16_t virtio_iommu_bdf, const char *oem_id,
+ const char *oem_table_id);
+
+#endif /* VIOT_H */
diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
new file mode 100644
index 0000000000..e7f7605119
--- /dev/null
+++ b/hw/acpi/viot.c
@@ -0,0 +1,112 @@
+/*
+ * ACPI Virtual I/O Translation table implementation
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include "qemu/osdep.h"
+#include "hw/acpi/acpi.h"
+#include "hw/acpi/aml-build.h"
+#include "hw/acpi/viot.h"
+#include "hw/pci/pci.h"
+#include "hw/pci/pci_host.h"
+
+struct viot_pci_ranges {
+ GArray *blob;
+ size_t count;
+ uint16_t output_node;
+};
+
+/* Build PCI range for a given PCI host bridge */
+static int viot_host_bridges(Object *obj, void *opaque)
+{
+ struct viot_pci_ranges *pci_ranges = opaque;
+ GArray *blob = pci_ranges->blob;
+
+ if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
+ PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
+
+ if (bus && !pci_bus_bypass_iommu(bus)) {
+ int min_bus, max_bus;
+
+ pci_bus_range(bus, &min_bus, &max_bus);
+
+ /* Type (PCI range) */
+ build_append_int_noprefix(blob, 1, 1);
+ /* Reserved */
+ build_append_int_noprefix(blob, 0, 1);
+ /* Length */
+ build_append_int_noprefix(blob, 24, 2);
+ /* Endpoint start */
+ build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4);
+ /* PCI Segment start */
+ build_append_int_noprefix(blob, 0, 2);
+ /* PCI Segment end */
+ build_append_int_noprefix(blob, 0, 2);
+ /* PCI BDF start */
+ build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2);
+ /* PCI BDF end */
+ build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2);
+ /* Output node */
+ build_append_int_noprefix(blob, pci_ranges->output_node, 2);
+ /* Reserved */
+ build_append_int_noprefix(blob, 0, 6);
+
+ pci_ranges->count++;
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI
+ * endpoints.
+ */
+void build_viot(GArray *table_data, BIOSLinker *linker,
+ uint16_t virtio_iommu_bdf, const char *oem_id,
+ const char *oem_table_id)
+{
+ /* The virtio-iommu node follows the 48-bytes header */
+ int viommu_off = 48;
+ AcpiTable table = { .sig = "VIOT", .rev = 0,
+ .oem_id = oem_id, .oem_table_id = oem_table_id };
+ struct viot_pci_ranges pci_ranges = {
+ .output_node = viommu_off,
+ .blob = g_array_new(false, true, 1),
+ };
+
+ /* Build the list of PCI ranges that this viommu manages */
+ object_child_foreach_recursive(object_get_root(), viot_host_bridges,
+ &pci_ranges);
+
+ /* ACPI table header */
+ acpi_table_begin(&table, table_data);
+ /* Node count */
+ build_append_int_noprefix(table_data, pci_ranges.count + 1, 2);
+ /* Node offset */
+ build_append_int_noprefix(table_data, viommu_off, 2);
+ /* Reserved */
+ build_append_int_noprefix(table_data, 0, 8);
+
+ /* Virtio-iommu node */
+ /* Type (virtio-pci IOMMU) */
+ build_append_int_noprefix(table_data, 3, 1);
+ /* Reserved */
+ build_append_int_noprefix(table_data, 0, 1);
+ /* Length */
+ build_append_int_noprefix(table_data, 16, 2);
+ /* PCI Segment */
+ build_append_int_noprefix(table_data, 0, 2);
+ /* PCI BDF number */
+ build_append_int_noprefix(table_data, virtio_iommu_bdf, 2);
+ /* Reserved */
+ build_append_int_noprefix(table_data, 0, 8);
+
+ /* PCI ranges found above */
+ g_array_append_vals(table_data, pci_ranges.blob->data,
+ pci_ranges.blob->len);
+ g_array_free(pci_ranges.blob, true);
+
+ acpi_table_end(linker, &table);
+}
+
diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig
index 3b5e118c54..622b0b50b7 100644
--- a/hw/acpi/Kconfig
+++ b/hw/acpi/Kconfig
@@ -51,6 +51,10 @@ config ACPI_VMGENID
default y
depends on PC
+config ACPI_VIOT
+ bool
+ depends on ACPI
+
config ACPI_HW_REDUCED
bool
select ACPI
diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
index 7d8c0eb43e..adf6347bc4 100644
--- a/hw/acpi/meson.build
+++ b/hw/acpi/meson.build
@@ -20,6 +20,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files(
acpi_ss.add(when: 'CONFIG_ACPI_PIIX4', if_true: files('piix4.c'))
acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_true: files('pcihp.c'))
acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_false: files('acpi-pci-hotplug-stub.c'))
+acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c'))
acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c'))
acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c'))
acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
--
2.33.0
Hi Jean,
On 9/14/21 4:19 PM, Jean-Philippe Brucker wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI Range nodes for endpoints managed by the IOMMU. By default, a single
> node describes all PCI devices. When passing the "default_bus_bypass_iommu"
> machine option and "bypass_iommu" PXB option, only buses that do not
> bypass the IOMMU are described by PCI Range nodes.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> ---
> Sizes and types are hardcoded because it will now be the default style
> https://lore.kernel.org/qemu-devel/20210708154617.1538485-1-imammedo@redhat.com/
> ---
> hw/acpi/viot.h | 13 +++++
> hw/acpi/viot.c | 112 ++++++++++++++++++++++++++++++++++++++++++++
> hw/acpi/Kconfig | 4 ++
> hw/acpi/meson.build | 1 +
> 4 files changed, 130 insertions(+)
> create mode 100644 hw/acpi/viot.h
> create mode 100644 hw/acpi/viot.c
>
> diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h
> new file mode 100644
> index 0000000000..4cef29a640
> --- /dev/null
> +++ b/hw/acpi/viot.h
> @@ -0,0 +1,13 @@
> +/*
> + * ACPI Virtual I/O Translation Table implementation
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#ifndef VIOT_H
> +#define VIOT_H
> +
> +void build_viot(GArray *table_data, BIOSLinker *linker,
> + uint16_t virtio_iommu_bdf, const char *oem_id,
> + const char *oem_table_id);
> +
> +#endif /* VIOT_H */
> diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
> new file mode 100644
> index 0000000000..e7f7605119
> --- /dev/null
> +++ b/hw/acpi/viot.c
> @@ -0,0 +1,112 @@
> +/*
> + * ACPI Virtual I/O Translation table implementation
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include "qemu/osdep.h"
> +#include "hw/acpi/acpi.h"
> +#include "hw/acpi/aml-build.h"
> +#include "hw/acpi/viot.h"
> +#include "hw/pci/pci.h"
> +#include "hw/pci/pci_host.h"
> +
> +struct viot_pci_ranges {
> + GArray *blob;
> + size_t count;
> + uint16_t output_node;
> +};
> +
> +/* Build PCI range for a given PCI host bridge */
> +static int viot_host_bridges(Object *obj, void *opaque)
nit: rename the function into something like build_pci_range_node()
which actually indicates what it does
> +{
> + struct viot_pci_ranges *pci_ranges = opaque;
> + GArray *blob = pci_ranges->blob;
> +
> + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
> + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
> +
> + if (bus && !pci_bus_bypass_iommu(bus)) {
> + int min_bus, max_bus;
> +
> + pci_bus_range(bus, &min_bus, &max_bus);
> +
> + /* Type (PCI range) */
> + build_append_int_noprefix(blob, 1, 1);
> + /* Reserved */
> + build_append_int_noprefix(blob, 0, 1);
> + /* Length */
> + build_append_int_noprefix(blob, 24, 2);
> + /* Endpoint start */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4);
> + /* PCI Segment start */
> + build_append_int_noprefix(blob, 0, 2);
> + /* PCI Segment end */
> + build_append_int_noprefix(blob, 0, 2);
> + /* PCI BDF start */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2);
> + /* PCI BDF end */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2);
> + /* Output node */
> + build_append_int_noprefix(blob, pci_ranges->output_node, 2);
> + /* Reserved */
> + build_append_int_noprefix(blob, 0, 6);
> +
> + pci_ranges->count++;
> + }
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI
> + * endpoints.
> + */
> +void build_viot(GArray *table_data, BIOSLinker *linker,
> + uint16_t virtio_iommu_bdf, const char *oem_id,
> + const char *oem_table_id)
> +{
> + /* The virtio-iommu node follows the 48-bytes header */
> + int viommu_off = 48;
> + AcpiTable table = { .sig = "VIOT", .rev = 0,
> + .oem_id = oem_id, .oem_table_id = oem_table_id };
> + struct viot_pci_ranges pci_ranges = {
> + .output_node = viommu_off,
> + .blob = g_array_new(false, true, 1),
nit add clear comment as in the other places?
.blob = g_array_new(false, /* clear */ true, 1),
> + };
> +
> + /* Build the list of PCI ranges that this viommu manages */
> + object_child_foreach_recursive(object_get_root(), viot_host_bridges,
> + &pci_ranges);
> +
> + /* ACPI table header */
> + acpi_table_begin(&table, table_data);
> + /* Node count */
> + build_append_int_noprefix(table_data, pci_ranges.count + 1, 2);
> + /* Node offset */
> + build_append_int_noprefix(table_data, viommu_off, 2);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 8);
> +
> + /* Virtio-iommu node */
> + /* Type (virtio-pci IOMMU) */
> + build_append_int_noprefix(table_data, 3, 1);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 1);
> + /* Length */
> + build_append_int_noprefix(table_data, 16, 2);
> + /* PCI Segment */
> + build_append_int_noprefix(table_data, 0, 2);
> + /* PCI BDF number */
> + build_append_int_noprefix(table_data, virtio_iommu_bdf, 2);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 8);
> +
> + /* PCI ranges found above */
> + g_array_append_vals(table_data, pci_ranges.blob->data,
> + pci_ranges.blob->len);
> + g_array_free(pci_ranges.blob, true);
> +
> + acpi_table_end(linker, &table);
> +}
> +
> diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig
> index 3b5e118c54..622b0b50b7 100644
> --- a/hw/acpi/Kconfig
> +++ b/hw/acpi/Kconfig
> @@ -51,6 +51,10 @@ config ACPI_VMGENID
> default y
> depends on PC
>
> +config ACPI_VIOT
> + bool
> + depends on ACPI
> +
> config ACPI_HW_REDUCED
> bool
> select ACPI
> diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
> index 7d8c0eb43e..adf6347bc4 100644
> --- a/hw/acpi/meson.build
> +++ b/hw/acpi/meson.build
> @@ -20,6 +20,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files(
> acpi_ss.add(when: 'CONFIG_ACPI_PIIX4', if_true: files('piix4.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_true: files('pcihp.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_false: files('acpi-pci-hotplug-stub.c'))
> +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c'))
> acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c'))
> acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
Besides
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested with default root bus and pxb-pci. Feel free to add
Tested-by: Eric Auger <eric.auger@redhat.com>
Thanks
Eric
On Tue, 14 Sep 2021 15:19:56 +0100
Jean-Philippe Brucker <jean-philippe@linaro.org> wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI Range nodes for endpoints managed by the IOMMU. By default, a single
> node describes all PCI devices. When passing the "default_bus_bypass_iommu"
> machine option and "bypass_iommu" PXB option, only buses that do not
> bypass the IOMMU are described by PCI Range nodes.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> ---
> Sizes and types are hardcoded because it will now be the default style
> https://lore.kernel.org/qemu-devel/20210708154617.1538485-1-imammedo@redhat.com/
> ---
> hw/acpi/viot.h | 13 +++++
> hw/acpi/viot.c | 112 ++++++++++++++++++++++++++++++++++++++++++++
> hw/acpi/Kconfig | 4 ++
> hw/acpi/meson.build | 1 +
> 4 files changed, 130 insertions(+)
> create mode 100644 hw/acpi/viot.h
> create mode 100644 hw/acpi/viot.c
>
> diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h
> new file mode 100644
> index 0000000000..4cef29a640
> --- /dev/null
> +++ b/hw/acpi/viot.h
> @@ -0,0 +1,13 @@
> +/*
> + * ACPI Virtual I/O Translation Table implementation
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#ifndef VIOT_H
> +#define VIOT_H
> +
> +void build_viot(GArray *table_data, BIOSLinker *linker,
> + uint16_t virtio_iommu_bdf, const char *oem_id,
> + const char *oem_table_id);
> +
> +#endif /* VIOT_H */
> diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
> new file mode 100644
> index 0000000000..e7f7605119
> --- /dev/null
> +++ b/hw/acpi/viot.c
> @@ -0,0 +1,112 @@
> +/*
> + * ACPI Virtual I/O Translation table implementation
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include "qemu/osdep.h"
> +#include "hw/acpi/acpi.h"
> +#include "hw/acpi/aml-build.h"
> +#include "hw/acpi/viot.h"
> +#include "hw/pci/pci.h"
> +#include "hw/pci/pci_host.h"
> +
> +struct viot_pci_ranges {
> + GArray *blob;
> + size_t count;
> + uint16_t output_node;
> +};
> +
> +/* Build PCI range for a given PCI host bridge */
> +static int viot_host_bridges(Object *obj, void *opaque)
> +{
> + struct viot_pci_ranges *pci_ranges = opaque;
> + GArray *blob = pci_ranges->blob;
> +
> + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
> + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
> +
> + if (bus && !pci_bus_bypass_iommu(bus)) {
> + int min_bus, max_bus;
> +
> + pci_bus_range(bus, &min_bus, &max_bus);
> +
> + /* Type (PCI range) */
> + build_append_int_noprefix(blob, 1, 1);
> + /* Reserved */
> + build_append_int_noprefix(blob, 0, 1);
> + /* Length */
> + build_append_int_noprefix(blob, 24, 2);
> + /* Endpoint start */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4);
> + /* PCI Segment start */
> + build_append_int_noprefix(blob, 0, 2);
> + /* PCI Segment end */
> + build_append_int_noprefix(blob, 0, 2);
> + /* PCI BDF start */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2);
> + /* PCI BDF end */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2);
> + /* Output node */
> + build_append_int_noprefix(blob, pci_ranges->output_node, 2);
> + /* Reserved */
> + build_append_int_noprefix(blob, 0, 6);
> +
> + pci_ranges->count++;
> + }
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI
> + * endpoints.
We usually put a pointer to spec/revision and chapter in it
that describes being implemented table, so reviewer would
have a reference to compare code with. Otherwise I have no
idea if implementation is correct or not.
ex: build_hmat_mpda
the same applies to viot_host_bridges
> + */
> +void build_viot(GArray *table_data, BIOSLinker *linker,
> + uint16_t virtio_iommu_bdf, const char *oem_id,
> + const char *oem_table_id)
> +{
> + /* The virtio-iommu node follows the 48-bytes header */
> + int viommu_off = 48;
> + AcpiTable table = { .sig = "VIOT", .rev = 0,
> + .oem_id = oem_id, .oem_table_id = oem_table_id };
> + struct viot_pci_ranges pci_ranges = {
> + .output_node = viommu_off,
> + .blob = g_array_new(false, true, 1),
> + };
> +
> + /* Build the list of PCI ranges that this viommu manages */
> + object_child_foreach_recursive(object_get_root(), viot_host_bridges,
> + &pci_ranges);
> +
> + /* ACPI table header */
> + acpi_table_begin(&table, table_data);
> + /* Node count */
> + build_append_int_noprefix(table_data, pci_ranges.count + 1, 2);
> + /* Node offset */
> + build_append_int_noprefix(table_data, viommu_off, 2);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 8);
> +
> + /* Virtio-iommu node */
> + /* Type (virtio-pci IOMMU) */
> + build_append_int_noprefix(table_data, 3, 1);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 1);
> + /* Length */
> + build_append_int_noprefix(table_data, 16, 2);
> + /* PCI Segment */
> + build_append_int_noprefix(table_data, 0, 2);
> + /* PCI BDF number */
> + build_append_int_noprefix(table_data, virtio_iommu_bdf, 2);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 8);
> +
> + /* PCI ranges found above */
> + g_array_append_vals(table_data, pci_ranges.blob->data,
> + pci_ranges.blob->len);
> + g_array_free(pci_ranges.blob, true);
> +
> + acpi_table_end(linker, &table);
> +}
> +
> diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig
> index 3b5e118c54..622b0b50b7 100644
> --- a/hw/acpi/Kconfig
> +++ b/hw/acpi/Kconfig
> @@ -51,6 +51,10 @@ config ACPI_VMGENID
> default y
> depends on PC
>
> +config ACPI_VIOT
> + bool
> + depends on ACPI
> +
> config ACPI_HW_REDUCED
> bool
> select ACPI
> diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
> index 7d8c0eb43e..adf6347bc4 100644
> --- a/hw/acpi/meson.build
> +++ b/hw/acpi/meson.build
> @@ -20,6 +20,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files(
> acpi_ss.add(when: 'CONFIG_ACPI_PIIX4', if_true: files('piix4.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_true: files('pcihp.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_false: files('acpi-pci-hotplug-stub.c'))
> +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c'))
> acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c'))
> acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
On Mon, Sep 20, 2021 at 10:06:09AM +0200, Igor Mammedov wrote: > > +/* > > + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI > > + * endpoints. > > We usually put a pointer to spec/revision and chapter in it > that describes being implemented table, so reviewer would > have a reference to compare code with. Otherwise I have no > idea if implementation is correct or not. The 6.5 ACPI specification isn't out yet unfortunately, so I can't put any reference at the moment. I don't know when it will be published. The draft specification is here: https://jpbrucker.net/virtio-iommu/viot/viot-v9.pdf But that's only temporary. I can make a note to add the pointers once the spec is out. The acpica implementation could also be used for cross-reference: https://github.com/acpica/acpica/commit/fc4e33319c1ee08f20f5c44853dd8426643f6dfd Thanks, Jean > > ex: build_hmat_mpda > > the same applies to viot_host_bridges >
On Tue, 14 Sep 2021 15:19:56 +0100
Jean-Philippe Brucker <jean-philippe@linaro.org> wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI Range nodes for endpoints managed by the IOMMU. By default, a single
> node describes all PCI devices. When passing the "default_bus_bypass_iommu"
> machine option and "bypass_iommu" PXB option, only buses that do not
> bypass the IOMMU are described by PCI Range nodes.
>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> ---
> Sizes and types are hardcoded because it will now be the default style
> https://lore.kernel.org/qemu-devel/20210708154617.1538485-1-imammedo@redhat.com/
> ---
> hw/acpi/viot.h | 13 +++++
> hw/acpi/viot.c | 112 ++++++++++++++++++++++++++++++++++++++++++++
> hw/acpi/Kconfig | 4 ++
> hw/acpi/meson.build | 1 +
> 4 files changed, 130 insertions(+)
> create mode 100644 hw/acpi/viot.h
> create mode 100644 hw/acpi/viot.c
>
> diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h
> new file mode 100644
> index 0000000000..4cef29a640
> --- /dev/null
> +++ b/hw/acpi/viot.h
> @@ -0,0 +1,13 @@
> +/*
> + * ACPI Virtual I/O Translation Table implementation
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#ifndef VIOT_H
> +#define VIOT_H
> +
> +void build_viot(GArray *table_data, BIOSLinker *linker,
> + uint16_t virtio_iommu_bdf, const char *oem_id,
> + const char *oem_table_id);
> +
> +#endif /* VIOT_H */
> diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
> new file mode 100644
> index 0000000000..e7f7605119
> --- /dev/null
> +++ b/hw/acpi/viot.c
> @@ -0,0 +1,112 @@
> +/*
> + * ACPI Virtual I/O Translation table implementation
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include "qemu/osdep.h"
> +#include "hw/acpi/acpi.h"
> +#include "hw/acpi/aml-build.h"
> +#include "hw/acpi/viot.h"
> +#include "hw/pci/pci.h"
> +#include "hw/pci/pci_host.h"
> +
> +struct viot_pci_ranges {
> + GArray *blob;
> + size_t count;
> + uint16_t output_node;
> +};
> +
> +/* Build PCI range for a given PCI host bridge */
> +static int viot_host_bridges(Object *obj, void *opaque)
> +{
> + struct viot_pci_ranges *pci_ranges = opaque;
> + GArray *blob = pci_ranges->blob;
> +
> + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
> + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
> +
> + if (bus && !pci_bus_bypass_iommu(bus)) {
> + int min_bus, max_bus;
> +
> + pci_bus_range(bus, &min_bus, &max_bus);
> +
> + /* Type (PCI range) */
> + build_append_int_noprefix(blob, 1, 1);
> + /* Reserved */
> + build_append_int_noprefix(blob, 0, 1);
> + /* Length */
> + build_append_int_noprefix(blob, 24, 2);
> + /* Endpoint start */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4);
> + /* PCI Segment start */
> + build_append_int_noprefix(blob, 0, 2);
> + /* PCI Segment end */
> + build_append_int_noprefix(blob, 0, 2);
> + /* PCI BDF start */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2);
> + /* PCI BDF end */
> + build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2);
> + /* Output node */
> + build_append_int_noprefix(blob, pci_ranges->output_node, 2);
> + /* Reserved */
> + build_append_int_noprefix(blob, 0, 6);
> +
> + pci_ranges->count++;
> + }
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI
> + * endpoints.
> + */
> +void build_viot(GArray *table_data, BIOSLinker *linker,
> + uint16_t virtio_iommu_bdf, const char *oem_id,
> + const char *oem_table_id)
> +{
> + /* The virtio-iommu node follows the 48-bytes header */
> + int viommu_off = 48;
> + AcpiTable table = { .sig = "VIOT", .rev = 0,
> + .oem_id = oem_id, .oem_table_id = oem_table_id };
> + struct viot_pci_ranges pci_ranges = {
> + .output_node = viommu_off,
> + .blob = g_array_new(false, true, 1),
> + };
> +
> + /* Build the list of PCI ranges that this viommu manages */
> + object_child_foreach_recursive(object_get_root(), viot_host_bridges,
I'd limit scope to machine and re-use one that caller
already uses.
in arm case: virt_acpi_build(VirtMachineState *vms, ...
q35: acpi_build(..., MachineState *machine)
> + &pci_ranges);
> +
> + /* ACPI table header */
> + acpi_table_begin(&table, table_data);
> + /* Node count */
> + build_append_int_noprefix(table_data, pci_ranges.count + 1, 2);
> + /* Node offset */
> + build_append_int_noprefix(table_data, viommu_off, 2);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 8);
> +
> + /* Virtio-iommu node */
> + /* Type (virtio-pci IOMMU) */
> + build_append_int_noprefix(table_data, 3, 1);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 1);
> + /* Length */
> + build_append_int_noprefix(table_data, 16, 2);
> + /* PCI Segment */
> + build_append_int_noprefix(table_data, 0, 2);
> + /* PCI BDF number */
> + build_append_int_noprefix(table_data, virtio_iommu_bdf, 2);
> + /* Reserved */
> + build_append_int_noprefix(table_data, 0, 8);
> +
> + /* PCI ranges found above */
> + g_array_append_vals(table_data, pci_ranges.blob->data,
> + pci_ranges.blob->len);
> + g_array_free(pci_ranges.blob, true);
> +
> + acpi_table_end(linker, &table);
> +}
> +
> diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig
> index 3b5e118c54..622b0b50b7 100644
> --- a/hw/acpi/Kconfig
> +++ b/hw/acpi/Kconfig
> @@ -51,6 +51,10 @@ config ACPI_VMGENID
> default y
> depends on PC
>
> +config ACPI_VIOT
> + bool
> + depends on ACPI
> +
> config ACPI_HW_REDUCED
> bool
> select ACPI
> diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
> index 7d8c0eb43e..adf6347bc4 100644
> --- a/hw/acpi/meson.build
> +++ b/hw/acpi/meson.build
> @@ -20,6 +20,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files(
> acpi_ss.add(when: 'CONFIG_ACPI_PIIX4', if_true: files('piix4.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_true: files('pcihp.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_false: files('acpi-pci-hotplug-stub.c'))
> +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c'))
> acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c'))
> acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c'))
> acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
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