[RFC PATCH 0/5] Make Intel PT configurable

Xiaoyao Li posted 5 patches 2 years, 7 months ago
Failed in applying to current master (apply log)
There is a newer version of this series
target/i386/cpu.c     | 215 ++++++++++++++++++++++++++++--------------
target/i386/cpu.h     |  40 +++++++-
target/i386/kvm/kvm.c |   8 +-
3 files changed, 186 insertions(+), 77 deletions(-)
[RFC PATCH 0/5] Make Intel PT configurable
Posted by Xiaoyao Li 2 years, 7 months ago
Initial Intel PT support was added by making it as fixed feature set as
ICX's capabilities, which allowed different CPU model with PT enabled
live migration on ICX host. However, it breaks the PT exposure/working
on SPR machine. Because SPR has less PT capabilities regrading
CPUID(0x14,1):EBX[15:0].

This series aims to make Intel PT configurable that named CPU model can
define its own PT feature set and "-cpu host/max" can use the host pass
through feature set of PT.

At the same time, it also ensure existing named CPU model to generate
the same PT CPUID set as before to not break live migration. 

Xiaoyao Li (5):
  target/i386: Print CPUID subleaf info for unsupported feature
  target/i386: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD
  target/i386: Enable host pass through of Intel PT
  target/i386: Define specific PT feature set for IceLake-server and
    Snowridge
  target/i386: Access MSR_IA32_RTIT_ADDRn based on guest CPUID
    configuration

 target/i386/cpu.c     | 215 ++++++++++++++++++++++++++++--------------
 target/i386/cpu.h     |  40 +++++++-
 target/i386/kvm/kvm.c |   8 +-
 3 files changed, 186 insertions(+), 77 deletions(-)

-- 
2.27.0


Re: [RFC PATCH 0/5] Make Intel PT configurable
Posted by Xiaoyao Li 2 years, 6 months ago
Ping...

Eduardo, could you please take a look at this series.

Thanks!
-Xiaoyao

On 9/9/2021 10:41 PM, Xiaoyao Li wrote:
> Initial Intel PT support was added by making it as fixed feature set as
> ICX's capabilities, which allowed different CPU model with PT enabled
> live migration on ICX host. However, it breaks the PT exposure/working
> on SPR machine. Because SPR has less PT capabilities regrading
> CPUID(0x14,1):EBX[15:0].
> 
> This series aims to make Intel PT configurable that named CPU model can
> define its own PT feature set and "-cpu host/max" can use the host pass
> through feature set of PT.
> 
> At the same time, it also ensure existing named CPU model to generate
> the same PT CPUID set as before to not break live migration.
> 
> Xiaoyao Li (5):
>    target/i386: Print CPUID subleaf info for unsupported feature
>    target/i386: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD
>    target/i386: Enable host pass through of Intel PT
>    target/i386: Define specific PT feature set for IceLake-server and
>      Snowridge
>    target/i386: Access MSR_IA32_RTIT_ADDRn based on guest CPUID
>      configuration
> 
>   target/i386/cpu.c     | 215 ++++++++++++++++++++++++++++--------------
>   target/i386/cpu.h     |  40 +++++++-
>   target/i386/kvm/kvm.c |   8 +-
>   3 files changed, 186 insertions(+), 77 deletions(-)
>