From: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com>
Add tests that the A64FX CPU model exposes the expected features.
Signed-off-by: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
[PMM: added commit message body]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/qtest/arm-cpu-features.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
index 8252b85bb85..90a87f0ea9f 100644
--- a/tests/qtest/arm-cpu-features.c
+++ b/tests/qtest/arm-cpu-features.c
@@ -473,6 +473,19 @@ static void test_query_cpu_model_expansion(const void *data)
assert_has_feature_enabled(qts, "cortex-a57", "pmu");
assert_has_feature_enabled(qts, "cortex-a57", "aarch64");
+ assert_has_feature_enabled(qts, "a64fx", "pmu");
+ assert_has_feature_enabled(qts, "a64fx", "aarch64");
+ /*
+ * A64FX does not support any other vector lengths besides those
+ * that are enabled by default(128bit, 256bits, 512bit).
+ */
+ assert_has_feature_enabled(qts, "a64fx", "sve");
+ assert_sve_vls(qts, "a64fx", 0xb, NULL);
+ assert_error(qts, "a64fx", "cannot enable sve384",
+ "{ 'sve384': true }");
+ assert_error(qts, "a64fx", "cannot enable sve640",
+ "{ 'sve640': true }");
+
sve_tests_default(qts, "max");
pauth_tests_default(qts, "max");
--
2.20.1