[PATCH v3 0/2] target/ppc: Fix vector registers access in gdbstub for little-endian

matheus.ferst@eldorado.org.br posted 2 patches 2 years, 8 months ago
Test checkpatch passed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20210826145656.2507213-1-matheus.ferst@eldorado.org.br
Maintainers: David Gibson <david@gibson.dropbear.id.au>, Greg Kurz <groug@kaod.org>
include/qemu/int128.h | 17 ++++++++++++++++-
target/ppc/gdbstub.c  | 32 +++++++-------------------------
2 files changed, 23 insertions(+), 26 deletions(-)
[PATCH v3 0/2] target/ppc: Fix vector registers access in gdbstub for little-endian
Posted by matheus.ferst@eldorado.org.br 2 years, 8 months ago
From: Matheus Ferst <matheus.ferst@eldorado.org.br>

PPC gdbstub code has two possible swaps of the 64-bit elements of AVR
registers: in gdb_get_avr_reg/gdb_set_avr_reg (based on msr_le) and in
gdb_get_reg128/ldq_p (based on TARGET_WORDS_BIGENDIAN).

In softmmu, only the first is done, because TARGET_WORDS_BIGENDIAN is
always true. In user mode, both are being done, resulting in swapped
high and low doublewords of AVR registers in little-endian binaries.

We fix this by moving the first swap to ppc_maybe_bswap_register, which
already handles the endianness swap of each element's value in softmmu
and does nothing in user mode.

Based-on: <20210826141446.2488609-1-matheus.ferst@eldorado.org.br>

Matheus Ferst (2):
  include/qemu/int128.h: introduce bswap128s
  target/ppc: fix vector registers access in gdbstub for little-endian

 include/qemu/int128.h | 17 ++++++++++++++++-
 target/ppc/gdbstub.c  | 32 +++++++-------------------------
 2 files changed, 23 insertions(+), 26 deletions(-)

-- 
2.25.1


Re: [PATCH v3 0/2] target/ppc: Fix vector registers access in gdbstub for little-endian
Posted by David Gibson 2 years, 8 months ago
On Thu, Aug 26, 2021 at 11:56:54AM -0300, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
> 
> PPC gdbstub code has two possible swaps of the 64-bit elements of AVR
> registers: in gdb_get_avr_reg/gdb_set_avr_reg (based on msr_le) and in
> gdb_get_reg128/ldq_p (based on TARGET_WORDS_BIGENDIAN).
> 
> In softmmu, only the first is done, because TARGET_WORDS_BIGENDIAN is
> always true. In user mode, both are being done, resulting in swapped
> high and low doublewords of AVR registers in little-endian binaries.
> 
> We fix this by moving the first swap to ppc_maybe_bswap_register, which
> already handles the endianness swap of each element's value in softmmu
> and does nothing in user mode.

Applied to ppc-for-6.2, thanks.

> 
> Based-on: <20210826141446.2488609-1-matheus.ferst@eldorado.org.br>
> 
> Matheus Ferst (2):
>   include/qemu/int128.h: introduce bswap128s
>   target/ppc: fix vector registers access in gdbstub for little-endian
> 
>  include/qemu/int128.h | 17 ++++++++++++++++-
>  target/ppc/gdbstub.c  | 32 +++++++-------------------------
>  2 files changed, 23 insertions(+), 26 deletions(-)
> 

-- 
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