[PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM

Tong Ho posted 9 patches 2 years, 8 months ago
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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20210819040308.675057-1-tong.ho@xilinx.com
Maintainers: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Alistair Francis <alistair@alistair23.me>, Peter Maydell <peter.maydell@linaro.org>
There is a newer version of this series
docs/system/arm/xlnx-versal-virt.rst |  49 ++
hw/arm/xlnx-versal-virt.c            |  57 ++
hw/arm/xlnx-versal.c                 |  57 ++
hw/arm/xlnx-zynqmp.c                 |  50 ++
hw/nvram/Kconfig                     |  17 +
hw/nvram/meson.build                 |  11 +
hw/nvram/xlnx-bbram.c                | 536 +++++++++++++++++
hw/nvram/xlnx-efuse-crc.c            | 118 ++++
hw/nvram/xlnx-efuse.c                | 253 ++++++++
hw/nvram/xlnx-versal-efuse-cache.c   | 141 +++++
hw/nvram/xlnx-versal-efuse-ctrl.c    | 786 ++++++++++++++++++++++++
hw/nvram/xlnx-zynqmp-efuse.c         | 861 +++++++++++++++++++++++++++
include/hw/arm/xlnx-versal.h         |  17 +
include/hw/arm/xlnx-zynqmp.h         |   5 +
include/hw/nvram/xlnx-bbram.h        |  55 ++
include/hw/nvram/xlnx-efuse.h        |  80 +++
include/hw/nvram/xlnx-versal-efuse.h |  62 ++
include/hw/nvram/xlnx-zynqmp-efuse.h |  45 ++
18 files changed, 3200 insertions(+)
create mode 100644 hw/nvram/xlnx-bbram.c
create mode 100644 hw/nvram/xlnx-efuse-crc.c
create mode 100644 hw/nvram/xlnx-efuse.c
create mode 100644 hw/nvram/xlnx-versal-efuse-cache.c
create mode 100644 hw/nvram/xlnx-versal-efuse-ctrl.c
create mode 100644 hw/nvram/xlnx-zynqmp-efuse.c
create mode 100644 include/hw/nvram/xlnx-bbram.h
create mode 100644 include/hw/nvram/xlnx-efuse.h
create mode 100644 include/hw/nvram/xlnx-versal-efuse.h
create mode 100644 include/hw/nvram/xlnx-zynqmp-efuse.h
[PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM
Posted by Tong Ho 2 years, 8 months ago
This series implements the Xilinx eFUSE and BBRAM devices for
the Versal and ZynqMP product families.

Furthermore, both new devices are connected to the xlnx-versal-virt
board and the xlnx-zcu102 board.

See changes in docs/system/arm/xlnx-versal-virt.rst for detail.

Tong Ho (9):
  docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage
  hw/nvram: Introduce Xilinx eFuse QOM
  hw/nvram: Introduce Xilinx Versal eFuse device
  hw/nvram: Introduce Xilinx ZynqMP eFuse device
  hw/nvram: Introduce Xilinx battery-backed ram
  hw/arm: xlnx-versal: Add Xilinx BBRAM device
  hw/arm: xlnx-versal: Add Xilinx eFUSE device
  hw/arm: xlnx-zynqmp: Add Xilinx BBRAM device
  hw/arm: xlnx-zynqmp: Add Xilinx eFUSE device

 docs/system/arm/xlnx-versal-virt.rst |  49 ++
 hw/arm/xlnx-versal-virt.c            |  57 ++
 hw/arm/xlnx-versal.c                 |  57 ++
 hw/arm/xlnx-zynqmp.c                 |  50 ++
 hw/nvram/Kconfig                     |  17 +
 hw/nvram/meson.build                 |  11 +
 hw/nvram/xlnx-bbram.c                | 536 +++++++++++++++++
 hw/nvram/xlnx-efuse-crc.c            | 118 ++++
 hw/nvram/xlnx-efuse.c                | 253 ++++++++
 hw/nvram/xlnx-versal-efuse-cache.c   | 141 +++++
 hw/nvram/xlnx-versal-efuse-ctrl.c    | 786 ++++++++++++++++++++++++
 hw/nvram/xlnx-zynqmp-efuse.c         | 861 +++++++++++++++++++++++++++
 include/hw/arm/xlnx-versal.h         |  17 +
 include/hw/arm/xlnx-zynqmp.h         |   5 +
 include/hw/nvram/xlnx-bbram.h        |  55 ++
 include/hw/nvram/xlnx-efuse.h        |  80 +++
 include/hw/nvram/xlnx-versal-efuse.h |  62 ++
 include/hw/nvram/xlnx-zynqmp-efuse.h |  45 ++
 18 files changed, 3200 insertions(+)
 create mode 100644 hw/nvram/xlnx-bbram.c
 create mode 100644 hw/nvram/xlnx-efuse-crc.c
 create mode 100644 hw/nvram/xlnx-efuse.c
 create mode 100644 hw/nvram/xlnx-versal-efuse-cache.c
 create mode 100644 hw/nvram/xlnx-versal-efuse-ctrl.c
 create mode 100644 hw/nvram/xlnx-zynqmp-efuse.c
 create mode 100644 include/hw/nvram/xlnx-bbram.h
 create mode 100644 include/hw/nvram/xlnx-efuse.h
 create mode 100644 include/hw/nvram/xlnx-versal-efuse.h
 create mode 100644 include/hw/nvram/xlnx-zynqmp-efuse.h

-- 
2.25.1


Re: [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM
Posted by Edgar E. Iglesias 2 years, 8 months ago
On Wed, Aug 18, 2021 at 09:02:59PM -0700, Tong Ho wrote:
> This series implements the Xilinx eFUSE and BBRAM devices for
> the Versal and ZynqMP product families.
> 
> Furthermore, both new devices are connected to the xlnx-versal-virt
> board and the xlnx-zcu102 board.

Hi Tong,

A few general comments.

Patch #1 should probably be moved to be the last patch of the series.

I think we should remove the commands about register generation
"Partially generated by xregqemu.py". It may be confusing to others
since it's not a tool we run in the build process but rather a one
off extraction of reg definitions...

Thanks!
Edgar