[PATCH for-6.2 v5 0/5] hw/arm/virt: Introduce cpu topology support

Yanan Wang posted 5 patches 2 years, 9 months ago
Failed in applying to current master (apply log)
There is a newer version of this series
hw/acpi/aml-build.c          | 76 ++++++++++++++++++++++++++++++++++++
hw/arm/virt-acpi-build.c     |  8 +++-
hw/arm/virt.c                | 62 ++++++++++++++++++++++++-----
include/hw/acpi/aml-build.h  |  7 ++++
include/hw/arm/virt.h        |  4 +-
include/sysemu/device_tree.h |  1 +
softmmu/device_tree.c        | 44 ++++++++++++++++++++-
7 files changed, 188 insertions(+), 14 deletions(-)
[PATCH for-6.2 v5 0/5] hw/arm/virt: Introduce cpu topology support
Posted by Yanan Wang 2 years, 9 months ago
Hi,

This is a new version (v5) of the series [1] that I posted to introduce
support for generating cpu topology descriptions to virt machine guest.

Once the view of an accurate virtual cpu topology is provided to guest,
with a well-designed vCPU pinning to the pCPU we may get a huge benefit,
e.g., the scheduling performance improvement. See Dario Faggioli's
research and the related performance tests in [2] for reference.

This patch series introduces cpu topology support for ARM platform.
Both cpu-map in DT and ACPI PPTT table are introduced to store the
topology information. And we only describe the topology information
to 6.2 and newer virt machines, considering compatibility.

[1] https://lore.kernel.org/qemu-devel/20210622093413.13360-1-wangyanan55@huawei.com/
[2] https://kvmforum2020.sched.com/event/eE1y/virtual-topology-for-virtual-machines
-friend-or-foe-dario-faggioli-suse

Some tests:
1) -smp 16,sockets=2,cores=4,threads=2,maxcpus=16
lscpu:
Architecture:        aarch64
Byte Order:          Little Endian
CPU(s):              16
On-line CPU(s) list: 0-15
Thread(s) per core:  2
Core(s) per socket:  4
Socket(s):           2
NUMA node(s):        1
Vendor ID:           ARM
Model:               2
Model name:          Cortex-A72
Stepping:            r0p2
BogoMIPS:            100.00
NUMA node0 CPU(s):   0-15

cat /sys/devices/system/cpu/present  -->  0-15
cat /sys/devices/system/cpu/possible -->  0-15

2) -smp 8,sockets=2,cores=4,threads=2,maxcpus=16
lscpu:
Architecture:        aarch64
Byte Order:          Little Endian
CPU(s):              8
On-line CPU(s) list: 0-7
Thread(s) per core:  2
Core(s) per socket:  4
Socket(s):           1
NUMA node(s):        1
Vendor ID:           ARM
Model:               2
Model name:          Cortex-A72
Stepping:            r0p2
BogoMIPS:            100.00
NUMA node0 CPU(s):   0-7

cat /sys/devices/system/cpu/present  -->  0-7
cat /sys/devices/system/cpu/possible -->  0-7

---

Changelogs:

v4->v5:
- drop the added -smp "expose=on|off" parameter and only describe topology
  for 6.2 and newer machines
- rebased the code on patch series [3] which has introduced some fix and
  improvement for smp parsing
- [3]: https://lore.kernel.org/qemu-devel/20210803080527.156556-1-wangyanan55@huawei.com/

v3->v4:
- add new -smp parameter "expose=on|off" for users to enable/disable the feature
- add stricter -smp cmdline parsing rules on "expose=on" case
- move build_pptt to generic aml-build.c
- add default cluster node in the cpu-map
- rebase on top of latest upstream master
- v3: https://lore.kernel.org/qemu-devel/20210516102900.28036-1-wangyanan55@huawei.com/

v2->v3:
- address comments from David, Philippe, and Andrew. Thanks!
- split some change into separate commits for ease of review
- adjust parsing rules of virt_smp_parse to be more strict
  (after discussion with Andrew)
- adjust author credit for the patches

v1->v2:
- Address Andrew Jones's comments
- Address Michael S. Tsirkin's comments

---

Andrew Jones (2):
  hw/arm/virt: Add cpu-map to device tree
  hw/acpi/aml-build: Generate PPTT table

Yanan Wang (3):
  hw/arm/virt: Only describe cpu topology to guest since virt 6.2
  device_tree: Add qemu_fdt_add_path
  hw/acpi/aml-build: Add Processor hierarchy node structure

 hw/acpi/aml-build.c          | 76 ++++++++++++++++++++++++++++++++++++
 hw/arm/virt-acpi-build.c     |  8 +++-
 hw/arm/virt.c                | 62 ++++++++++++++++++++++++-----
 include/hw/acpi/aml-build.h  |  7 ++++
 include/hw/arm/virt.h        |  4 +-
 include/sysemu/device_tree.h |  1 +
 softmmu/device_tree.c        | 44 ++++++++++++++++++++-
 7 files changed, 188 insertions(+), 14 deletions(-)

-- 
2.19.1


Re: [PATCH for-6.2 v5 0/5] hw/arm/virt: Introduce cpu topology support
Posted by Michael S. Tsirkin 2 years, 8 months ago
On Thu, Aug 05, 2021 at 08:39:16PM +0800, Yanan Wang wrote:
> Hi,
> 
> This is a new version (v5) of the series [1] that I posted to introduce
> support for generating cpu topology descriptions to virt machine guest.
> 
> Once the view of an accurate virtual cpu topology is provided to guest,
> with a well-designed vCPU pinning to the pCPU we may get a huge benefit,
> e.g., the scheduling performance improvement. See Dario Faggioli's
> research and the related performance tests in [2] for reference.
> 
> This patch series introduces cpu topology support for ARM platform.
> Both cpu-map in DT and ACPI PPTT table are introduced to store the
> topology information. And we only describe the topology information
> to 6.2 and newer virt machines, considering compatibility.

ACPI things:

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>

pls merge through ARM tree.

> [1] https://lore.kernel.org/qemu-devel/20210622093413.13360-1-wangyanan55@huawei.com/
> [2] https://kvmforum2020.sched.com/event/eE1y/virtual-topology-for-virtual-machines
> -friend-or-foe-dario-faggioli-suse
> 
> Some tests:
> 1) -smp 16,sockets=2,cores=4,threads=2,maxcpus=16
> lscpu:
> Architecture:        aarch64
> Byte Order:          Little Endian
> CPU(s):              16
> On-line CPU(s) list: 0-15
> Thread(s) per core:  2
> Core(s) per socket:  4
> Socket(s):           2
> NUMA node(s):        1
> Vendor ID:           ARM
> Model:               2
> Model name:          Cortex-A72
> Stepping:            r0p2
> BogoMIPS:            100.00
> NUMA node0 CPU(s):   0-15
> 
> cat /sys/devices/system/cpu/present  -->  0-15
> cat /sys/devices/system/cpu/possible -->  0-15
> 
> 2) -smp 8,sockets=2,cores=4,threads=2,maxcpus=16
> lscpu:
> Architecture:        aarch64
> Byte Order:          Little Endian
> CPU(s):              8
> On-line CPU(s) list: 0-7
> Thread(s) per core:  2
> Core(s) per socket:  4
> Socket(s):           1
> NUMA node(s):        1
> Vendor ID:           ARM
> Model:               2
> Model name:          Cortex-A72
> Stepping:            r0p2
> BogoMIPS:            100.00
> NUMA node0 CPU(s):   0-7
> 
> cat /sys/devices/system/cpu/present  -->  0-7
> cat /sys/devices/system/cpu/possible -->  0-7
> 
> ---
> 
> Changelogs:
> 
> v4->v5:
> - drop the added -smp "expose=on|off" parameter and only describe topology
>   for 6.2 and newer machines
> - rebased the code on patch series [3] which has introduced some fix and
>   improvement for smp parsing
> - [3]: https://lore.kernel.org/qemu-devel/20210803080527.156556-1-wangyanan55@huawei.com/
> 
> v3->v4:
> - add new -smp parameter "expose=on|off" for users to enable/disable the feature
> - add stricter -smp cmdline parsing rules on "expose=on" case
> - move build_pptt to generic aml-build.c
> - add default cluster node in the cpu-map
> - rebase on top of latest upstream master
> - v3: https://lore.kernel.org/qemu-devel/20210516102900.28036-1-wangyanan55@huawei.com/
> 
> v2->v3:
> - address comments from David, Philippe, and Andrew. Thanks!
> - split some change into separate commits for ease of review
> - adjust parsing rules of virt_smp_parse to be more strict
>   (after discussion with Andrew)
> - adjust author credit for the patches
> 
> v1->v2:
> - Address Andrew Jones's comments
> - Address Michael S. Tsirkin's comments
> 
> ---
> 
> Andrew Jones (2):
>   hw/arm/virt: Add cpu-map to device tree
>   hw/acpi/aml-build: Generate PPTT table
> 
> Yanan Wang (3):
>   hw/arm/virt: Only describe cpu topology to guest since virt 6.2
>   device_tree: Add qemu_fdt_add_path
>   hw/acpi/aml-build: Add Processor hierarchy node structure
> 
>  hw/acpi/aml-build.c          | 76 ++++++++++++++++++++++++++++++++++++
>  hw/arm/virt-acpi-build.c     |  8 +++-
>  hw/arm/virt.c                | 62 ++++++++++++++++++++++++-----
>  include/hw/acpi/aml-build.h  |  7 ++++
>  include/hw/arm/virt.h        |  4 +-
>  include/sysemu/device_tree.h |  1 +
>  softmmu/device_tree.c        | 44 ++++++++++++++++++++-
>  7 files changed, 188 insertions(+), 14 deletions(-)
> 
> -- 
> 2.19.1


Re: [PATCH for-6.2 v5 0/5] hw/arm/virt: Introduce cpu topology support
Posted by wangyanan (Y) 2 years, 8 months ago
On 2021/8/24 7:53, Michael S. Tsirkin wrote:
> On Thu, Aug 05, 2021 at 08:39:16PM +0800, Yanan Wang wrote:
>> Hi,
>>
>> This is a new version (v5) of the series [1] that I posted to introduce
>> support for generating cpu topology descriptions to virt machine guest.
>>
>> Once the view of an accurate virtual cpu topology is provided to guest,
>> with a well-designed vCPU pinning to the pCPU we may get a huge benefit,
>> e.g., the scheduling performance improvement. See Dario Faggioli's
>> research and the related performance tests in [2] for reference.
>>
>> This patch series introduces cpu topology support for ARM platform.
>> Both cpu-map in DT and ACPI PPTT table are introduced to store the
>> topology information. And we only describe the topology information
>> to 6.2 and newer virt machines, considering compatibility.
> ACPI things:
>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Thanks for the reviewing.
> pls merge through ARM tree.
Sure, got it.

Yanan
.
>
>> [1] https://lore.kernel.org/qemu-devel/20210622093413.13360-1-wangyanan55@huawei.com/
>> [2] https://kvmforum2020.sched.com/event/eE1y/virtual-topology-for-virtual-machines
>> -friend-or-foe-dario-faggioli-suse
>>
>> Some tests:
>> 1) -smp 16,sockets=2,cores=4,threads=2,maxcpus=16
>> lscpu:
>> Architecture:        aarch64
>> Byte Order:          Little Endian
>> CPU(s):              16
>> On-line CPU(s) list: 0-15
>> Thread(s) per core:  2
>> Core(s) per socket:  4
>> Socket(s):           2
>> NUMA node(s):        1
>> Vendor ID:           ARM
>> Model:               2
>> Model name:          Cortex-A72
>> Stepping:            r0p2
>> BogoMIPS:            100.00
>> NUMA node0 CPU(s):   0-15
>>
>> cat /sys/devices/system/cpu/present  -->  0-15
>> cat /sys/devices/system/cpu/possible -->  0-15
>>
>> 2) -smp 8,sockets=2,cores=4,threads=2,maxcpus=16
>> lscpu:
>> Architecture:        aarch64
>> Byte Order:          Little Endian
>> CPU(s):              8
>> On-line CPU(s) list: 0-7
>> Thread(s) per core:  2
>> Core(s) per socket:  4
>> Socket(s):           1
>> NUMA node(s):        1
>> Vendor ID:           ARM
>> Model:               2
>> Model name:          Cortex-A72
>> Stepping:            r0p2
>> BogoMIPS:            100.00
>> NUMA node0 CPU(s):   0-7
>>
>> cat /sys/devices/system/cpu/present  -->  0-7
>> cat /sys/devices/system/cpu/possible -->  0-7
>>
>> ---
>>
>> Changelogs:
>>
>> v4->v5:
>> - drop the added -smp "expose=on|off" parameter and only describe topology
>>    for 6.2 and newer machines
>> - rebased the code on patch series [3] which has introduced some fix and
>>    improvement for smp parsing
>> - [3]: https://lore.kernel.org/qemu-devel/20210803080527.156556-1-wangyanan55@huawei.com/
>>
>> v3->v4:
>> - add new -smp parameter "expose=on|off" for users to enable/disable the feature
>> - add stricter -smp cmdline parsing rules on "expose=on" case
>> - move build_pptt to generic aml-build.c
>> - add default cluster node in the cpu-map
>> - rebase on top of latest upstream master
>> - v3: https://lore.kernel.org/qemu-devel/20210516102900.28036-1-wangyanan55@huawei.com/
>>
>> v2->v3:
>> - address comments from David, Philippe, and Andrew. Thanks!
>> - split some change into separate commits for ease of review
>> - adjust parsing rules of virt_smp_parse to be more strict
>>    (after discussion with Andrew)
>> - adjust author credit for the patches
>>
>> v1->v2:
>> - Address Andrew Jones's comments
>> - Address Michael S. Tsirkin's comments
>>
>> ---
>>
>> Andrew Jones (2):
>>    hw/arm/virt: Add cpu-map to device tree
>>    hw/acpi/aml-build: Generate PPTT table
>>
>> Yanan Wang (3):
>>    hw/arm/virt: Only describe cpu topology to guest since virt 6.2
>>    device_tree: Add qemu_fdt_add_path
>>    hw/acpi/aml-build: Add Processor hierarchy node structure
>>
>>   hw/acpi/aml-build.c          | 76 ++++++++++++++++++++++++++++++++++++
>>   hw/arm/virt-acpi-build.c     |  8 +++-
>>   hw/arm/virt.c                | 62 ++++++++++++++++++++++++-----
>>   include/hw/acpi/aml-build.h  |  7 ++++
>>   include/hw/arm/virt.h        |  4 +-
>>   include/sysemu/device_tree.h |  1 +
>>   softmmu/device_tree.c        | 44 ++++++++++++++++++++-
>>   7 files changed, 188 insertions(+), 14 deletions(-)
>>
>> -- 
>> 2.19.1
>
> .