1
Last few changes before rc0: a few bug fixes, but mostly
1
This one's almost all docs fixes.
2
docs stuff.
3
2
3
thanks
4
-- PMM
4
-- PMM
5
5
6
The following changes since commit a97fca4ceb9d9b10aa8b582e817a5ee6c42ffbaf:
6
The following changes since commit ba54a7e6b86884e43bed2d2f5a79c719059652a8:
7
7
8
Merge remote-tracking branch 'remotes/mst/tags/for_upstream3' into staging (2021-07-16 16:34:42 +0100)
8
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging (2024-11-26 14:06:40 +0000)
9
9
10
are available in the Git repository at:
10
are available in the Git repository at:
11
11
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210718
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20241126
13
13
14
for you to fetch changes up to 8fe612a183dec4c63afdc57537079bc742d024ca:
14
for you to fetch changes up to d8790ead55a2ef1e65332ebec63ae3c5db598942:
15
15
16
target/arm: Remove duplicate 'plus1' function from Neon and SVE decode (2021-07-18 10:59:47 +0100)
16
docs/system/arm/aspeed: add missing model supermicrox11spi-bmc (2024-11-26 16:22:38 +0000)
17
17
18
----------------------------------------------------------------
18
----------------------------------------------------------------
19
target-arm queue:
19
target-arm queue:
20
* Remove duplicate 'plus1' function from Neon and SVE decode
20
* target/arm/tcg/cpu32.c: swap ATCM and BTCM register names
21
* Fix offsets for TTBCR for big-endian hosts
21
* docs/system/arm: Fix broken links and missing feature names
22
* docs: fix copyright date
23
* docs: add license/version info to HTML footers
24
* docs: add an About section
25
* docs: document some more arm boards
26
22
27
----------------------------------------------------------------
23
----------------------------------------------------------------
28
Peter Maydell (11):
24
Michael Tokarev (1):
29
docs: Fix documentation Copyright date
25
target/arm/tcg/cpu32.c: swap ATCM and BTCM register names
30
docs: Stop calling the top level subsections of our manual 'manuals'
31
docs: Remove "Contents:" lines from top-level subsections
32
docs: Move deprecation, build and license info out of system/
33
docs: Add some actual About text to about/index.rst
34
docs: Add license note to the HTML page footer
35
docs: Add QEMU version information to HTML footer
36
docs: Add skeletal documentation of cubieboard
37
docs: Add skeletal documentation of the emcraft-sf2
38
docs: Add skeletal documentation of highbank and midway
39
target/arm: Remove duplicate 'plus1' function from Neon and SVE decode
40
26
41
Richard Henderson (1):
27
Pierrick Bouvier (8):
42
target/arm: Fix offsets for TTBCR
28
docs/system/arm/emulation: mention armv9
29
docs/system/arm/emulation: fix typo in feature name
30
docs/system/arm/emulation: add FEAT_SSBS2
31
target/arm/tcg/: fix typo in FEAT name
32
docs/system/arm/: add FEAT_MTE_ASYNC
33
docs/system/arm/: add FEAT_DoubleLock
34
docs/system/arm/fby35: update link to product page
35
docs/system/arm/aspeed: add missing model supermicrox11spi-bmc
43
36
44
docs/_templates/footer.html | 14 ++++++++++++++
37
docs/system/arm/aspeed.rst | 7 ++++---
45
docs/{system => about}/build-platforms.rst | 0
38
docs/system/arm/emulation.rst | 11 +++++++----
46
docs/{system => about}/deprecated.rst | 0
39
docs/system/arm/fby35.rst | 2 +-
47
docs/about/index.rst | 27 +++++++++++++++++++++++++++
40
target/arm/tcg/cpu32.c | 6 +++---
48
docs/{system => about}/license.rst | 0
41
4 files changed, 15 insertions(+), 11 deletions(-)
49
docs/{system => about}/removed-features.rst | 0
50
docs/conf.py | 2 +-
51
docs/devel/index.rst | 7 +------
52
docs/index.rst | 1 +
53
docs/interop/index.rst | 9 ++-------
54
docs/meson.build | 3 ++-
55
docs/specs/index.rst | 7 ++-----
56
docs/system/arm/cubieboard.rst | 16 ++++++++++++++++
57
docs/system/arm/emcraft-sf2.rst | 15 +++++++++++++++
58
docs/system/arm/highbank.rst | 19 +++++++++++++++++++
59
docs/system/index.rst | 11 +----------
60
docs/system/target-arm.rst | 3 +++
61
docs/tools/index.rst | 7 ++-----
62
docs/user/index.rst | 7 +------
63
target/arm/neon-ls.decode | 4 ++--
64
target/arm/neon-shared.decode | 2 +-
65
target/arm/sve.decode | 2 +-
66
target/arm/helper.c | 11 +++++++----
67
target/arm/translate-neon.c | 5 -----
68
target/arm/translate-sve.c | 5 -----
69
MAINTAINERS | 4 ++++
70
26 files changed, 122 insertions(+), 59 deletions(-)
71
create mode 100644 docs/_templates/footer.html
72
rename docs/{system => about}/build-platforms.rst (100%)
73
rename docs/{system => about}/deprecated.rst (100%)
74
create mode 100644 docs/about/index.rst
75
rename docs/{system => about}/license.rst (100%)
76
rename docs/{system => about}/removed-features.rst (100%)
77
create mode 100644 docs/system/arm/cubieboard.rst
78
create mode 100644 docs/system/arm/emcraft-sf2.rst
79
create mode 100644 docs/system/arm/highbank.rst
80
diff view generated by jsdifflib
1
The Neon and SVE decoders use private 'plus1' functions to implement
1
From: Michael Tokarev <mjt@tls.msk.ru>
2
"add one" for the !function decoder syntax. We have a generic
3
"plus_1" function in translate.h, so use that instead.
4
2
3
According to Cortex-R5 r1p2 manual, register with opcode2=0 is
4
BTCM and with opcode2=1 is ATCM, - exactly the opposite from how
5
qemu labels them. Just swap the labels to avoid confusion, -
6
both registers are implemented as always-zero.
7
8
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-id: 20241121171602.3273252-1-mjt@tls.msk.ru
5
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
7
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
8
Message-id: 20210715095341.701-1-peter.maydell@linaro.org
9
---
12
---
10
target/arm/neon-ls.decode | 4 ++--
13
target/arm/tcg/cpu32.c | 4 ++--
11
target/arm/neon-shared.decode | 2 +-
14
1 file changed, 2 insertions(+), 2 deletions(-)
12
target/arm/sve.decode | 2 +-
13
target/arm/translate-neon.c | 5 -----
14
target/arm/translate-sve.c | 5 -----
15
5 files changed, 4 insertions(+), 14 deletions(-)
16
15
17
diff --git a/target/arm/neon-ls.decode b/target/arm/neon-ls.decode
16
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
18
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
19
--- a/target/arm/neon-ls.decode
18
--- a/target/arm/tcg/cpu32.c
20
+++ b/target/arm/neon-ls.decode
19
+++ b/target/arm/tcg/cpu32.c
21
@@ -XXX,XX +XXX,XX @@ VLD_all_lanes 1111 0100 1 . 1 0 rn:4 .... 11 n:2 size:2 t:1 a:1 rm:4 \
20
@@ -XXX,XX +XXX,XX @@ static void cortex_a15_initfn(Object *obj)
22
vd=%vd_dp
21
23
22
static const ARMCPRegInfo cortexr5_cp_reginfo[] = {
24
# Neon load/store single structure to one lane
23
/* Dummy the TCM region regs for the moment */
25
-%imm1_5_p1 5:1 !function=plus1
24
- { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0,
26
-%imm1_6_p1 6:1 !function=plus1
25
+ { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0,
27
+%imm1_5_p1 5:1 !function=plus_1
26
.access = PL1_RW, .type = ARM_CP_CONST },
28
+%imm1_6_p1 6:1 !function=plus_1
27
- { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1,
29
28
+ { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1,
30
VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 00 n:2 reg_idx:3 align:1 rm:4 \
29
.access = PL1_RW, .type = ARM_CP_CONST },
31
vd=%vd_dp size=0 stride=1
30
{ .name = "DCACHE_INVAL", .cp = 15, .opc1 = 0, .crn = 15, .crm = 5,
32
diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode
31
.opc2 = 0, .access = PL1_W, .type = ARM_CP_NOP },
33
index XXXXXXX..XXXXXXX 100644
34
--- a/target/arm/neon-shared.decode
35
+++ b/target/arm/neon-shared.decode
36
@@ -XXX,XX +XXX,XX @@
37
# which is 0 for fp16 and 1 for fp32 into a MO_* constant.
38
# (Note that this is the reverse of the sense of the 1-bit size
39
# field in the 3same_fp Neon insns.)
40
-%vcadd_size 20:1 !function=plus1
41
+%vcadd_size 20:1 !function=plus_1
42
43
VCMLA 1111 110 rot:2 . 1 . .... .... 1000 . q:1 . 0 .... \
44
vm=%vm_dp vn=%vn_dp vd=%vd_dp size=%vcadd_size
45
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
46
index XXXXXXX..XXXXXXX 100644
47
--- a/target/arm/sve.decode
48
+++ b/target/arm/sve.decode
49
@@ -XXX,XX +XXX,XX @@
50
###########################################################################
51
# Named fields. These are primarily for disjoint fields.
52
53
-%imm4_16_p1 16:4 !function=plus1
54
+%imm4_16_p1 16:4 !function=plus_1
55
%imm6_22_5 22:1 5:5
56
%imm7_22_16 22:2 16:5
57
%imm8_16_10 16:5 10:3
58
diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c
59
index XXXXXXX..XXXXXXX 100644
60
--- a/target/arm/translate-neon.c
61
+++ b/target/arm/translate-neon.c
62
@@ -XXX,XX +XXX,XX @@
63
#include "translate.h"
64
#include "translate-a32.h"
65
66
-static inline int plus1(DisasContext *s, int x)
67
-{
68
- return x + 1;
69
-}
70
-
71
static inline int neon_3same_fp_size(DisasContext *s, int x)
72
{
73
/* Convert 0==fp32, 1==fp16 into a MO_* value */
74
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
75
index XXXXXXX..XXXXXXX 100644
76
--- a/target/arm/translate-sve.c
77
+++ b/target/arm/translate-sve.c
78
@@ -XXX,XX +XXX,XX @@ static int tszimm_shl(DisasContext *s, int x)
79
return x - (8 << tszimm_esz(s, x));
80
}
81
82
-static inline int plus1(DisasContext *s, int x)
83
-{
84
- return x + 1;
85
-}
86
-
87
/* The SH bit is in bit 8. Extract the low 8 and shift. */
88
static inline int expand_imm_sh8s(DisasContext *s, int x)
89
{
90
--
32
--
91
2.20.1
33
2.34.1
92
93
diff view generated by jsdifflib
1
Add skeletal documentation for the highbank and midway machines.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Message-id: 20241122225049.1617774-2-pierrick.bouvier@linaro.org
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-id: 20210713142226.19155-4-peter.maydell@linaro.org
7
---
7
---
8
docs/system/arm/highbank.rst | 19 +++++++++++++++++++
8
docs/system/arm/emulation.rst | 6 +++---
9
docs/system/target-arm.rst | 1 +
9
1 file changed, 3 insertions(+), 3 deletions(-)
10
MAINTAINERS | 1 +
11
3 files changed, 21 insertions(+)
12
create mode 100644 docs/system/arm/highbank.rst
13
10
14
diff --git a/docs/system/arm/highbank.rst b/docs/system/arm/highbank.rst
11
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
15
new file mode 100644
12
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX
13
--- a/docs/system/arm/emulation.rst
17
--- /dev/null
14
+++ b/docs/system/arm/emulation.rst
18
+++ b/docs/system/arm/highbank.rst
19
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@
20
+Calxeda Highbank and Midway (``highbank``, ``midway``)
16
A-profile CPU architecture support
21
+======================================================
17
==================================
22
+
18
23
+``highbank`` is a model of the Calxeda Highbank (ECX-1000) system,
19
-QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7 and
24
+which has four Cortex-A9 cores.
20
-Armv8 versions of the A-profile architecture. It also has support for
25
+
21
+QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7,
26
+``midway`` is a model of the Calxeda Midway (ECX-2000) system,
22
+Armv8 and Armv9 versions of the A-profile architecture. It also has support for
27
+which has four Cortex-A15 cores.
23
the following architecture extensions:
28
+
24
29
+Emulated devices:
25
- FEAT_AA32BF16 (AArch32 BFloat16 instructions)
30
+
26
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
31
+- L2x0 cache controller
27
- FEAT_XNX (Translation table stage 2 Unprivileged Execute-never)
32
+- SP804 dual timer
28
33
+- PL011 UART
29
For information on the specifics of these extensions, please refer
34
+- PL061 GPIOs
30
-to the `Armv8-A Arm Architecture Reference Manual
35
+- PL031 RTC
31
+to the `Arm Architecture Reference Manual for A-profile architecture
36
+- PL022 synchronous serial port controller
32
<https://developer.arm.com/documentation/ddi0487/latest>`_.
37
+- AHCI
33
38
+- XGMAC ethernet controllers
34
When a specific named CPU is being emulated, only those features which
39
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
40
index XXXXXXX..XXXXXXX 100644
41
--- a/docs/system/target-arm.rst
42
+++ b/docs/system/target-arm.rst
43
@@ -XXX,XX +XXX,XX @@ undocumented; you can get a complete list by running
44
arm/digic
45
arm/cubieboard
46
arm/emcraft-sf2
47
+ arm/highbank
48
arm/musicpal
49
arm/gumstix
50
arm/nrf
51
diff --git a/MAINTAINERS b/MAINTAINERS
52
index XXXXXXX..XXXXXXX 100644
53
--- a/MAINTAINERS
54
+++ b/MAINTAINERS
55
@@ -XXX,XX +XXX,XX @@ L: qemu-arm@nongnu.org
56
S: Odd Fixes
57
F: hw/arm/highbank.c
58
F: hw/net/xgmac.c
59
+F: docs/system/arm/highbank.rst
60
61
Canon DIGIC
62
M: Antony Pavlov <antonynpavlov@gmail.com>
63
--
35
--
64
2.20.1
36
2.34.1
65
66
diff view generated by jsdifflib
1
Add skeletal documentation of the emcraft-sf2 machine.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Message-id: 20241122225049.1617774-3-pierrick.bouvier@linaro.org
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-id: 20210713142226.19155-3-peter.maydell@linaro.org
7
---
7
---
8
docs/system/arm/emcraft-sf2.rst | 15 +++++++++++++++
8
docs/system/arm/emulation.rst | 2 +-
9
docs/system/target-arm.rst | 1 +
9
1 file changed, 1 insertion(+), 1 deletion(-)
10
MAINTAINERS | 1 +
11
3 files changed, 17 insertions(+)
12
create mode 100644 docs/system/arm/emcraft-sf2.rst
13
10
14
diff --git a/docs/system/arm/emcraft-sf2.rst b/docs/system/arm/emcraft-sf2.rst
11
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
15
new file mode 100644
16
index XXXXXXX..XXXXXXX
17
--- /dev/null
18
+++ b/docs/system/arm/emcraft-sf2.rst
19
@@ -XXX,XX +XXX,XX @@
20
+Emcraft SmartFusion2 SOM kit (``emcraft-sf2``)
21
+==============================================
22
+
23
+The ``emcraft-sf2`` board emulates the SmartFusion2 SOM kit from
24
+Emcraft (M2S010). This is a System-on-Module from EmCraft systems,
25
+based on the SmartFusion2 SoC FPGA from Microsemi Corporation.
26
+The SoC is based on a Cortex-M4 processor.
27
+
28
+Emulated devices:
29
+
30
+- System timer
31
+- System registers
32
+- SPI controller
33
+- UART
34
+- EMAC
35
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
36
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
37
--- a/docs/system/target-arm.rst
13
--- a/docs/system/arm/emulation.rst
38
+++ b/docs/system/target-arm.rst
14
+++ b/docs/system/arm/emulation.rst
39
@@ -XXX,XX +XXX,XX @@ undocumented; you can get a complete list by running
15
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
40
arm/sabrelite
16
- FEAT_LSE2 (Large System Extensions v2)
41
arm/digic
17
- FEAT_LVA (Large Virtual Address space)
42
arm/cubieboard
18
- FEAT_MixedEnd (Mixed-endian support)
43
+ arm/emcraft-sf2
19
-- FEAT_MixdEndEL0 (Mixed-endian support at EL0)
44
arm/musicpal
20
+- FEAT_MixedEndEL0 (Mixed-endian support at EL0)
45
arm/gumstix
21
- FEAT_MOPS (Standardization of memory operations)
46
arm/nrf
22
- FEAT_MTE (Memory Tagging Extension)
47
diff --git a/MAINTAINERS b/MAINTAINERS
23
- FEAT_MTE2 (Memory Tagging Extension)
48
index XXXXXXX..XXXXXXX 100644
49
--- a/MAINTAINERS
50
+++ b/MAINTAINERS
51
@@ -XXX,XX +XXX,XX @@ M: Peter Maydell <peter.maydell@linaro.org>
52
L: qemu-arm@nongnu.org
53
S: Maintained
54
F: hw/arm/msf2-som.c
55
+F: docs/system/arm/emcraft-sf2.rst
56
57
ASPEED BMCs
58
M: Cédric Le Goater <clg@kaod.org>
59
--
24
--
60
2.20.1
25
2.34.1
61
62
diff view generated by jsdifflib
1
Add skeletal documentation of the cubieboard machine.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
We implemented this at the same times as FEAT_SSBS, but forgot
4
to list it in the documentation.
5
6
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Message-id: 20241122225049.1617774-4-pierrick.bouvier@linaro.org
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
[PMM: improve commit message]
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-id: 20210713142226.19155-2-peter.maydell@linaro.org
7
---
12
---
8
docs/system/arm/cubieboard.rst | 16 ++++++++++++++++
13
docs/system/arm/emulation.rst | 1 +
9
docs/system/target-arm.rst | 1 +
14
1 file changed, 1 insertion(+)
10
MAINTAINERS | 1 +
11
3 files changed, 18 insertions(+)
12
create mode 100644 docs/system/arm/cubieboard.rst
13
15
14
diff --git a/docs/system/arm/cubieboard.rst b/docs/system/arm/cubieboard.rst
16
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
15
new file mode 100644
16
index XXXXXXX..XXXXXXX
17
--- /dev/null
18
+++ b/docs/system/arm/cubieboard.rst
19
@@ -XXX,XX +XXX,XX @@
20
+Cubietech Cubieboard (``cubieboard``)
21
+=====================================
22
+
23
+The ``cubieboard`` model emulates the Cubietech Cubieboard,
24
+which is a Cortex-A8 based single-board computer using
25
+the AllWinner A10 SoC.
26
+
27
+Emulated devices:
28
+
29
+- Timer
30
+- UART
31
+- RTC
32
+- EMAC
33
+- SDHCI
34
+- USB controller
35
+- SATA controller
36
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
37
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
38
--- a/docs/system/target-arm.rst
18
--- a/docs/system/arm/emulation.rst
39
+++ b/docs/system/target-arm.rst
19
+++ b/docs/system/arm/emulation.rst
40
@@ -XXX,XX +XXX,XX @@ undocumented; you can get a complete list by running
20
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
41
arm/aspeed
21
- FEAT_SVE2 (Scalable Vector Extension version 2)
42
arm/sabrelite
22
- FEAT_SPECRES (Speculation restriction instructions)
43
arm/digic
23
- FEAT_SSBS (Speculative Store Bypass Safe)
44
+ arm/cubieboard
24
+- FEAT_SSBS2 (MRS and MSR instructions for SSBS version 2)
45
arm/musicpal
25
- FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1)
46
arm/gumstix
26
- FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1)
47
arm/nrf
27
- FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1)
48
diff --git a/MAINTAINERS b/MAINTAINERS
49
index XXXXXXX..XXXXXXX 100644
50
--- a/MAINTAINERS
51
+++ b/MAINTAINERS
52
@@ -XXX,XX +XXX,XX @@ S: Odd Fixes
53
F: hw/*/allwinner*
54
F: include/hw/*/allwinner*
55
F: hw/arm/cubieboard.c
56
+F: docs/system/arm/cubieboard.rst
57
58
Allwinner-h3
59
M: Niek Linnenbank <nieklinnenbank@gmail.com>
60
--
28
--
61
2.20.1
29
2.34.1
62
63
diff view generated by jsdifflib
1
Add a line to the HTML document footer mentioning the QEMU version.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
The version information is already provided in very faint text below
3
the QEMU logo in the sidebar, but that is rather inconspicious, so
4
repeating it in the footer seems useful.
5
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
6
Message-id: 20241122225049.1617774-5-pierrick.bouvier@linaro.org
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Acked-by: Markus Armbruster <armbru@redhat.com>
8
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
9
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
10
Message-id: 20210705095547.15790-8-peter.maydell@linaro.org
11
---
8
---
12
docs/_templates/footer.html | 2 ++
9
target/arm/tcg/cpu32.c | 2 +-
13
1 file changed, 2 insertions(+)
10
1 file changed, 1 insertion(+), 1 deletion(-)
14
11
15
diff --git a/docs/_templates/footer.html b/docs/_templates/footer.html
12
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
16
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
17
--- a/docs/_templates/footer.html
14
--- a/target/arm/tcg/cpu32.c
18
+++ b/docs/_templates/footer.html
15
+++ b/target/arm/tcg/cpu32.c
19
@@ -XXX,XX +XXX,XX @@
16
@@ -XXX,XX +XXX,XX @@ void aa32_max_features(ARMCPU *cpu)
20
<!-- Empty para to force a blank line after "Built with Sphinx ..." -->
17
cpu->isar.id_mmfr5 = t;
21
<p></p>
18
22
19
t = cpu->isar.id_pfr0;
23
+<p>This documentation is for QEMU version {{ version }}.</p>
20
- t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CVS2 */
24
+
21
+ t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CSV2 */
25
{% trans path=pathto('about/license') %}
22
t = FIELD_DP32(t, ID_PFR0, DIT, 1); /* FEAT_DIT */
26
<p><a href="{{ path }}">QEMU and this manual are released under the
23
t = FIELD_DP32(t, ID_PFR0, RAS, 1); /* FEAT_RAS */
27
GNU General Public License, version 2.</a></p>
24
cpu->isar.id_pfr0 = t;
28
--
25
--
29
2.20.1
26
2.34.1
30
27
31
28
diff view generated by jsdifflib
1
The standard Sphinx/RTD HTML page footer gives a copyright line
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
(based on the 'copyright' variable set in conf.py) and a line "Built
3
with Sphinx using a theme provided by Read the Docs" (which can be
4
disabled via the html_show_sphinx variable, but we leave it enabled).
5
As a free software project, we'd like to also mention the license
6
QEMU and its manual are released under.
7
2
8
Add a template footer.html which defines the 'extrafooter' block that
3
We already implement FEAT_MTE_ASYNC; we just forgot to list it
9
the RtD theme provides for this purpose. The new line of text will
4
in the documentation.
10
go below the existing copyright and sphinx-acknowledgement lines.
11
(Unfortunately the RTD footer template does not permit putting it
12
after the copyright but before the sphinx-acknowledgement.)
13
5
14
We use the templating functionality to make the new text also be a
6
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
15
hyperlink to the about/license.html page of the manual.
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Message-id: 20241122225049.1617774-6-pierrick.bouvier@linaro.org
9
[PMM: expand commit message]
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
12
docs/system/arm/emulation.rst | 1 +
13
1 file changed, 1 insertion(+)
16
14
17
Unlike rst files, HTML template files are not reported to our depfile
15
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
18
plugin, so we maintain a manual list in meson.build. New template
19
files should be rare, so not being able to auto-generate the
20
dependency info is not too awkward.
21
22
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
23
Acked-by: Markus Armbruster <armbru@redhat.com>
24
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
25
Message-id: 20210705095547.15790-7-peter.maydell@linaro.org
26
---
27
docs/_templates/footer.html | 12 ++++++++++++
28
docs/meson.build | 3 ++-
29
MAINTAINERS | 1 +
30
3 files changed, 15 insertions(+), 1 deletion(-)
31
create mode 100644 docs/_templates/footer.html
32
33
diff --git a/docs/_templates/footer.html b/docs/_templates/footer.html
34
new file mode 100644
35
index XXXXXXX..XXXXXXX
36
--- /dev/null
37
+++ b/docs/_templates/footer.html
38
@@ -XXX,XX +XXX,XX @@
39
+{% extends "!footer.html" %}
40
+{% block extrafooter %}
41
+
42
+<!-- Empty para to force a blank line after "Built with Sphinx ..." -->
43
+<p></p>
44
+
45
+{% trans path=pathto('about/license') %}
46
+<p><a href="{{ path }}">QEMU and this manual are released under the
47
+GNU General Public License, version 2.</a></p>
48
+{% endtrans %}
49
+{{ super() }}
50
+{% endblock %}
51
diff --git a/docs/meson.build b/docs/meson.build
52
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
53
--- a/docs/meson.build
17
--- a/docs/system/arm/emulation.rst
54
+++ b/docs/meson.build
18
+++ b/docs/system/arm/emulation.rst
55
@@ -XXX,XX +XXX,XX @@ if build_docs
19
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
56
meson.source_root() / 'docs/sphinx/qapidoc.py',
20
- FEAT_MTE2 (Memory Tagging Extension)
57
meson.source_root() / 'docs/sphinx/qmp_lexer.py',
21
- FEAT_MTE3 (MTE Asymmetric Fault Handling)
58
qapi_gen_depends ]
22
- FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults)
59
+ sphinx_template_files = [ meson.source_root() / 'docs/_templates/footer.html' ]
23
+- FEAT_MTE_ASYNC (Asynchronous reporting of Tag Check Fault)
60
24
- FEAT_NMI (Non-maskable Interrupt)
61
have_ga = have_tools and config_host.has_key('CONFIG_GUEST_AGENT')
25
- FEAT_NV (Nested Virtualization)
62
26
- FEAT_NV2 (Enhanced nested virtualization support)
63
@@ -XXX,XX +XXX,XX @@ if build_docs
64
output: 'docs.stamp',
65
input: files('conf.py'),
66
depfile: 'docs.d',
67
- depend_files: sphinx_extn_depends,
68
+ depend_files: [ sphinx_extn_depends, sphinx_template_files ],
69
command: [SPHINX_ARGS, '-Ddepfile=@DEPFILE@',
70
'-Ddepfile_stamp=@OUTPUT0@',
71
'-b', 'html', '-d', private_dir,
72
diff --git a/MAINTAINERS b/MAINTAINERS
73
index XXXXXXX..XXXXXXX 100644
74
--- a/MAINTAINERS
75
+++ b/MAINTAINERS
76
@@ -XXX,XX +XXX,XX @@ S: Maintained
77
F: docs/conf.py
78
F: docs/*/conf.py
79
F: docs/sphinx/
80
+F: docs/_templates/
81
82
Miscellaneous
83
-------------
84
--
27
--
85
2.20.1
28
2.34.1
86
87
diff view generated by jsdifflib
1
From: Richard Henderson <richard.henderson@linaro.org>
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
The functions vmsa_ttbcr_write and vmsa_ttbcr_raw_write expect
3
We already implement FEAT_DoubleLock (see commit f94a6df5dd6a7) when
4
the offset to be for the complete TCR structure, not the offset
4
the ID registers call for it. This feature is actually one that must
5
to the low 32-bits of a uint64_t. Using offsetoflow32 in this
5
*not* be implemented in v9.0, but since our documentation lists
6
case breaks big-endian hosts.
6
everything we can emulate, we should include FEAT_DoubleLock in the
7
list.
7
8
8
For TTBCR2, we do want the high 32-bits of a uint64_t.
9
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
9
Use cp15.tcr_el[*].raw_tcr as the offsetofhigh32 argument to
10
Message-id: 20241122225049.1617774-7-pierrick.bouvier@linaro.org
10
clarify this.
11
12
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/187
13
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14
Message-id: 20210709230621.938821-2-richard.henderson@linaro.org
15
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
[PMM: expand commit message]
16
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
17
---
14
---
18
target/arm/helper.c | 11 +++++++----
15
docs/system/arm/emulation.rst | 1 +
19
1 file changed, 7 insertions(+), 4 deletions(-)
16
1 file changed, 1 insertion(+)
20
17
21
diff --git a/target/arm/helper.c b/target/arm/helper.c
18
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
22
index XXXXXXX..XXXXXXX 100644
19
index XXXXXXX..XXXXXXX 100644
23
--- a/target/arm/helper.c
20
--- a/docs/system/arm/emulation.rst
24
+++ b/target/arm/helper.c
21
+++ b/docs/system/arm/emulation.rst
25
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo vmsa_cp_reginfo[] = {
22
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
26
.access = PL1_RW, .accessfn = access_tvm_trvm,
23
- FEAT_CSV3 (Cache speculation variant 3)
27
.type = ARM_CP_ALIAS, .writefn = vmsa_ttbcr_write,
24
- FEAT_DGH (Data gathering hint)
28
.raw_writefn = vmsa_ttbcr_raw_write,
25
- FEAT_DIT (Data Independent Timing instructions)
29
- .bank_fieldoffsets = { offsetoflow32(CPUARMState, cp15.tcr_el[3]),
26
+- FEAT_DoubleLock (Double Lock)
30
- offsetoflow32(CPUARMState, cp15.tcr_el[1])} },
27
- FEAT_DPB (DC CVAP instruction)
31
+ /* No offsetoflow32 -- pass the entire TCR to writefn/raw_writefn. */
28
- FEAT_DPB2 (DC CVADP instruction)
32
+ .bank_fieldoffsets = { offsetof(CPUARMState, cp15.tcr_el[3]),
29
- FEAT_Debugv8p1 (Debug with VHE)
33
+ offsetof(CPUARMState, cp15.tcr_el[1])} },
34
REGINFO_SENTINEL
35
};
36
37
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo ttbcr2_reginfo = {
38
.name = "TTBCR2", .cp = 15, .opc1 = 0, .crn = 2, .crm = 0, .opc2 = 3,
39
.access = PL1_RW, .accessfn = access_tvm_trvm,
40
.type = ARM_CP_ALIAS,
41
- .bank_fieldoffsets = { offsetofhigh32(CPUARMState, cp15.tcr_el[3]),
42
- offsetofhigh32(CPUARMState, cp15.tcr_el[1]) },
43
+ .bank_fieldoffsets = {
44
+ offsetofhigh32(CPUARMState, cp15.tcr_el[3].raw_tcr),
45
+ offsetofhigh32(CPUARMState, cp15.tcr_el[1].raw_tcr),
46
+ },
47
};
48
49
static void omap_ticonfig_write(CPUARMState *env, const ARMCPRegInfo *ri,
50
--
30
--
51
2.20.1
31
2.34.1
52
53
diff view generated by jsdifflib
1
In commit 6d8980a38fa we updated the copyright string we present to
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
the user in -version output, About dialogs, etc, but we forgot that
3
the Sphinx manuals have a separate copyright string setting. Update
4
that one too.
5
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
6
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Message-id: 20241122225049.1617774-8-pierrick.bouvier@linaro.org
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Acked-by: Markus Armbruster <armbru@redhat.com>
8
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
9
Message-id: 20210705095547.15790-2-peter.maydell@linaro.org
10
---
9
---
11
docs/conf.py | 2 +-
10
docs/system/arm/fby35.rst | 2 +-
12
1 file changed, 1 insertion(+), 1 deletion(-)
11
1 file changed, 1 insertion(+), 1 deletion(-)
13
12
14
diff --git a/docs/conf.py b/docs/conf.py
13
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
15
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
16
--- a/docs/conf.py
15
--- a/docs/system/arm/fby35.rst
17
+++ b/docs/conf.py
16
+++ b/docs/system/arm/fby35.rst
18
@@ -XXX,XX +XXX,XX @@
17
@@ -XXX,XX +XXX,XX @@ include various compute accelerators (video, inferencing, etc). At the moment,
19
18
only the first server slot's BIC is included.
20
# General information about the project.
19
21
project = u'QEMU'
20
Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
22
-copyright = u'2020, The QEMU Project Developers'
21
-can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
23
+copyright = u'2021, The QEMU Project Developers'
22
+can be fit into a chassis. See `here <https://www.opencompute.org/products-chiplets/237/wiwynn-yosemite-v3-server>`__
24
author = u'The QEMU Project Developers'
23
for an example.
25
24
26
# The version info for the project you're documenting, acts as replacement for
25
In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
27
--
26
--
28
2.20.1
27
2.34.1
29
28
30
29
diff view generated by jsdifflib
Deleted patch
1
We merged our previous multiple-manual setup into a single Sphinx
2
manual, but we left some text in the various index.rst lines that
3
still calls the top level subsections separate 'manuals'. Update
4
them to talk about "this section of the manual" instead, and remove
5
now-obsolete comments about how the index.rst files are the "top
6
level page for the 'foo' manual".
7
1
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Acked-by: Markus Armbruster <armbru@redhat.com>
10
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
11
Message-id: 20210705095547.15790-3-peter.maydell@linaro.org
12
---
13
docs/devel/index.rst | 5 +----
14
docs/interop/index.rst | 7 ++-----
15
docs/specs/index.rst | 5 ++---
16
docs/system/index.rst | 5 +----
17
docs/tools/index.rst | 5 ++---
18
docs/user/index.rst | 5 +----
19
6 files changed, 9 insertions(+), 23 deletions(-)
20
21
diff --git a/docs/devel/index.rst b/docs/devel/index.rst
22
index XXXXXXX..XXXXXXX 100644
23
--- a/docs/devel/index.rst
24
+++ b/docs/devel/index.rst
25
@@ -XXX,XX +XXX,XX @@
26
-.. This is the top level page for the 'devel' manual.
27
-
28
-
29
Developer Information
30
=====================
31
32
-This manual documents various parts of the internals of QEMU.
33
+This section of the manual documents various parts of the internals of QEMU.
34
You only need to read it if you are interested in reading or
35
modifying QEMU's source code.
36
37
diff --git a/docs/interop/index.rst b/docs/interop/index.rst
38
index XXXXXXX..XXXXXXX 100644
39
--- a/docs/interop/index.rst
40
+++ b/docs/interop/index.rst
41
@@ -XXX,XX +XXX,XX @@
42
-.. This is the top level page for the 'interop' manual.
43
-
44
-
45
System Emulation Management and Interoperability
46
================================================
47
48
-This manual contains documents and specifications that are useful
49
-for making QEMU interoperate with other software.
50
+This section of the manual contains documents and specifications that
51
+are useful for making QEMU interoperate with other software.
52
53
Contents:
54
55
diff --git a/docs/specs/index.rst b/docs/specs/index.rst
56
index XXXXXXX..XXXXXXX 100644
57
--- a/docs/specs/index.rst
58
+++ b/docs/specs/index.rst
59
@@ -XXX,XX +XXX,XX @@
60
-.. This is the top level page for the 'specs' manual
61
-
62
-
63
System Emulation Guest Hardware Specifications
64
==============================================
65
66
+This section of the manual contains specifications of
67
+guest hardware that is specific to QEMU.
68
69
Contents:
70
71
diff --git a/docs/system/index.rst b/docs/system/index.rst
72
index XXXXXXX..XXXXXXX 100644
73
--- a/docs/system/index.rst
74
+++ b/docs/system/index.rst
75
@@ -XXX,XX +XXX,XX @@
76
-.. This is the top level page for the 'system' manual.
77
-
78
-
79
System Emulation
80
================
81
82
-This manual is the overall guide for users using QEMU
83
+This section of the manual is the overall guide for users using QEMU
84
for full system emulation (as opposed to user-mode emulation).
85
This includes working with hypervisors such as KVM, Xen, Hax
86
or Hypervisor.Framework.
87
diff --git a/docs/tools/index.rst b/docs/tools/index.rst
88
index XXXXXXX..XXXXXXX 100644
89
--- a/docs/tools/index.rst
90
+++ b/docs/tools/index.rst
91
@@ -XXX,XX +XXX,XX @@
92
-.. This is the top level page for the 'tools' manual
93
-
94
-
95
Tools
96
=====
97
98
+This section of the manual documents QEMU's "tools": its
99
+command line utilities and other standalone programs.
100
101
Contents:
102
103
diff --git a/docs/user/index.rst b/docs/user/index.rst
104
index XXXXXXX..XXXXXXX 100644
105
--- a/docs/user/index.rst
106
+++ b/docs/user/index.rst
107
@@ -XXX,XX +XXX,XX @@
108
-.. This is the top level page for the 'user' manual.
109
-
110
-
111
User Mode Emulation
112
===================
113
114
-This manual is the overall guide for users using QEMU
115
+This section of the manual is the overall guide for users using QEMU
116
for user-mode emulation. In this mode, QEMU can launch
117
processes compiled for one CPU on another CPU.
118
119
--
120
2.20.1
121
122
diff view generated by jsdifflib
Deleted patch
1
Since the top-level subsections aren't self-contained manuals
2
any more, the "Contents:" lines at the top of each of their
3
index pages look a bit odd; remove them.
4
1
5
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Acked-by: Markus Armbruster <armbru@redhat.com>
7
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
8
Message-id: 20210705095547.15790-4-peter.maydell@linaro.org
9
---
10
docs/devel/index.rst | 2 --
11
docs/interop/index.rst | 2 --
12
docs/specs/index.rst | 2 --
13
docs/system/index.rst | 2 --
14
docs/tools/index.rst | 2 --
15
docs/user/index.rst | 2 --
16
6 files changed, 12 deletions(-)
17
18
diff --git a/docs/devel/index.rst b/docs/devel/index.rst
19
index XXXXXXX..XXXXXXX 100644
20
--- a/docs/devel/index.rst
21
+++ b/docs/devel/index.rst
22
@@ -XXX,XX +XXX,XX @@ This section of the manual documents various parts of the internals of QEMU.
23
You only need to read it if you are interested in reading or
24
modifying QEMU's source code.
25
26
-Contents:
27
-
28
.. toctree::
29
:maxdepth: 2
30
:includehidden:
31
diff --git a/docs/interop/index.rst b/docs/interop/index.rst
32
index XXXXXXX..XXXXXXX 100644
33
--- a/docs/interop/index.rst
34
+++ b/docs/interop/index.rst
35
@@ -XXX,XX +XXX,XX @@ System Emulation Management and Interoperability
36
This section of the manual contains documents and specifications that
37
are useful for making QEMU interoperate with other software.
38
39
-Contents:
40
-
41
.. toctree::
42
:maxdepth: 2
43
44
diff --git a/docs/specs/index.rst b/docs/specs/index.rst
45
index XXXXXXX..XXXXXXX 100644
46
--- a/docs/specs/index.rst
47
+++ b/docs/specs/index.rst
48
@@ -XXX,XX +XXX,XX @@ System Emulation Guest Hardware Specifications
49
This section of the manual contains specifications of
50
guest hardware that is specific to QEMU.
51
52
-Contents:
53
-
54
.. toctree::
55
:maxdepth: 2
56
57
diff --git a/docs/system/index.rst b/docs/system/index.rst
58
index XXXXXXX..XXXXXXX 100644
59
--- a/docs/system/index.rst
60
+++ b/docs/system/index.rst
61
@@ -XXX,XX +XXX,XX @@ for full system emulation (as opposed to user-mode emulation).
62
This includes working with hypervisors such as KVM, Xen, Hax
63
or Hypervisor.Framework.
64
65
-Contents:
66
-
67
.. toctree::
68
:maxdepth: 3
69
70
diff --git a/docs/tools/index.rst b/docs/tools/index.rst
71
index XXXXXXX..XXXXXXX 100644
72
--- a/docs/tools/index.rst
73
+++ b/docs/tools/index.rst
74
@@ -XXX,XX +XXX,XX @@ Tools
75
This section of the manual documents QEMU's "tools": its
76
command line utilities and other standalone programs.
77
78
-Contents:
79
-
80
.. toctree::
81
:maxdepth: 2
82
83
diff --git a/docs/user/index.rst b/docs/user/index.rst
84
index XXXXXXX..XXXXXXX 100644
85
--- a/docs/user/index.rst
86
+++ b/docs/user/index.rst
87
@@ -XXX,XX +XXX,XX @@ This section of the manual is the overall guide for users using QEMU
88
for user-mode emulation. In this mode, QEMU can launch
89
processes compiled for one CPU on another CPU.
90
91
-Contents:
92
-
93
.. toctree::
94
:maxdepth: 2
95
96
--
97
2.20.1
98
99
diff view generated by jsdifflib
Deleted patch
1
Now that we have a single Sphinx manual rather than multiple manuals,
2
we can provide a better place for "common to all of QEMU" information
3
like the deprecation notices, build platforms, license information,
4
which we currently have in the system/ manual even though it applies
5
to all of QEMU.
6
1
7
Create a new directory about/ on the same level as system/, user/,
8
etc, and move these documents there.
9
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Acked-by: Markus Armbruster <armbru@redhat.com>
12
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
13
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
14
Message-id: 20210705095547.15790-5-peter.maydell@linaro.org
15
---
16
docs/{system => about}/build-platforms.rst | 0
17
docs/{system => about}/deprecated.rst | 0
18
docs/about/index.rst | 10 ++++++++++
19
docs/{system => about}/license.rst | 0
20
docs/{system => about}/removed-features.rst | 0
21
docs/index.rst | 1 +
22
docs/system/index.rst | 4 ----
23
7 files changed, 11 insertions(+), 4 deletions(-)
24
rename docs/{system => about}/build-platforms.rst (100%)
25
rename docs/{system => about}/deprecated.rst (100%)
26
create mode 100644 docs/about/index.rst
27
rename docs/{system => about}/license.rst (100%)
28
rename docs/{system => about}/removed-features.rst (100%)
29
30
diff --git a/docs/system/build-platforms.rst b/docs/about/build-platforms.rst
31
similarity index 100%
32
rename from docs/system/build-platforms.rst
33
rename to docs/about/build-platforms.rst
34
diff --git a/docs/system/deprecated.rst b/docs/about/deprecated.rst
35
similarity index 100%
36
rename from docs/system/deprecated.rst
37
rename to docs/about/deprecated.rst
38
diff --git a/docs/about/index.rst b/docs/about/index.rst
39
new file mode 100644
40
index XXXXXXX..XXXXXXX
41
--- /dev/null
42
+++ b/docs/about/index.rst
43
@@ -XXX,XX +XXX,XX @@
44
+About QEMU
45
+==========
46
+
47
+.. toctree::
48
+ :maxdepth: 2
49
+
50
+ build-platforms
51
+ deprecated
52
+ removed-features
53
+ license
54
diff --git a/docs/system/license.rst b/docs/about/license.rst
55
similarity index 100%
56
rename from docs/system/license.rst
57
rename to docs/about/license.rst
58
diff --git a/docs/system/removed-features.rst b/docs/about/removed-features.rst
59
similarity index 100%
60
rename from docs/system/removed-features.rst
61
rename to docs/about/removed-features.rst
62
diff --git a/docs/index.rst b/docs/index.rst
63
index XXXXXXX..XXXXXXX 100644
64
--- a/docs/index.rst
65
+++ b/docs/index.rst
66
@@ -XXX,XX +XXX,XX @@ Welcome to QEMU's documentation!
67
:maxdepth: 2
68
:caption: Contents:
69
70
+ about/index
71
system/index
72
user/index
73
tools/index
74
diff --git a/docs/system/index.rst b/docs/system/index.rst
75
index XXXXXXX..XXXXXXX 100644
76
--- a/docs/system/index.rst
77
+++ b/docs/system/index.rst
78
@@ -XXX,XX +XXX,XX @@ or Hypervisor.Framework.
79
targets
80
security
81
multi-process
82
- deprecated
83
- removed-features
84
- build-platforms
85
- license
86
--
87
2.20.1
88
89
diff view generated by jsdifflib
1
Add some text to About to act as a brief introduction to the QEMU
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
manual and to make the about page a bit less of an abrupt start to
3
it.
4
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5
Message-id: 20241122225049.1617774-13-pierrick.bouvier@linaro.org
5
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Acked-by: Markus Armbruster <armbru@redhat.com>
7
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
8
Message-id: 20210705095547.15790-6-peter.maydell@linaro.org
9
---
7
---
10
docs/about/index.rst | 17 +++++++++++++++++
8
docs/system/arm/aspeed.rst | 7 ++++---
11
1 file changed, 17 insertions(+)
9
1 file changed, 4 insertions(+), 3 deletions(-)
12
10
13
diff --git a/docs/about/index.rst b/docs/about/index.rst
11
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
14
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
15
--- a/docs/about/index.rst
13
--- a/docs/system/arm/aspeed.rst
16
+++ b/docs/about/index.rst
14
+++ b/docs/system/arm/aspeed.rst
17
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@
18
About QEMU
16
-Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
19
==========
17
-========================================================================================================================================================================================================================================================================================================================================================================================================
20
18
+Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
21
+QEMU is a generic and open source machine emulator and virtualizer.
19
+==================================================================================================================================================================================================================================================================================================================================================================================================================================
22
+
20
23
+QEMU can be used in several different ways. The most common is for
21
The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
24
+"system emulation", where it provides a virtual model of an
22
Aspeed evaluation boards. They are based on different releases of the
25
+entire machine (CPU, memory and emulated devices) to run a guest OS.
23
@@ -XXX,XX +XXX,XX @@ AST2400 SoC based machines :
26
+In this mode the CPU may be fully emulated, or it may work with
24
27
+a hypervisor such as KVM, Xen, Hax or Hypervisor.Framework to
25
- ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
28
+allow the guest to run directly on the host CPU.
26
- ``quanta-q71l-bmc`` OpenBMC Quanta BMC
29
+
27
-- ``supermicrox11-bmc`` Supermicro X11 BMC
30
+The second supported way to use QEMU is "user mode emulation",
28
+- ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
31
+where QEMU can launch processes compiled for one CPU on another CPU.
29
+- ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
32
+In this mode the CPU is always emulated.
30
33
+
31
AST2500 SoC based machines :
34
+QEMU also provides a number of standalone commandline utilities,
35
+such as the `qemu-img` disk image utility that allows you to create,
36
+convert and modify disk images.
37
+
38
.. toctree::
39
:maxdepth: 2
40
32
41
--
33
--
42
2.20.1
34
2.34.1
43
44
diff view generated by jsdifflib