[PATCH 17/17] target/riscv: Remove gen_get_gpr

Richard Henderson posted 17 patches 4 years, 7 months ago
Maintainers: Alistair Francis <alistair.francis@wdc.com>, Palmer Dabbelt <palmer@dabbelt.com>, Bin Meng <bin.meng@windriver.com>
There is a newer version of this series
[PATCH 17/17] target/riscv: Remove gen_get_gpr
Posted by Richard Henderson 4 years, 7 months ago
This function is now unused.
The corresponding gen_set_gpr function is still in use.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/translate.c | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 8ff75a5798..a6c850e9d3 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -195,15 +195,6 @@ static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
 /* Wrapper for getting reg values - need to check of reg is zero since
  * cpu_gpr[0] is not actually allocated
  */
-static inline void gen_get_gpr(TCGv t, int reg_num)
-{
-    if (reg_num == 0) {
-        tcg_gen_movi_tl(t, 0);
-    } else {
-        tcg_gen_mov_tl(t, cpu_gpr[reg_num]);
-    }
-}
-
 static TCGv gpr_src(DisasContext *ctx, int reg_num)
 {
     if (reg_num == 0) {
@@ -1046,9 +1037,11 @@ void riscv_translate_init(void)
 {
     int i;
 
-    /* cpu_gpr[0] is a placeholder for the zero register. Do not use it. */
-    /* Use the gen_set_gpr and gen_get_gpr helper functions when accessing */
-    /* registers, unless you specifically block reads/writes to reg 0 */
+    /*
+     * cpu_gpr[0] is a placeholder for the zero register. Do not use it.
+     * Use the gpr_src and gpr_dst helper functions when accessing regs,
+     * unless you specifically block reads/writes to reg 0.
+     */
     cpu_gpr[0] = NULL;
 
     for (i = 1; i < 32; i++) {
-- 
2.25.1


Re: [PATCH 17/17] target/riscv: Remove gen_get_gpr
Posted by Alistair Francis 4 years, 7 months ago
On Fri, Jul 9, 2021 at 2:48 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This function is now unused.
> The corresponding gen_set_gpr function is still in use.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/translate.c | 17 +++++------------
>  1 file changed, 5 insertions(+), 12 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 8ff75a5798..a6c850e9d3 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -195,15 +195,6 @@ static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
>  /* Wrapper for getting reg values - need to check of reg is zero since
>   * cpu_gpr[0] is not actually allocated
>   */
> -static inline void gen_get_gpr(TCGv t, int reg_num)
> -{
> -    if (reg_num == 0) {
> -        tcg_gen_movi_tl(t, 0);
> -    } else {
> -        tcg_gen_mov_tl(t, cpu_gpr[reg_num]);
> -    }
> -}
> -
>  static TCGv gpr_src(DisasContext *ctx, int reg_num)
>  {
>      if (reg_num == 0) {
> @@ -1046,9 +1037,11 @@ void riscv_translate_init(void)
>  {
>      int i;
>
> -    /* cpu_gpr[0] is a placeholder for the zero register. Do not use it. */
> -    /* Use the gen_set_gpr and gen_get_gpr helper functions when accessing */
> -    /* registers, unless you specifically block reads/writes to reg 0 */
> +    /*
> +     * cpu_gpr[0] is a placeholder for the zero register. Do not use it.
> +     * Use the gpr_src and gpr_dst helper functions when accessing regs,
> +     * unless you specifically block reads/writes to reg 0.
> +     */
>      cpu_gpr[0] = NULL;
>
>      for (i = 1; i < 32; i++) {
> --
> 2.25.1
>
>