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Squashed in a trivial fix for 32-bit hosts:
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v2: fix format string error
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2
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--- a/target/arm/mve_helper.c
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thanks
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+++ b/target/arm/mve_helper.c
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@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
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acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
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m[H##ESIZE(e)])); \
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} \
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- acc = int128_add(acc, 1 << 7); \
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+ acc = int128_add(acc, int128_make64(1 << 7)); \
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} \
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} \
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mve_advance_vpt(env); \
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-- PMM
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-- PMM
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5
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The following changes since commit 53f306f316549d20c76886903181413d20842423:
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The following changes since commit aa9bbd865502ed517624ab6fe7d4b5d89ca95e43:
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7
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Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
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Merge tag 'pull-ppc-20230528' of https://gitlab.com/danielhb/qemu into staging (2023-05-29 14:31:52 -0700)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230530-1
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13
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for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
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for you to fetch changes up to ec683110def96b16be3931ec87baba65a3dc5ad0:
26
15
27
docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
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docs: sbsa: correct graphics card name (2023-05-30 15:50:17 +0100)
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17
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Don't require 'virt' board to be compiled in for ACPI GHES code
20
* fsl-imx6: Add SNVS support for i.MX6 boards
32
* docs: Document which architecture extensions we emulate
21
* smmuv3: Add support for stage 2 translations
33
* Fix bugs in M-profile FPCXT_NS accesses
22
* hw/dma/xilinx_axidma: Check DMASR.HALTED to prevent infinite loop
34
* First slice of MVE patches
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* hw/arm/xlnx-zynqmp: fix unsigned error when checking the RPUs number
35
* Implement MTE3
24
* cleanups for recent Kconfig changes
36
* docs/system: arm: Add nRF boards description
25
* target/arm: Explicitly select short-format FSR for M-profile
26
* tests/qtest: Run arm-specific tests only if the required machine is available
27
* hw/arm/sbsa-ref: add GIC node into DT
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* docs: sbsa: correct graphics card name
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* Update copyright dates to 2023
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30
38
----------------------------------------------------------------
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----------------------------------------------------------------
39
Alexandre Iooss (1):
32
Clément Chigot (1):
40
docs/system: arm: Add nRF boards description
33
hw/arm/xlnx-zynqmp: fix unsigned error when checking the RPUs number
41
34
42
Peter Collingbourne (1):
35
Enze Li (1):
43
target/arm: Implement MTE3
36
Update copyright dates to 2023
44
37
45
Peter Maydell (55):
38
Fabiano Rosas (3):
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hw/acpi: Provide stub version of acpi_ghes_record_errors()
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target/arm: Explain why we need to select ARM_V7M
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hw/acpi: Provide function acpi_ghes_present()
40
arm/Kconfig: Keep Kconfig default entries in default.mak as documentation
48
target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
41
arm/Kconfig: Make TCG dependence explicit
49
docs/system/arm: Document which architecture extensions we emulate
50
target/arm/translate-vfp.c: Whitespace fixes
51
target/arm: Handle FPU being disabled in FPCXT_NS accesses
52
target/arm: Don't NOCP fault for FPCXT_NS accesses
53
target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
54
target/arm: Factor FP context update code out into helper function
55
target/arm: Split vfp_access_check() into A and M versions
56
target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
57
target/arm: Implement MVE VLDR/VSTR (non-widening forms)
58
target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
59
target/arm: Implement MVE VCLZ
60
target/arm: Implement MVE VCLS
61
target/arm: Implement MVE VREV16, VREV32, VREV64
62
target/arm: Implement MVE VMVN (register)
63
target/arm: Implement MVE VABS
64
target/arm: Implement MVE VNEG
65
tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
66
target/arm: Implement MVE VDUP
67
target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
68
target/arm: Implement MVE VADD, VSUB, VMUL
69
target/arm: Implement MVE VMULH
70
target/arm: Implement MVE VRMULH
71
target/arm: Implement MVE VMAX, VMIN
72
target/arm: Implement MVE VABD
73
target/arm: Implement MVE VHADD, VHSUB
74
target/arm: Implement MVE VMULL
75
target/arm: Implement MVE VMLALDAV
76
target/arm: Implement MVE VMLSLDAV
77
target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
78
target/arm: Implement MVE VADD (scalar)
79
target/arm: Implement MVE VSUB, VMUL (scalar)
80
target/arm: Implement MVE VHADD, VHSUB (scalar)
81
target/arm: Implement MVE VBRSR
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target/arm: Implement MVE VPST
83
target/arm: Implement MVE VQADD and VQSUB
84
target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
85
target/arm: Implement MVE VQDMULL scalar
86
target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
87
target/arm: Implement MVE VQADD, VQSUB (vector)
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target/arm: Implement MVE VQSHL (vector)
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target/arm: Implement MVE VQRSHL
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target/arm: Implement MVE VSHL insn
91
target/arm: Implement MVE VRSHL
92
target/arm: Implement MVE VQDMLADH and VQRDMLADH
93
target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
94
target/arm: Implement MVE VQDMULL (vector)
95
target/arm: Implement MVE VRHADD
96
target/arm: Implement MVE VADC, VSBC
97
target/arm: Implement MVE VCADD
98
target/arm: Implement MVE VHCADD
99
target/arm: Implement MVE VADDV
100
target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
101
42
102
docs/system/arm/emulation.rst | 103 ++++
43
Marcin Juszkiewicz (2):
103
docs/system/arm/nrf.rst | 51 ++
44
hw/arm/sbsa-ref: add GIC node into DT
104
docs/system/target-arm.rst | 7 +
45
docs: sbsa: correct graphics card name
105
include/hw/acpi/ghes.h | 9 +
106
include/tcg/tcg-op.h | 8 +
107
include/tcg/tcg.h | 1 -
108
target/arm/helper-mve.h | 357 +++++++++++++
109
target/arm/helper.h | 2 +
110
target/arm/internals.h | 11 +
111
target/arm/translate-a32.h | 3 +
112
target/arm/translate.h | 10 +
113
target/arm/m-nocp.decode | 24 +
114
target/arm/mve.decode | 240 +++++++++
115
target/arm/vfp.decode | 14 -
116
hw/acpi/ghes-stub.c | 22 +
117
hw/acpi/ghes.c | 17 +
118
target/arm/cpu64.c | 2 +-
119
target/arm/kvm64.c | 6 +-
120
target/arm/mte_helper.c | 82 +--
121
target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
122
target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
123
target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
124
target/arm/translate-vfp.c | 741 +++++++-------------------
125
tcg/tcg-op-gvec.c | 20 +-
126
MAINTAINERS | 1 +
127
hw/acpi/meson.build | 6 +-
128
target/arm/meson.build | 1 +
129
27 files changed, 3578 insertions(+), 629 deletions(-)
130
create mode 100644 docs/system/arm/emulation.rst
131
create mode 100644 docs/system/arm/nrf.rst
132
create mode 100644 target/arm/helper-mve.h
133
create mode 100644 hw/acpi/ghes-stub.c
134
create mode 100644 target/arm/mve_helper.c
135
46
47
Mostafa Saleh (10):
48
hw/arm/smmuv3: Add missing fields for IDR0
49
hw/arm/smmuv3: Update translation config to hold stage-2
50
hw/arm/smmuv3: Refactor stage-1 PTW
51
hw/arm/smmuv3: Add page table walk for stage-2
52
hw/arm/smmuv3: Parse STE config for stage-2
53
hw/arm/smmuv3: Make TLB lookup work for stage-2
54
hw/arm/smmuv3: Add VMID to TLB tagging
55
hw/arm/smmuv3: Add CMDs related to stage-2
56
hw/arm/smmuv3: Add stage-2 support in iova notifier
57
hw/arm/smmuv3: Add knob to choose translation stage and enable stage-2
58
59
Peter Maydell (1):
60
target/arm: Explicitly select short-format FSR for M-profile
61
62
Thomas Huth (1):
63
tests/qtest: Run arm-specific tests only if the required machine is available
64
65
Tommy Wu (1):
66
hw/dma/xilinx_axidma: Check DMASR.HALTED to prevent infinite loop.
67
68
Vitaly Cheptsov (1):
69
fsl-imx6: Add SNVS support for i.MX6 boards
70
71
docs/conf.py | 2 +-
72
docs/system/arm/sbsa.rst | 2 +-
73
configs/devices/aarch64-softmmu/default.mak | 6 +
74
configs/devices/arm-softmmu/default.mak | 40 ++++
75
hw/arm/smmu-internal.h | 37 +++
76
hw/arm/smmuv3-internal.h | 12 +-
77
include/hw/arm/fsl-imx6.h | 2 +
78
include/hw/arm/smmu-common.h | 45 +++-
79
include/hw/arm/smmuv3.h | 4 +
80
include/qemu/help-texts.h | 2 +-
81
hw/arm/fsl-imx6.c | 8 +
82
hw/arm/sbsa-ref.c | 19 +-
83
hw/arm/smmu-common.c | 209 ++++++++++++++--
84
hw/arm/smmuv3.c | 358 ++++++++++++++++++++++++----
85
hw/arm/xlnx-zynqmp.c | 2 +-
86
hw/dma/xilinx_axidma.c | 11 +-
87
target/arm/tcg/tlb_helper.c | 13 +-
88
hw/arm/Kconfig | 123 ++++++----
89
hw/arm/trace-events | 14 +-
90
target/arm/Kconfig | 3 +
91
tests/qtest/meson.build | 7 +-
92
21 files changed, 774 insertions(+), 145 deletions(-)
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diff view generated by jsdifflib