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Squashed in a trivial fix for 32-bit hosts:
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This pullreq is (1) my GICv4 patches (2) most of the first third of RTH's
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cleanup patchset (3) one patch fixing an smmuv3 bug...
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--- a/target/arm/mve_helper.c
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v2 changes: fix build failure on aarch64 hosts by moving the
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+++ b/target/arm/mve_helper.c
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gicv3_add_its() and gicv3_foreach_its() functions to
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@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
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arm_gicv3_its_common.h.
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acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
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m[H##ESIZE(e)])); \
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} \
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- acc = int128_add(acc, 1 << 7); \
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+ acc = int128_add(acc, int128_make64(1 << 7)); \
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} \
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} \
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mve_advance_vpt(env); \
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thanks
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-- PMM
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-- PMM
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The following changes since commit 53f306f316549d20c76886903181413d20842423:
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Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
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The following changes since commit a74782936dc6e979ce371dabda4b1c05624ea87f:
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Merge tag 'pull-migration-20220421a' of https://gitlab.com/dagrh/qemu into staging (2022-04-21 18:48:18 -0700)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220422-1
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for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
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for you to fetch changes up to c3ca7d56c4790c2223122f7e84b71161cd36dbce:
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docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
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hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntry in smmuv3_translate() (2022-04-22 14:44:55 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Don't require 'virt' board to be compiled in for ACPI GHES code
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* Implement GICv4 emulation
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* docs: Document which architecture extensions we emulate
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* Some cleanup patches in target/arm
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* Fix bugs in M-profile FPCXT_NS accesses
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* hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntry in smmuv3_translate()
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* First slice of MVE patches
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* Implement MTE3
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* docs/system: arm: Add nRF boards description
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----------------------------------------------------------------
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----------------------------------------------------------------
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Alexandre Iooss (1):
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Peter Maydell (41):
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docs/system: arm: Add nRF boards description
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hw/intc/arm_gicv3_its: Add missing blank line
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hw/intc/arm_gicv3: Sanity-check num-cpu property
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hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count
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hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers
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target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2
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hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?"
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hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4
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hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI
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hw/intc/arm_gicv3_its: Implement VMAPP
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hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUE
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hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid"
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hw/intc/arm_gicv3_its: Factor out CTE lookup sequence
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hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt code
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hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()
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hw/intc/arm_gicv3: Keep pointers to every connected ITS
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hw/intc/arm_gicv3_its: Implement VMOVP
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hw/intc/arm_gicv3_its: Implement VSYNC
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hw/intc/arm_gicv3_its: Implement INV command properly
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hw/intc/arm_gicv3_its: Implement INV for virtual interrupts
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hw/intc/arm_gicv3_its: Implement VMOVI
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hw/intc/arm_gicv3_its: Implement VINVALL
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hw/intc/arm_gicv3: Implement GICv4's new redistributor frame
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hw/intc/arm_gicv3: Implement new GICv4 redistributor registers
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hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()
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hw/intc/arm_gicv3_cpuif: Support vLPIs
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hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarily
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hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logic
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hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logic
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hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes
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hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" code
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hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()
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hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()
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hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handling
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hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()
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hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()
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hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()
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hw/intc/arm_gicv3: Update ID and feature registers for GICv4
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hw/intc/arm_gicv3: Allow 'revision' property to be set to 4
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hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic()
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hw/arm/virt: Abstract out calculation of redistributor region capacity
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hw/arm/virt: Support TCG GICv4
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Peter Collingbourne (1):
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Richard Henderson (19):
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target/arm: Implement MTE3
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target/arm: Update ISAR fields for ARMv8.8
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target/arm: Update SCR_EL3 bits to ARMv8.8
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target/arm: Update SCTLR bits to ARMv9.2
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target/arm: Change DisasContext.aarch64 to bool
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target/arm: Change CPUArchState.aarch64 to bool
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target/arm: Extend store_cpu_offset to take field size
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target/arm: Change DisasContext.thumb to bool
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target/arm: Change CPUArchState.thumb to bool
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target/arm: Remove fpexc32_access
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target/arm: Split out set_btype_raw
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target/arm: Split out gen_rebuild_hflags
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target/arm: Simplify GEN_SHIFT in translate.c
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target/arm: Simplify gen_sar
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target/arm: Simplify aa32 DISAS_WFI
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target/arm: Use tcg_constant in translate-m-nocp.c
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target/arm: Use tcg_constant in translate-neon.c
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target/arm: Use smin/smax for do_sat_addsub_32
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target/arm: Use tcg_constant in translate-vfp.c
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target/arm: Use tcg_constant_i32 in translate.h
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Peter Maydell (55):
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Xiang Chen (1):
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hw/acpi: Provide stub version of acpi_ghes_record_errors()
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hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntry in smmuv3_translate()
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hw/acpi: Provide function acpi_ghes_present()
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target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
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docs/system/arm: Document which architecture extensions we emulate
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target/arm/translate-vfp.c: Whitespace fixes
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target/arm: Handle FPU being disabled in FPCXT_NS accesses
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target/arm: Don't NOCP fault for FPCXT_NS accesses
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target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
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target/arm: Factor FP context update code out into helper function
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target/arm: Split vfp_access_check() into A and M versions
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target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
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target/arm: Implement MVE VLDR/VSTR (non-widening forms)
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target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
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target/arm: Implement MVE VCLZ
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target/arm: Implement MVE VCLS
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target/arm: Implement MVE VREV16, VREV32, VREV64
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target/arm: Implement MVE VMVN (register)
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target/arm: Implement MVE VABS
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target/arm: Implement MVE VNEG
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tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
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target/arm: Implement MVE VDUP
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target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
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target/arm: Implement MVE VADD, VSUB, VMUL
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target/arm: Implement MVE VMULH
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target/arm: Implement MVE VRMULH
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target/arm: Implement MVE VMAX, VMIN
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target/arm: Implement MVE VABD
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target/arm: Implement MVE VHADD, VHSUB
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target/arm: Implement MVE VMULL
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target/arm: Implement MVE VMLALDAV
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target/arm: Implement MVE VMLSLDAV
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target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
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target/arm: Implement MVE VADD (scalar)
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target/arm: Implement MVE VSUB, VMUL (scalar)
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target/arm: Implement MVE VHADD, VHSUB (scalar)
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target/arm: Implement MVE VBRSR
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target/arm: Implement MVE VPST
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target/arm: Implement MVE VQADD and VQSUB
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target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
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target/arm: Implement MVE VQDMULL scalar
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target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
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target/arm: Implement MVE VQADD, VQSUB (vector)
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target/arm: Implement MVE VQSHL (vector)
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target/arm: Implement MVE VQRSHL
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target/arm: Implement MVE VSHL insn
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target/arm: Implement MVE VRSHL
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target/arm: Implement MVE VQDMLADH and VQRDMLADH
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target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
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target/arm: Implement MVE VQDMULL (vector)
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target/arm: Implement MVE VRHADD
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target/arm: Implement MVE VADC, VSBC
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target/arm: Implement MVE VCADD
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target/arm: Implement MVE VHCADD
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target/arm: Implement MVE VADDV
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target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
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docs/system/arm/emulation.rst | 103 ++++
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docs/system/arm/virt.rst | 5 +-
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docs/system/arm/nrf.rst | 51 ++
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hw/intc/gicv3_internal.h | 213 +++++++-
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docs/system/target-arm.rst | 7 +
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include/hw/arm/virt.h | 19 +-
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include/hw/acpi/ghes.h | 9 +
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include/hw/intc/arm_gicv3_common.h | 13 +
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include/tcg/tcg-op.h | 8 +
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include/hw/intc/arm_gicv3_its_common.h | 19 +
107
include/tcg/tcg.h | 1 -
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target/arm/cpu.h | 59 ++-
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target/arm/helper-mve.h | 357 +++++++++++++
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target/arm/translate-a32.h | 13 +-
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target/arm/helper.h | 2 +
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target/arm/translate.h | 17 +-
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target/arm/internals.h | 11 +
106
hw/arm/smmuv3.c | 2 +-
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target/arm/translate-a32.h | 3 +
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hw/arm/virt.c | 102 +++-
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target/arm/translate.h | 10 +
108
hw/intc/arm_gicv3_common.c | 54 +-
113
target/arm/m-nocp.decode | 24 +
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hw/intc/arm_gicv3_cpuif.c | 195 ++++++--
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target/arm/mve.decode | 240 +++++++++
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hw/intc/arm_gicv3_dist.c | 7 +-
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target/arm/vfp.decode | 14 -
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hw/intc/arm_gicv3_its.c | 876 +++++++++++++++++++++++++++------
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hw/acpi/ghes-stub.c | 22 +
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hw/intc/arm_gicv3_its_kvm.c | 2 +
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hw/acpi/ghes.c | 17 +
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hw/intc/arm_gicv3_kvm.c | 5 +
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target/arm/cpu64.c | 2 +-
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hw/intc/arm_gicv3_redist.c | 480 +++++++++++++++---
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target/arm/kvm64.c | 6 +-
115
linux-user/arm/cpu_loop.c | 2 +-
120
target/arm/mte_helper.c | 82 +--
116
target/arm/cpu.c | 16 +-
121
target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
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target/arm/helper-a64.c | 4 +-
122
target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
118
target/arm/helper.c | 19 +-
123
target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
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target/arm/hvf/hvf.c | 2 +-
124
target/arm/translate-vfp.c | 741 +++++++-------------------
120
target/arm/m_helper.c | 6 +-
125
tcg/tcg-op-gvec.c | 20 +-
121
target/arm/op_helper.c | 13 -
126
MAINTAINERS | 1 +
122
target/arm/translate-a64.c | 50 +-
127
hw/acpi/meson.build | 6 +-
123
target/arm/translate-m-nocp.c | 12 +-
128
target/arm/meson.build | 1 +
124
target/arm/translate-neon.c | 21 +-
129
27 files changed, 3578 insertions(+), 629 deletions(-)
125
target/arm/translate-sve.c | 9 +-
130
create mode 100644 docs/system/arm/emulation.rst
126
target/arm/translate-vfp.c | 76 +--
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create mode 100644 docs/system/arm/nrf.rst
127
target/arm/translate.c | 101 ++--
132
create mode 100644 target/arm/helper-mve.h
128
hw/intc/trace-events | 18 +-
133
create mode 100644 hw/acpi/ghes-stub.c
129
31 files changed, 1890 insertions(+), 540 deletions(-)
134
create mode 100644 target/arm/mve_helper.c
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diff view generated by jsdifflib