[PULL v2 00/57] target-arm queue
[PULL v3 00/49] target-arm queue
1
Squashed in a trivial fix for 32-bit hosts:
1
v3: fix test failure on 32-bit hosts due to new board defaulting to 2GB RAM.
2
3
--- a/target/arm/mve_helper.c
4
+++ b/target/arm/mve_helper.c
5
@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
6
acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
7
m[H##ESIZE(e)])); \
8
} \
9
- acc = int128_add(acc, 1 << 7); \
10
+ acc = int128_add(acc, int128_make64(1 << 7)); \
11
} \
12
} \
13
mve_advance_vpt(env); \
14
2
15
-- PMM
3
-- PMM
16
4
17
The following changes since commit 53f306f316549d20c76886903181413d20842423:
5
The following changes since commit 9a7beaad3dbba982f7a461d676b55a5c3851d312:
18
6
19
Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
7
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210304' into staging (2021-03-05 10:47:46 +0000)
20
8
21
are available in the Git repository at:
9
are available in the Git repository at:
22
10
23
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
11
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210308
24
12
25
for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
13
for you to fetch changes up to 50b52b18cdb9294ce83dd49bb60b8e55a6526ea0:
26
14
27
docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
15
hw/arm/mps2: Update old infocenter.arm.com URLs (2021-03-08 11:54:16 +0000)
28
16
29
----------------------------------------------------------------
17
----------------------------------------------------------------
30
target-arm queue:
18
target-arm queue:
31
* Don't require 'virt' board to be compiled in for ACPI GHES code
19
* sbsa-ref: remove cortex-a53 from list of supported cpus
32
* docs: Document which architecture extensions we emulate
20
* sbsa-ref: add 'max' to list of allowed cpus
33
* Fix bugs in M-profile FPCXT_NS accesses
21
* target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe
34
* First slice of MVE patches
22
* npcm7xx: add EMC model
35
* Implement MTE3
23
* xlnx-zynqmp: Remove obsolete 'has_rpu' property
36
* docs/system: arm: Add nRF boards description
24
* target/arm: Speed up aarch64 TBL/TBX
25
* virtio-mmio: improve virtio-mmio get_dev_path alog
26
* target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks
27
* target/arm: Restrict v8M IDAU to TCG
28
* target/arm/cpu: Update coding style to make checkpatch.pl happy
29
* musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB surfaces
30
* Add new board: mps3-an524
37
31
38
----------------------------------------------------------------
32
----------------------------------------------------------------
39
Alexandre Iooss (1):
33
Doug Evans (3):
40
docs/system: arm: Add nRF boards description
34
hw/net: Add npcm7xx emc model
35
hw/arm: Add npcm7xx emc model
36
tests/qtests: Add npcm7xx emc model test
37
38
Marcin Juszkiewicz (2):
39
sbsa-ref: remove cortex-a53 from list of supported cpus
40
sbsa-ref: add 'max' to list of allowed cpus
41
41
42
Peter Collingbourne (1):
42
Peter Collingbourne (1):
43
target/arm: Implement MTE3
43
target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks
44
44
45
Peter Maydell (55):
45
Peter Maydell (34):
46
hw/acpi: Provide stub version of acpi_ghes_record_errors()
46
hw/arm/musicpal: Remove dead code for non-32-bit-RGB surfaces
47
hw/acpi: Provide function acpi_ghes_present()
47
hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces
48
target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
48
hw/display/tc6393xb: Expand out macros in template header
49
docs/system/arm: Document which architecture extensions we emulate
49
hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite
50
target/arm/translate-vfp.c: Whitespace fixes
50
hw/display/omap_lcdc: Expand out macros in template header
51
target/arm: Handle FPU being disabled in FPCXT_NS accesses
51
hw/display/omap_lcdc: Drop broken bigendian ifdef
52
target/arm: Don't NOCP fault for FPCXT_NS accesses
52
hw/display/omap_lcdc: Fix coding style issues in template header
53
target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
53
hw/display/omap_lcdc: Inline template header into C file
54
target/arm: Factor FP context update code out into helper function
54
hw/display/omap_lcdc: Delete unnecessary macro
55
target/arm: Split vfp_access_check() into A and M versions
55
hw/display/tcx: Drop unnecessary code for handling BGR format outputs
56
target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
56
hw/arm/mps2-tz: Make SYSCLK frequency board-specific
57
target/arm: Implement MVE VLDR/VSTR (non-widening forms)
57
hw/misc/mps2-scc: Support configurable number of OSCCLK values
58
target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
58
hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511
59
target/arm: Implement MVE VCLZ
59
hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board
60
target/arm: Implement MVE VCLS
60
hw/misc/mps2-fpgaio: Make number of LEDs configurable by board
61
target/arm: Implement MVE VREV16, VREV32, VREV64
61
hw/misc/mps2-fpgaio: Support SWITCH register
62
target/arm: Implement MVE VMVN (register)
62
hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board
63
target/arm: Implement MVE VABS
63
hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type
64
target/arm: Implement MVE VNEG
64
hw/arm/mps2-tz: Make number of IRQs board-specific
65
tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
65
hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524
66
target/arm: Implement MVE VDUP
66
hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI
67
target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
67
hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts
68
target/arm: Implement MVE VADD, VSUB, VMUL
68
hw/arm/mps2-tz: Move device IRQ info to data structures
69
target/arm: Implement MVE VMULH
69
hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs
70
target/arm: Implement MVE VRMULH
70
hw/arm/mps2-tz: Allow boards to have different PPCInfo data
71
target/arm: Implement MVE VMAX, VMIN
71
hw/arm/mps2-tz: Make RAM arrangement board-specific
72
target/arm: Implement MVE VABD
72
hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data
73
target/arm: Implement MVE VHADD, VHSUB
73
hw/arm/mps2-tz: Support ROMs as well as RAMs
74
target/arm: Implement MVE VMULL
74
hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo
75
target/arm: Implement MVE VMLALDAV
75
hw/arm/mps2-tz: Add new mps3-an524 board
76
target/arm: Implement MVE VMLSLDAV
76
hw/arm/mps2-tz: Stub out USB controller for mps3-an524
77
target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
77
hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524
78
target/arm: Implement MVE VADD (scalar)
78
docs/system/arm/mps2.rst: Document the new mps3-an524 board
79
target/arm: Implement MVE VSUB, VMUL (scalar)
79
hw/arm/mps2: Update old infocenter.arm.com URLs
80
target/arm: Implement MVE VHADD, VHSUB (scalar)
81
target/arm: Implement MVE VBRSR
82
target/arm: Implement MVE VPST
83
target/arm: Implement MVE VQADD and VQSUB
84
target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
85
target/arm: Implement MVE VQDMULL scalar
86
target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
87
target/arm: Implement MVE VQADD, VQSUB (vector)
88
target/arm: Implement MVE VQSHL (vector)
89
target/arm: Implement MVE VQRSHL
90
target/arm: Implement MVE VSHL insn
91
target/arm: Implement MVE VRSHL
92
target/arm: Implement MVE VQDMLADH and VQRDMLADH
93
target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
94
target/arm: Implement MVE VQDMULL (vector)
95
target/arm: Implement MVE VRHADD
96
target/arm: Implement MVE VADC, VSBC
97
target/arm: Implement MVE VCADD
98
target/arm: Implement MVE VHCADD
99
target/arm: Implement MVE VADDV
100
target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
101
80
102
docs/system/arm/emulation.rst | 103 ++++
81
Philippe Mathieu-Daudé (4):
103
docs/system/arm/nrf.rst | 51 ++
82
hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property
104
docs/system/target-arm.rst | 7 +
83
hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init()
105
include/hw/acpi/ghes.h | 9 +
84
target/arm: Restrict v8M IDAU to TCG
106
include/tcg/tcg-op.h | 8 +
85
target/arm/cpu: Update coding style to make checkpatch.pl happy
107
include/tcg/tcg.h | 1 -
108
target/arm/helper-mve.h | 357 +++++++++++++
109
target/arm/helper.h | 2 +
110
target/arm/internals.h | 11 +
111
target/arm/translate-a32.h | 3 +
112
target/arm/translate.h | 10 +
113
target/arm/m-nocp.decode | 24 +
114
target/arm/mve.decode | 240 +++++++++
115
target/arm/vfp.decode | 14 -
116
hw/acpi/ghes-stub.c | 22 +
117
hw/acpi/ghes.c | 17 +
118
target/arm/cpu64.c | 2 +-
119
target/arm/kvm64.c | 6 +-
120
target/arm/mte_helper.c | 82 +--
121
target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
122
target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
123
target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
124
target/arm/translate-vfp.c | 741 +++++++-------------------
125
tcg/tcg-op-gvec.c | 20 +-
126
MAINTAINERS | 1 +
127
hw/acpi/meson.build | 6 +-
128
target/arm/meson.build | 1 +
129
27 files changed, 3578 insertions(+), 629 deletions(-)
130
create mode 100644 docs/system/arm/emulation.rst
131
create mode 100644 docs/system/arm/nrf.rst
132
create mode 100644 target/arm/helper-mve.h
133
create mode 100644 hw/acpi/ghes-stub.c
134
create mode 100644 target/arm/mve_helper.c
135
86
87
Rebecca Cran (3):
88
target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe
89
target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU
90
target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU
91
92
Richard Henderson (1):
93
target/arm: Speed up aarch64 TBL/TBX
94
95
schspa (1):
96
virtio-mmio: improve virtio-mmio get_dev_path alog
97
98
docs/system/arm/mps2.rst | 24 +-
99
docs/system/arm/nuvoton.rst | 3 +-
100
hw/display/omap_lcd_template.h | 169 --------
101
hw/display/tc6393xb_template.h | 72 ----
102
include/hw/arm/armsse.h | 4 +-
103
include/hw/arm/npcm7xx.h | 2 +
104
include/hw/arm/xlnx-zynqmp.h | 2 -
105
include/hw/misc/armsse-cpuid.h | 2 +-
106
include/hw/misc/armsse-mhu.h | 2 +-
107
include/hw/misc/iotkit-secctl.h | 2 +-
108
include/hw/misc/iotkit-sysctl.h | 2 +-
109
include/hw/misc/iotkit-sysinfo.h | 2 +-
110
include/hw/misc/mps2-fpgaio.h | 8 +-
111
include/hw/misc/mps2-scc.h | 10 +-
112
include/hw/net/npcm7xx_emc.h | 286 +++++++++++++
113
target/arm/cpu.h | 15 +-
114
target/arm/helper-a64.h | 2 +-
115
target/arm/internals.h | 6 +
116
hw/arm/mps2-tz.c | 642 ++++++++++++++++++++++++-----
117
hw/arm/mps2.c | 5 +
118
hw/arm/musicpal.c | 64 ++-
119
hw/arm/npcm7xx.c | 50 ++-
120
hw/arm/sbsa-ref.c | 2 +-
121
hw/arm/xlnx-zynqmp.c | 6 -
122
hw/display/omap_lcdc.c | 129 +++++-
123
hw/display/tc6393xb.c | 48 +--
124
hw/display/tcx.c | 31 +-
125
hw/i2c/npcm7xx_smbus.c | 1 -
126
hw/misc/armsse-cpuid.c | 2 +-
127
hw/misc/armsse-mhu.c | 2 +-
128
hw/misc/iotkit-sysctl.c | 2 +-
129
hw/misc/iotkit-sysinfo.c | 2 +-
130
hw/misc/mps2-fpgaio.c | 43 +-
131
hw/misc/mps2-scc.c | 93 ++++-
132
hw/net/npcm7xx_emc.c | 857 ++++++++++++++++++++++++++++++++++++++
133
hw/virtio/virtio-mmio.c | 13 +-
134
target/arm/cpu.c | 23 +-
135
target/arm/cpu64.c | 5 +
136
target/arm/cpu_tcg.c | 8 +
137
target/arm/helper-a64.c | 32 --
138
target/arm/helper.c | 39 +-
139
target/arm/mte_helper.c | 13 +-
140
target/arm/translate-a64.c | 70 +---
141
target/arm/vec_helper.c | 48 +++
142
tests/qtest/npcm7xx_emc-test.c | 862 +++++++++++++++++++++++++++++++++++++++
143
hw/net/meson.build | 1 +
144
hw/net/trace-events | 17 +
145
tests/qtest/meson.build | 3 +-
146
48 files changed, 3108 insertions(+), 618 deletions(-)
147
delete mode 100644 hw/display/omap_lcd_template.h
148
delete mode 100644 hw/display/tc6393xb_template.h
149
create mode 100644 include/hw/net/npcm7xx_emc.h
150
create mode 100644 hw/net/npcm7xx_emc.c
151
create mode 100644 tests/qtest/npcm7xx_emc-test.c
152
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.