| 1 | v2: dropped the hw/acpi/ghes-stub.c changes, which produce a | 1 | Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx |
|---|---|---|---|
| 2 | weird Meson error ("Tried to extract unknown source ghes-stub.c") | 2 | ethernet device failed 'make check' on big-endian hosts. |
| 3 | which didn't happen on my local builds; I'll investigate later... | ||
| 4 | 3 | ||
| 5 | -- PMM | 4 | -- PMM |
| 6 | 5 | ||
| 7 | The following changes since commit 1ea06abceec61b6f3ab33dadb0510b6e09fb61e2: | 6 | The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf: |
| 8 | 7 | ||
| 9 | Merge remote-tracking branch 'remotes/berrange-gitlab/tags/misc-fixes-pull-request' into staging (2021-06-14 15:59:13 +0100) | 8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000) |
| 10 | 9 | ||
| 11 | are available in the Git repository at: | 10 | are available in the Git repository at: |
| 12 | 11 | ||
| 13 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210616 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1 |
| 14 | 13 | ||
| 15 | for you to fetch changes up to 703235a303d6862a7e3f5c6aa9eff7471cb138b2: | 14 | for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621: |
| 16 | 15 | ||
| 17 | include/qemu/int128.h: Add function to create Int128 from int64_t (2021-06-16 14:33:52 +0100) | 16 | target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000) |
| 18 | 17 | ||
| 19 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 20 | target-arm queue: | 19 | target-arm queue: |
| 21 | * hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes | 20 | * Correctly initialize MDCR_EL2.HPMN |
| 22 | * handle some UNALLOCATED decode cases correctly rather | 21 | * versal: Use nr_apu_cpus in favor of hard coding 2 |
| 23 | than asserting | 22 | * accel/tcg: Add URL of clang bug to comment about our workaround |
| 24 | * hw: virt: consider hw_compat_6_0 | 23 | * Add support for FEAT_DIT, Data Independent Timing |
| 25 | * hw/arm: add quanta-gbs-bmc machine | 24 | * Remove GPIO from unimplemented NPCM7XX |
| 26 | * hw/intc/armv7m_nvic: Remove stale comment | 25 | * Fix SCR RES1 handling |
| 27 | * target/arm: Fix mte page crossing test | 26 | * Don't migrate CPUARMState.features |
| 28 | * hw/arm: quanta-q71l add pca954x muxes | ||
| 29 | * target/arm: First few parts of MVE support | ||
| 30 | 27 | ||
| 31 | ---------------------------------------------------------------- | 28 | ---------------------------------------------------------------- |
| 32 | Heinrich Schuchardt (1): | 29 | Aaron Lindsay (1): |
| 33 | hw: virt: consider hw_compat_6_0 | 30 | target/arm: Don't migrate CPUARMState.features |
| 34 | 31 | ||
| 35 | Jean-Philippe Brucker (1): | 32 | Daniel Müller (1): |
| 36 | hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes | 33 | target/arm: Correctly initialize MDCR_EL2.HPMN |
| 37 | 34 | ||
| 38 | Patrick Venture (5): | 35 | Edgar E. Iglesias (1): |
| 39 | hw/arm: add quanta-gbs-bmc machine | 36 | hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 |
| 40 | hw/arm: quanta-gbs-bmc add i2c comments | ||
| 41 | hw/arm: gsj add i2c comments | ||
| 42 | hw/arm: gsj add pca9548 | ||
| 43 | hw/arm: quanta-q71l add pca954x muxes | ||
| 44 | 37 | ||
| 45 | Peter Maydell (14): | 38 | Hao Wu (1): |
| 46 | hw/intc/armv7m_nvic: Remove stale comment | 39 | hw/arm: Remove GPIO from unimplemented NPCM7XX |
| 47 | target/arm: Provide and use H8 and H1_8 macros | ||
| 48 | target/arm: Enable FPSCR.QC bit for MVE | ||
| 49 | target/arm: Handle VPR semantics in existing code | ||
| 50 | target/arm: Add handling for PSR.ECI/ICI | ||
| 51 | target/arm: Let vfp_access_check() handle late NOCP checks | ||
| 52 | target/arm: Implement MVE LCTP | ||
| 53 | target/arm: Implement MVE WLSTP insn | ||
| 54 | target/arm: Implement MVE DLSTP | ||
| 55 | target/arm: Implement MVE LETP insn | ||
| 56 | target/arm: Add framework for MVE decode | ||
| 57 | target/arm: Move expand_pred_b() data to vec_helper.c | ||
| 58 | bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations | ||
| 59 | include/qemu/int128.h: Add function to create Int128 from int64_t | ||
| 60 | 40 | ||
| 61 | Richard Henderson (4): | 41 | Mike Nawrocki (1): |
| 62 | target/arm: Diagnose UNALLOCATED in disas_simd_two_reg_misc_fp16 | 42 | target/arm: Fix SCR RES1 handling |
| 63 | target/arm: Remove fprintf from disas_simd_mod_imm | ||
| 64 | target/arm: Diagnose UNALLOCATED in disas_simd_three_reg_same_fp16 | ||
| 65 | target/arm: Fix mte page crossing test | ||
| 66 | 43 | ||
| 67 | include/qemu/bitops.h | 29 +++ | 44 | Peter Maydell (2): |
| 68 | include/qemu/int128.h | 10 + | 45 | arm: Update infocenter.arm.com URLs |
| 69 | target/arm/translate-a32.h | 2 + | 46 | accel/tcg: Add URL of clang bug to comment about our workaround |
| 70 | target/arm/translate.h | 9 + | ||
| 71 | target/arm/vec_internal.h | 9 + | ||
| 72 | target/arm/mve.decode | 20 ++ | ||
| 73 | target/arm/t32.decode | 15 +- | ||
| 74 | hw/arm/aspeed.c | 11 +- | ||
| 75 | hw/arm/npcm7xx_boards.c | 107 ++++++++++- | ||
| 76 | hw/arm/virt.c | 2 + | ||
| 77 | hw/intc/arm_gicv3_cpuif.c | 5 +- | ||
| 78 | hw/intc/armv7m_nvic.c | 6 - | ||
| 79 | target/arm/m_helper.c | 54 +++++- | ||
| 80 | target/arm/mte_helper.c | 2 +- | ||
| 81 | target/arm/sve_helper.c | 381 +++++++++++++------------------------- | ||
| 82 | target/arm/translate-a64.c | 87 +++++---- | ||
| 83 | target/arm/translate-m-nocp.c | 16 +- | ||
| 84 | target/arm/translate-mve.c | 29 +++ | ||
| 85 | target/arm/translate-vfp.c | 65 +++++-- | ||
| 86 | target/arm/translate.c | 300 ++++++++++++++++++++++++++++-- | ||
| 87 | target/arm/vec_helper.c | 116 +++++++++++- | ||
| 88 | target/arm/vfp_helper.c | 3 +- | ||
| 89 | tests/tcg/aarch64/mte-7.c | 31 ++++ | ||
| 90 | hw/arm/Kconfig | 2 + | ||
| 91 | target/arm/meson.build | 2 + | ||
| 92 | tests/tcg/aarch64/Makefile.target | 2 +- | ||
| 93 | 26 files changed, 967 insertions(+), 348 deletions(-) | ||
| 94 | create mode 100644 target/arm/mve.decode | ||
| 95 | create mode 100644 target/arm/translate-mve.c | ||
| 96 | create mode 100644 tests/tcg/aarch64/mte-7.c | ||
| 97 | 47 | ||
| 48 | Rebecca Cran (4): | ||
| 49 | target/arm: Add support for FEAT_DIT, Data Independent Timing | ||
| 50 | target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate | ||
| 51 | target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU | ||
| 52 | target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU | ||
| 53 | |||
| 54 | include/hw/dma/pl080.h | 7 ++-- | ||
| 55 | include/hw/misc/arm_integrator_debug.h | 2 +- | ||
| 56 | include/hw/ssi/pl022.h | 5 ++- | ||
| 57 | target/arm/cpu.h | 17 ++++++++ | ||
| 58 | target/arm/internals.h | 6 +++ | ||
| 59 | accel/tcg/cpu-exec.c | 25 +++++++++--- | ||
| 60 | hw/arm/aspeed_ast2600.c | 2 +- | ||
| 61 | hw/arm/musca.c | 4 +- | ||
| 62 | hw/arm/npcm7xx.c | 8 ---- | ||
| 63 | hw/arm/xlnx-versal.c | 4 +- | ||
| 64 | hw/misc/arm_integrator_debug.c | 2 +- | ||
| 65 | hw/timer/arm_timer.c | 7 ++-- | ||
| 66 | target/arm/cpu.c | 4 ++ | ||
| 67 | target/arm/cpu64.c | 5 +++ | ||
| 68 | target/arm/helper-a64.c | 27 +++++++++++-- | ||
| 69 | target/arm/helper.c | 71 +++++++++++++++++++++++++++------- | ||
| 70 | target/arm/machine.c | 2 +- | ||
| 71 | target/arm/op_helper.c | 9 +---- | ||
| 72 | target/arm/translate-a64.c | 12 ++++++ | ||
| 73 | 19 files changed, 164 insertions(+), 55 deletions(-) | ||
| 74 | diff view generated by jsdifflib |