[PULL 0/4] tcg patch queue
[PULL v2 00/34] tcg patch queue
1
The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
1
For version 2, drop the -static and -pie changes,
2
i.e. patches 1-7 from version 1.
2
3
3
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
4
I'll come back to those after the required linux-user changes are
5
upstream. In the meantime, it's still a large enough set of patches.
6
7
8
r~
9
10
11
12
The following changes since commit 3a63b24a1bbf166e6f455fe43a6bbd8dea413d92:
13
14
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200114-pull-request' into staging (2020-01-14 16:00:31 +0000)
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15
5
are available in the Git repository at:
16
are available in the Git repository at:
6
17
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
18
https://github.com/rth7680/qemu.git tags/pull-tcg-20200115
8
19
9
for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
20
for you to fetch changes up to 3e5a01ef0268ee4c9d342a26dbf6624d6b5b20d6:
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21
11
tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
22
MAINTAINERS: Replace Claudio Fontana for tcg/aarch64 (2020-01-15 15:13:10 -1000)
12
23
13
----------------------------------------------------------------
24
----------------------------------------------------------------
14
Minor gen-icount.h fix.
25
Add cpu_{ld,st}*_mmuidx_ra
15
BSD cpu_signal_handler fix.
26
Remove MMU_MODE*_SUFFIX
16
Add missing tcg_constant_tl symbol.
27
Move tcg headers under include/
17
28
18
----------------------------------------------------------------
29
----------------------------------------------------------------
19
Matheus Ferst (1):
30
Philippe Mathieu-Daudé (4):
20
tcg: Add tcg_constant_tl
31
tcg: Search includes from the project root source directory
32
tcg: Search includes in the parent source directory
33
tcg: Move TCG headers to include/tcg/
34
configure: Remove tcg/ from the preprocessor include search list
21
35
22
Philippe Mathieu-Daudé (2):
36
Richard Henderson (30):
23
MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section
37
target/xtensa: Use probe_access for itlb_hit_test
24
exec/gen-icount.h: Add missing "exec/exec-all.h" include
38
cputlb: Use trace_mem_get_info instead of trace_mem_build_info
39
trace: Remove trace_mem_build_info_no_se_[bl]e
40
target/s390x: Include tcg.h in mem_helper.c
41
target/arm: Include tcg.h in sve_helper.c
42
accel/tcg: Include tcg.h in tcg-runtime.c
43
linux-user: Include tcg.h in syscall.c
44
linux-user: Include trace-root.h in syscall-trace.h
45
plugins: Include trace/mem.h in api.c
46
cputlb: Move body of cpu_ldst_template.h out of line
47
translator: Use cpu_ld*_code instead of open-coding
48
cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_code
49
cputlb: Provide cpu_(ld,st}*_mmuidx_ra for user-only
50
target/i386: Use cpu_*_mmuidx_ra instead of templates
51
cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c
52
target/nios2: Remove MMU_MODE{0,1}_SUFFIX
53
target/alpha: Remove MMU_MODE{0,1}_SUFFIX
54
target/cris: Remove MMU_MODE{0,1}_SUFFIX
55
target/i386: Remove MMU_MODE{0,1,2}_SUFFIX
56
target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX
57
target/sh4: Remove MMU_MODE{0,1}_SUFFIX
58
target/unicore32: Remove MMU_MODE{0,1}_SUFFIX
59
target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX
60
target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIX
61
target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
62
target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
63
target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
64
cputlb: Remove support for MMU_MODE*_SUFFIX
65
cputlb: Expand cpu_ldst_template.h in cputlb.c
66
MAINTAINERS: Replace Claudio Fontana for tcg/aarch64
25
67
26
Warner Losh (1):
68
accel/tcg/atomic_template.h | 67 ++---
27
tcg: Use correct trap number for page faults on *BSD systems
69
include/exec/cpu_ldst.h | 446 +++++++++---------------------
70
include/exec/cpu_ldst_template.h | 211 --------------
71
include/exec/cpu_ldst_useronly_template.h | 159 -----------
72
include/exec/translator.h | 48 +---
73
{tcg => include/tcg}/tcg-gvec-desc.h | 0
74
{tcg => include/tcg}/tcg-mo.h | 0
75
{tcg => include/tcg}/tcg-op-gvec.h | 0
76
{tcg => include/tcg}/tcg-op.h | 2 +-
77
{tcg => include/tcg}/tcg-opc.h | 0
78
{tcg => include/tcg}/tcg.h | 33 +--
79
include/user/syscall-trace.h | 2 +
80
target/alpha/cpu.h | 2 -
81
target/cris/cpu.h | 2 -
82
target/i386/cpu.h | 3 -
83
target/m68k/cpu.h | 2 -
84
target/microblaze/cpu.h | 3 -
85
target/mips/cpu.h | 4 -
86
target/nios2/cpu.h | 2 -
87
target/ppc/cpu.h | 2 -
88
target/s390x/cpu.h | 5 -
89
target/sh4/cpu.h | 2 -
90
target/unicore32/cpu.h | 2 -
91
target/xtensa/cpu.h | 4 -
92
tcg/i386/tcg-target.h | 2 +-
93
trace/mem-internal.h | 17 --
94
accel/tcg/cpu-exec.c | 2 +-
95
accel/tcg/cputlb.c | 315 ++++++++++++++++-----
96
accel/tcg/tcg-runtime-gvec.c | 2 +-
97
accel/tcg/tcg-runtime.c | 1 +
98
accel/tcg/translate-all.c | 2 +-
99
accel/tcg/user-exec.c | 238 +++++++++++++++-
100
bsd-user/main.c | 2 +-
101
cpus.c | 2 +-
102
exec.c | 2 +-
103
linux-user/main.c | 2 +-
104
linux-user/syscall.c | 1 +
105
plugins/api.c | 1 +
106
target/alpha/translate.c | 2 +-
107
target/arm/helper-a64.c | 2 +-
108
target/arm/sve_helper.c | 1 +
109
target/arm/translate-a64.c | 4 +-
110
target/arm/translate-sve.c | 6 +-
111
target/arm/translate.c | 4 +-
112
target/cris/translate.c | 2 +-
113
target/hppa/translate.c | 2 +-
114
target/i386/mem_helper.c | 2 +-
115
target/i386/seg_helper.c | 56 ++--
116
target/i386/translate.c | 2 +-
117
target/lm32/translate.c | 2 +-
118
target/m68k/op_helper.c | 77 ++++--
119
target/m68k/translate.c | 2 +-
120
target/microblaze/translate.c | 2 +-
121
target/mips/op_helper.c | 182 ++++--------
122
target/mips/translate.c | 2 +-
123
target/moxie/translate.c | 2 +-
124
target/nios2/translate.c | 2 +-
125
target/openrisc/translate.c | 2 +-
126
target/ppc/mem_helper.c | 13 +-
127
target/ppc/translate.c | 4 +-
128
target/riscv/cpu_helper.c | 2 +-
129
target/riscv/translate.c | 2 +-
130
target/s390x/mem_helper.c | 11 +-
131
target/s390x/translate.c | 4 +-
132
target/sh4/translate.c | 2 +-
133
target/sparc/ldst_helper.c | 2 +-
134
target/sparc/translate.c | 2 +-
135
target/tilegx/translate.c | 2 +-
136
target/tricore/translate.c | 2 +-
137
target/unicore32/translate.c | 2 +-
138
target/xtensa/mmu_helper.c | 5 +-
139
target/xtensa/translate.c | 2 +-
140
tcg/aarch64/tcg-target.inc.c | 4 +-
141
tcg/arm/tcg-target.inc.c | 4 +-
142
tcg/i386/tcg-target.inc.c | 4 +-
143
tcg/mips/tcg-target.inc.c | 2 +-
144
tcg/optimize.c | 2 +-
145
tcg/ppc/tcg-target.inc.c | 4 +-
146
tcg/riscv/tcg-target.inc.c | 4 +-
147
tcg/s390/tcg-target.inc.c | 4 +-
148
tcg/sparc/tcg-target.inc.c | 2 +-
149
tcg/tcg-common.c | 2 +-
150
tcg/tcg-op-gvec.c | 8 +-
151
tcg/tcg-op-vec.c | 6 +-
152
tcg/tcg-op.c | 6 +-
153
tcg/tcg.c | 2 +-
154
tcg/tci.c | 2 +-
155
MAINTAINERS | 4 +-
156
configure | 1 -
157
docs/devel/loads-stores.rst | 215 ++++++++++----
158
90 files changed, 1037 insertions(+), 1240 deletions(-)
159
delete mode 100644 include/exec/cpu_ldst_template.h
160
delete mode 100644 include/exec/cpu_ldst_useronly_template.h
161
rename {tcg => include/tcg}/tcg-gvec-desc.h (100%)
162
rename {tcg => include/tcg}/tcg-mo.h (100%)
163
rename {tcg => include/tcg}/tcg-op-gvec.h (100%)
164
rename {tcg => include/tcg}/tcg-op.h (99%)
165
rename {tcg => include/tcg}/tcg-opc.h (100%)
166
rename {tcg => include/tcg}/tcg.h (96%)
28
167
29
include/exec/gen-icount.h | 1 +
30
include/tcg/tcg-op.h | 2 ++
31
accel/tcg/user-exec.c | 14 ++++++++++++--
32
MAINTAINERS | 1 +
33
4 files changed, 16 insertions(+), 2 deletions(-)
34
diff view generated by jsdifflib
[PULL 1/4] MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section
Deleted patch
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
1
3
As the 'Main Loop' section covers softmmu/icount.c,
4
add "exec/gen-icount.h" there too.
5
6
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
7
Message-Id: <20210422064128.2318616-2-f4bug@amsat.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
10
MAINTAINERS | 1 +
11
1 file changed, 1 insertion(+)
12
13
diff --git a/MAINTAINERS b/MAINTAINERS
14
index XXXXXXX..XXXXXXX 100644
15
--- a/MAINTAINERS
16
+++ b/MAINTAINERS
17
@@ -XXX,XX +XXX,XX @@ F: ui/cocoa.m
18
Main loop
19
M: Paolo Bonzini <pbonzini@redhat.com>
20
S: Maintained
21
+F: include/exec/gen-icount.h
22
F: include/qemu/main-loop.h
23
F: include/sysemu/runstate.h
24
F: include/sysemu/runstate-action.h
25
--
26
2.25.1
27
28
diff view generated by jsdifflib
[PULL 2/4] exec/gen-icount.h: Add missing "exec/exec-all.h" include
Deleted patch
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
1
3
When including "exec/gen-icount.h" we get:
4
5
include/exec/gen-icount.h: In function ‘gen_tb_start’:
6
include/exec/gen-icount.h:40:9: error: implicit declaration of function ‘tb_cflags’ [-Werror=implicit-function-declaration]
7
40 | if (tb_cflags(tb) & CF_USE_ICOUNT) {
8
| ^~~~~~~~~
9
include/exec/gen-icount.h:40:9: error: nested extern declaration of ‘tb_cflags’ [-Werror=nested-externs]
10
include/exec/gen-icount.h:40:25: error: ‘CF_USE_ICOUNT’ undeclared (first use in this function); did you mean ‘CPU_COUNT’?
11
40 | if (tb_cflags(tb) & CF_USE_ICOUNT) {
12
| ^~~~~~~~~~~~~
13
| CPU_COUNT
14
15
Since tb_cflags() is declared in "exec/exec-all.h", include this
16
header in "exec/gen-icount.h".
17
18
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
19
Message-Id: <20210422064128.2318616-3-f4bug@amsat.org>
20
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
21
---
22
include/exec/gen-icount.h | 1 +
23
1 file changed, 1 insertion(+)
24
25
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
26
index XXXXXXX..XXXXXXX 100644
27
--- a/include/exec/gen-icount.h
28
+++ b/include/exec/gen-icount.h
29
@@ -XXX,XX +XXX,XX @@
30
#ifndef GEN_ICOUNT_H
31
#define GEN_ICOUNT_H
32
33
+#include "exec/exec-all.h"
34
#include "qemu/timer.h"
35
36
/* Helpers for instruction counting code generation. */
37
--
38
2.25.1
39
40
diff view generated by jsdifflib
[PULL 3/4] tcg: Use correct trap number for page faults on *BSD systems
Deleted patch
1
From: Warner Losh <imp@bsdimp.com>
2
1
3
The trap number for a page fault on BSD systems is T_PAGEFLT not 0xe. 0xe is
4
used by Linux and represents the intel hardware trap vector. The BSD kernels,
5
however, translate this to T_PAGEFLT in their Xpage, Xtrap0e, Xtrap14, etc fault
6
handlers. This is true for i386 and x86_64, though the name of the trap hanlder
7
can very on the flavor of BSD. As far as I can tell, Linux doesn't provide a
8
define for this value. Invent a new one (PAGE_FAULT_TRAP) and use it instead to
9
avoid uglier ifdefs.
10
11
Signed-off-by: Mark Johnston <markj@FreeBSD.org>
12
Signed-off-by: Juergen Lock <nox@FreeBSD.org>
13
[ Rework to avoid ifdefs and expand it to i386 ]
14
Signed-off-by: Warner Losh <imp@bsdimp.com>
15
Message-Id: <20210506173826.72832-1-imp@bsdimp.com>
16
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17
---
18
accel/tcg/user-exec.c | 14 ++++++++++++--
19
1 file changed, 12 insertions(+), 2 deletions(-)
20
21
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
22
index XXXXXXX..XXXXXXX 100644
23
--- a/accel/tcg/user-exec.c
24
+++ b/accel/tcg/user-exec.c
25
@@ -XXX,XX +XXX,XX @@ void *probe_access(CPUArchState *env, target_ulong addr, int size,
26
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
27
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
28
#define MASK_sig(context) ((context)->uc_sigmask)
29
+#define PAGE_FAULT_TRAP T_PAGEFLT
30
#elif defined(__FreeBSD__) || defined(__DragonFly__)
31
#include <ucontext.h>
32
33
@@ -XXX,XX +XXX,XX @@ void *probe_access(CPUArchState *env, target_ulong addr, int size,
34
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
35
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
36
#define MASK_sig(context) ((context)->uc_sigmask)
37
+#define PAGE_FAULT_TRAP T_PAGEFLT
38
#elif defined(__OpenBSD__)
39
#define EIP_sig(context) ((context)->sc_eip)
40
#define TRAP_sig(context) ((context)->sc_trapno)
41
#define ERROR_sig(context) ((context)->sc_err)
42
#define MASK_sig(context) ((context)->sc_mask)
43
+#define PAGE_FAULT_TRAP T_PAGEFLT
44
#else
45
#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
46
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
47
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
48
#define MASK_sig(context) ((context)->uc_sigmask)
49
+#define PAGE_FAULT_TRAP 0xe
50
#endif
51
52
int cpu_signal_handler(int host_signum, void *pinfo,
53
@@ -XXX,XX +XXX,XX @@ int cpu_signal_handler(int host_signum, void *pinfo,
54
pc = EIP_sig(uc);
55
trapno = TRAP_sig(uc);
56
return handle_cpu_signal(pc, info,
57
- trapno == 0xe ? (ERROR_sig(uc) >> 1) & 1 : 0,
58
+ trapno == PAGE_FAULT_TRAP ?
59
+ (ERROR_sig(uc) >> 1) & 1 : 0,
60
&MASK_sig(uc));
61
}
62
63
@@ -XXX,XX +XXX,XX @@ int cpu_signal_handler(int host_signum, void *pinfo,
64
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
65
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
66
#define MASK_sig(context) ((context)->uc_sigmask)
67
+#define PAGE_FAULT_TRAP T_PAGEFLT
68
#elif defined(__OpenBSD__)
69
#define PC_sig(context) ((context)->sc_rip)
70
#define TRAP_sig(context) ((context)->sc_trapno)
71
#define ERROR_sig(context) ((context)->sc_err)
72
#define MASK_sig(context) ((context)->sc_mask)
73
+#define PAGE_FAULT_TRAP T_PAGEFLT
74
#elif defined(__FreeBSD__) || defined(__DragonFly__)
75
#include <ucontext.h>
76
77
@@ -XXX,XX +XXX,XX @@ int cpu_signal_handler(int host_signum, void *pinfo,
78
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
79
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
80
#define MASK_sig(context) ((context)->uc_sigmask)
81
+#define PAGE_FAULT_TRAP T_PAGEFLT
82
#else
83
#define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
84
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
85
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
86
#define MASK_sig(context) ((context)->uc_sigmask)
87
+#define PAGE_FAULT_TRAP 0xe
88
#endif
89
90
int cpu_signal_handler(int host_signum, void *pinfo,
91
@@ -XXX,XX +XXX,XX @@ int cpu_signal_handler(int host_signum, void *pinfo,
92
93
pc = PC_sig(uc);
94
return handle_cpu_signal(pc, info,
95
- TRAP_sig(uc) == 0xe ? (ERROR_sig(uc) >> 1) & 1 : 0,
96
+ TRAP_sig(uc) == PAGE_FAULT_TRAP ?
97
+ (ERROR_sig(uc) >> 1) & 1 : 0,
98
&MASK_sig(uc));
99
}
100
101
--
102
2.25.1
103
104
diff view generated by jsdifflib
[PULL 4/4] tcg: Add tcg_constant_tl
Deleted patch
1
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
2
1
3
Used in ppc D/DS/X-form load/store implementation.
4
5
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
6
Message-Id: <20210512185441.3619828-24-matheus.ferst@eldorado.org.br>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
include/tcg/tcg-op.h | 2 ++
10
1 file changed, 2 insertions(+)
11
12
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/include/tcg/tcg-op.h
15
+++ b/include/tcg/tcg-op.h
16
@@ -XXX,XX +XXX,XX @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
17
#define tcg_gen_sextract_tl tcg_gen_sextract_i64
18
#define tcg_gen_extract2_tl tcg_gen_extract2_i64
19
#define tcg_const_tl tcg_const_i64
20
+#define tcg_constant_tl tcg_constant_i64
21
#define tcg_const_local_tl tcg_const_local_i64
22
#define tcg_gen_movcond_tl tcg_gen_movcond_i64
23
#define tcg_gen_add2_tl tcg_gen_add2_i64
24
@@ -XXX,XX +XXX,XX @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
25
#define tcg_gen_sextract_tl tcg_gen_sextract_i32
26
#define tcg_gen_extract2_tl tcg_gen_extract2_i32
27
#define tcg_const_tl tcg_const_i32
28
+#define tcg_constant_tl tcg_constant_i32
29
#define tcg_const_local_tl tcg_const_local_i32
30
#define tcg_gen_movcond_tl tcg_gen_movcond_i32
31
#define tcg_gen_add2_tl tcg_gen_add2_i32
32
--
33
2.25.1
34
35
diff view generated by jsdifflib

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