From: Yuan Yao <yuan.yao@intel.com>
Add below APIs for reading/writing the physical memory, subsequent
patch will use them in monitor commands and gdbstub to support
encrypted guest debugging.
uint32_t x86_ldl_phys_debug(CPUState *cs, hwaddr addr);
uint64_t x86_ldq_phys_debug(CPUState *cs, hwaddr addr);
void cpu_physical_memory_rw_debug(hwaddr addr, void *buf,
hwaddr len, bool is_write);
void cpu_physical_memory_read_debug(hwaddr addr,
void *buf,
hwaddr len);
void cpu_physical_memory_write_debug(hwaddr addr,
const void *buf,
hwaddr len);
Signed-off-by: Yuan Yao <yuan.yao@intel.com>
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 5a0a2d93e0..f77a9ecb60 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -69,6 +69,8 @@ size_t qemu_ram_pagesize_largest(void);
void cpu_physical_memory_rw(hwaddr addr, void *buf,
hwaddr len, bool is_write);
+void cpu_physical_memory_rw_debug(hwaddr addr, void *buf,
+ hwaddr len, bool is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, hwaddr len)
{
@@ -79,6 +81,18 @@ static inline void cpu_physical_memory_write(hwaddr addr,
{
cpu_physical_memory_rw(addr, (void *)buf, len, true);
}
+
+static inline void cpu_physical_memory_read_debug(hwaddr addr,
+ void *buf, hwaddr len)
+{
+ cpu_physical_memory_rw_debug(addr, buf, len, false);
+}
+static inline void cpu_physical_memory_write_debug(hwaddr addr,
+ const void *buf, hwaddr len)
+{
+ cpu_physical_memory_rw_debug(addr, (void *)buf, len, true);
+}
+
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
bool is_write);
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index c8b56389d6..6d223ea196 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -60,6 +60,9 @@ typedef struct MemTxAttrs {
*/
#define MEMTXATTRS_UNSPECIFIED ((MemTxAttrs) { .unspecified = 1 })
+// Same as MEMTXATTRS_UNSPECIFIED but enable debug
+#define MEMTXATTRS_UNSPECIFIED_DEBUG ((MemTxAttrs) { .unspecified = 1, .debug = 1 })
+
/* New-style MMIO accessors can indicate that the transaction failed.
* A zero (MEMTX_OK) response means success; anything else is a failure
* of some kind. The memory subsystem will bitwise-OR together results
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 0fde02d325..ff6e215a3a 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -2910,6 +2910,19 @@ void cpu_physical_memory_rw(hwaddr addr, void *buf,
buf, len, is_write);
}
+void cpu_physical_memory_rw_debug(hwaddr addr, void *buf,
+ hwaddr len, bool is_write)
+{
+ if (is_write)
+ physical_memory_debug_ops->write(&address_space_memory,
+ addr, MEMTXATTRS_UNSPECIFIED_DEBUG,
+ buf, len);
+ else
+ physical_memory_debug_ops->read(&address_space_memory,
+ addr, MEMTXATTRS_UNSPECIFIED_DEBUG,
+ buf, len);
+}
+
enum write_rom_type {
WRITE_DATA,
FLUSH_CACHE,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e5dbe84d3a..7a8a1386fb 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1960,6 +1960,8 @@ void x86_stl_phys_notdirty(CPUState *cs, hwaddr addr, uint32_t val);
void x86_stw_phys(CPUState *cs, hwaddr addr, uint32_t val);
void x86_stl_phys(CPUState *cs, hwaddr addr, uint32_t val);
void x86_stq_phys(CPUState *cs, hwaddr addr, uint64_t val);
+uint32_t x86_ldl_phys_debug(CPUState *cs, hwaddr addr);
+uint64_t x86_ldq_phys_debug(CPUState *cs, hwaddr addr);
#endif
/* will be suppressed */
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 618ad1c409..21edcb9204 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -663,4 +663,30 @@ void x86_stq_phys(CPUState *cs, hwaddr addr, uint64_t val)
address_space_stq(as, addr, val, attrs, NULL);
}
+
+uint32_t x86_ldl_phys_debug(CPUState *cs, hwaddr addr)
+{
+ uint32_t ret;
+ MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED_DEBUG;
+ int as_id = cpu_asidx_from_attrs(cs, attrs);
+ struct AddressSpace *as = cpu_get_address_space(cs, as_id);
+
+ physical_memory_debug_ops->read(as, addr, attrs,
+ &ret, sizeof(ret));
+
+ return tswap32(ret);
+}
+
+uint64_t x86_ldq_phys_debug(CPUState *cs, hwaddr addr)
+{
+ uint64_t ret;
+ MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED_DEBUG;
+ int as_id = cpu_asidx_from_attrs(cs, attrs);
+ struct AddressSpace *as = cpu_get_address_space(cs, as_id);
+
+ physical_memory_debug_ops->read(as, addr, attrs,
+ &ret, sizeof(ret));
+
+ return tswap64(ret);
+}
#endif
--
2.20.1