[v1] aspeed queue

[PULL 00/18] aspeed queue

Posted by Cédric Le Goater 3 years ago

The following changes since commit 609d7596524ab204ccd71ef42c9eee4c7c338ea4:

  Update version for v6.0.0 release (2021-04-29 18:05:29 +0100)

are available in the Git repository at:

  https://github.com/legoater/qemu/ tags/pull-aspeed-20210430

for you to fetch changes up to 1401dcd8aac9039797b995bfab078877a820c9c5:

  aspeed: Add support for the quanta-q7l1-bmc board (2021-04-30 10:30:42 +0200)

----------------------------------------------------------------
Aspeed patches :

* Fixes for the DMA space
* New model for ASPEED's Hash and Crypto Engine (Joel and Klaus)
* Acceptance tests (Joel)
* A fix for the XDMA  model
* Some extra features for the SMC controller.
* Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick)

----------------------------------------------------------------
Cédric Le Goater (11):
      aspeed/smc: Use the RAM memory region for DMAs
      aspeed/smc: Remove unused "sdram-base" property
      aspeed/i2c: Fix DMA address mask
      aspeed/i2c: Rename DMA address space
      hw/misc/aspeed_xdma: Add AST2600 support
      aspeed/smc: Add a 'features' attribute to the object class
      aspeed/smc: Add extra controls to request DMA
      tests/qtest: Rename m25p80 test in aspeed_smc test
      aspeed: Deprecate the swift-bmc machine
      aspeed: Add support for the rainier-bmc board
      hw/block: m25p80: Add support for mt25ql02g and mt25qu02g

Joel Stanley (5):
      hw: Model ASPEED's Hash and Crypto Engine
      aspeed: Integrate HACE
      tests/qtest: Add test for Aspeed HACE
      tests/acceptance: Test ast2400 and ast2500 machines
      tests/acceptance: Test ast2600 machine

Patrick Venture (1):
      aspeed: Add support for the quanta-q7l1-bmc board

Philippe Mathieu-Daudé (1):
      hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias

 docs/system/arm/aspeed.rst                       |   2 +-
 docs/system/deprecated.rst                       |   7 +
 include/hw/arm/aspeed_soc.h                      |   3 +
 include/hw/misc/aspeed_hace.h                    |  43 +++
 include/hw/misc/aspeed_xdma.h                    |  17 +-
 include/hw/ssi/aspeed_smc.h                      |   7 +-
 hw/arm/aspeed.c                                  | 146 ++++++-
 hw/arm/aspeed_ast2600.c                          |  22 +-
 hw/arm/aspeed_soc.c                              |  23 +-
 hw/block/m25p80.c                                |   2 +
 hw/i2c/aspeed_i2c.c                              |   5 +-
 hw/misc/aspeed_hace.c                            | 389 +++++++++++++++++++
 hw/misc/aspeed_xdma.c                            | 124 ++++--
 hw/ssi/aspeed_smc.c                              | 119 ++++--
 tests/qtest/aspeed_hace-test.c                   | 469 +++++++++++++++++++++++
 tests/qtest/{m25p80-test.c => aspeed_smc-test.c} |  12 +-
 MAINTAINERS                                      |   1 +
 hw/misc/meson.build                              |   1 +
 tests/acceptance/boot_linux_console.py           |  68 ++++
 tests/qtest/meson.build                          |   5 +-
 20 files changed, 1389 insertions(+), 76 deletions(-)
 create mode 100644 include/hw/misc/aspeed_hace.h
 create mode 100644 hw/misc/aspeed_hace.c
 create mode 100644 tests/qtest/aspeed_hace-test.c
 rename tests/qtest/{m25p80-test.c => aspeed_smc-test.c} (96%)

Re: [PULL 00/18] aspeed queue

Posted by Cédric Le Goater 3 years ago

Peter,

On 4/30/21 6:33 PM, Cédric Le Goater wrote:
> The following changes since commit 609d7596524ab204ccd71ef42c9eee4c7c338ea4:
> 
>   Update version for v6.0.0 release (2021-04-29 18:05:29 +0100)
> 
> are available in the Git repository at:
> 
>   https://github.com/legoater/qemu/ tags/pull-aspeed-20210430
> 
> for you to fetch changes up to 1401dcd8aac9039797b995bfab078877a820c9c5:
> 
>   aspeed: Add support for the quanta-q7l1-bmc board (2021-04-30 10:30:42 +0200)
> 
> ----------------------------------------------------------------
> Aspeed patches :
> 
> * Fixes for the DMA space
> * New model for ASPEED's Hash and Crypto Engine (Joel and Klaus)
> * Acceptance tests (Joel)
> * A fix for the XDMA  model
> * Some extra features for the SMC controller.
> * Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick)

I sent the patchset in two rounds: 0-9 and 10-18, so the threading 
is broken :/ Sorry about that.

Thanks,

C.

Re: [PULL 00/18] aspeed queue

Posted by Peter Maydell 3 years ago

On Fri, 30 Apr 2021 at 17:33, Cédric Le Goater <clg@kaod.org> wrote:
>
> The following changes since commit 609d7596524ab204ccd71ef42c9eee4c7c338ea4:
>
>   Update version for v6.0.0 release (2021-04-29 18:05:29 +0100)
>
> are available in the Git repository at:
>
>   https://github.com/legoater/qemu/ tags/pull-aspeed-20210430
>
> for you to fetch changes up to 1401dcd8aac9039797b995bfab078877a820c9c5:
>
>   aspeed: Add support for the quanta-q7l1-bmc board (2021-04-30 10:30:42 +0200)
>
> ----------------------------------------------------------------
> Aspeed patches :
>
> * Fixes for the DMA space
> * New model for ASPEED's Hash and Crypto Engine (Joel and Klaus)
> * Acceptance tests (Joel)
> * A fix for the XDMA  model
> * Some extra features for the SMC controller.
> * Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick)
>

Fails to build, OSX:

../../hw/misc/aspeed_hace.c:128:49: error: incompatible pointer types
passing 'size_t *' (aka 'unsigned long *') to parameter of type
'hwaddr *' (aka 'unsigned long long *')
[-Werror,-Wincompatible-pointer-types]
                                                &iov[i].iov_len, false,
                                                ^~~~~~~~~~~~~~~
/Users/pm215/src/qemu-for-merges/include/exec/memory.h:2439:33: note:
passing argument to parameter 'plen' here
                        hwaddr *plen, bool is_write, MemTxAttrs attrs);
                                ^
1 error generated.

(OpenBSD reports the same, but there it is only a warning.)

Same thing is also a build failure on 32-bit hosts (where the types
are genuinely different sizes):

../../hw/misc/aspeed_hace.c: In function 'do_hash_operation':
../../hw/misc/aspeed_hace.c:128:49: error: passing argument 3 of
'address_space_map' from incompatible pointer type
[-Werror=incompatible-pointer-types]
                                                 &iov[i].iov_len, false,
                                                 ^
In file included from /home/peter.maydell/qemu/include/hw/sysbus.h:7:0,
                 from /home/peter.maydell/qemu/include/hw/misc/aspeed_hace.h:12,
                 from ../../hw/misc/aspeed_hace.c:14:
/home/peter.maydell/qemu/include/exec/memory.h:2438:7: note: expected
'hwaddr * {aka long long unsigned int *}' but argument is of type
'size_t * {aka unsigned int *}'
 void *address_space_map(AddressSpace *as, hwaddr addr,
       ^~~~~~~~~~~~~~~~~

thanks
-- PMM

Re: [PULL 00/18] aspeed queue

Posted by Peter Maydell 3 years ago

On Fri, 30 Apr 2021 at 23:17, Peter Maydell <peter.maydell@linaro.org> wrote:
> Same thing is also a build failure on 32-bit hosts (where the types
> are genuinely different sizes):
>
> ../../hw/misc/aspeed_hace.c: In function 'do_hash_operation':
> ../../hw/misc/aspeed_hace.c:128:49: error: passing argument 3 of
> 'address_space_map' from incompatible pointer type
> [-Werror=incompatible-pointer-types]
>                                                  &iov[i].iov_len, false,
>                                                  ^
> In file included from /home/peter.maydell/qemu/include/hw/sysbus.h:7:0,
>                  from /home/peter.maydell/qemu/include/hw/misc/aspeed_hace.h:12,
>                  from ../../hw/misc/aspeed_hace.c:14:
> /home/peter.maydell/qemu/include/exec/memory.h:2438:7: note: expected
> 'hwaddr * {aka long long unsigned int *}' but argument is of type
> 'size_t * {aka unsigned int *}'
>  void *address_space_map(AddressSpace *as, hwaddr addr,
>        ^~~~~~~~~~~~~~~~~

If you like you can repro this on the gitlab CI where we have
cross-build jobs for the 32-bit targets, eg:
https://gitlab.com/qemu-project/qemu/-/jobs/1227559504

-- PMM

Re: [PULL 00/18] aspeed queue

Posted by Cédric Le Goater 3 years ago

On 5/1/21 12:18 AM, Peter Maydell wrote:
> On Fri, 30 Apr 2021 at 23:17, Peter Maydell <peter.maydell@linaro.org> wrote:
>> Same thing is also a build failure on 32-bit hosts (where the types
>> are genuinely different sizes):
>>
>> ../../hw/misc/aspeed_hace.c: In function 'do_hash_operation':
>> ../../hw/misc/aspeed_hace.c:128:49: error: passing argument 3 of
>> 'address_space_map' from incompatible pointer type
>> [-Werror=incompatible-pointer-types]
>>                                                  &iov[i].iov_len, false,
>>                                                  ^
>> In file included from /home/peter.maydell/qemu/include/hw/sysbus.h:7:0,
>>                  from /home/peter.maydell/qemu/include/hw/misc/aspeed_hace.h:12,
>>                  from ../../hw/misc/aspeed_hace.c:14:
>> /home/peter.maydell/qemu/include/exec/memory.h:2438:7: note: expected
>> 'hwaddr * {aka long long unsigned int *}' but argument is of type
>> 'size_t * {aka unsigned int *}'
>>  void *address_space_map(AddressSpace *as, hwaddr addr,
>>        ^~~~~~~~~~~~~~~~~
> 
> If you like you can repro this on the gitlab CI where we have
> cross-build jobs for the 32-bit targets, eg:
> https://gitlab.com/qemu-project/qemu/-/jobs/1227559504

Yes. It is time for me to migrate. I will send a fixed v2
when this is done.

Thanks,

C.