target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes

[PATCH] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes

Philippe Mathieu-Daudé posted 1 patch 3 years ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20210421185007.2231855-1-f4bug@amsat.org

Maintainers: Aurelien Jarno <aurelien@aurel32.net>, Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, Jiaxun Yang <jiaxun.yang@flygoat.com>

target/mips/translate.c | 2 ++
1 file changed, 2 insertions(+)

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[PATCH] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes

Posted by Philippe Mathieu-Daudé 3 years ago

Per the nanoMIPS32 Instruction Set Technical Reference Manual,
Revision 01.01, Chapter 3. "Instruction Definitions":

The Read/Write Previous GPR opcodes "require CP0 privilege".

Add the missing CP0 checks.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 5dad75cdf37..8a0a2197426 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -18969,9 +18969,11 @@ static void gen_pool32axf_nanomips_insn(CPUMIPSState *env, DisasContext *ctx)
             }
             break;
         case NM_RDPGPR:
+            check_cp0_enabled(ctx);
             gen_load_srsgpr(rs, rt);
             break;
         case NM_WRPGPR:
+            check_cp0_enabled(ctx);
             gen_store_srsgpr(rs, rt);
             break;
         case NM_WAIT:
-- 
2.26.3

Re: [PATCH] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes

Posted by Richard Henderson 3 years ago

On 4/21/21 11:50 AM, Philippe Mathieu-Daudé wrote:
> Per the nanoMIPS32 Instruction Set Technical Reference Manual,
> Revision 01.01, Chapter 3. "Instruction Definitions":
> 
> The Read/Write Previous GPR opcodes "require CP0 privilege".
> 
> Add the missing CP0 checks.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/mips/translate.c | 2 ++
>   1 file changed, 2 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes

Posted by Philippe Mathieu-Daudé 3 years ago

On 4/21/21 8:50 PM, Philippe Mathieu-Daudé wrote:
> Per the nanoMIPS32 Instruction Set Technical Reference Manual,
> Revision 01.01, Chapter 3. "Instruction Definitions":
> 
> The Read/Write Previous GPR opcodes "require CP0 privilege".
> 
> Add the missing CP0 checks.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/translate.c | 2 ++
>  1 file changed, 2 insertions(+)

Thanks, applied to mips-next.