[PULL 0/3] target-arm queue
[PULL v2 00/57] target-arm queue
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A few last patches to go in for rc3...
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Squashed in a trivial fix for 32-bit hosts:
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The following changes since commit c1e90def01bdb8fcbdbebd9d1eaa8e4827ece620:
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--- a/target/arm/mve_helper.c
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+++ b/target/arm/mve_helper.c
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@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
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acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
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m[H##ESIZE(e)])); \
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} \
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- acc = int128_add(acc, 1 << 7); \
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+ acc = int128_add(acc, int128_make64(1 << 7)); \
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} \
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} \
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mve_advance_vpt(env); \
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14
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210412' into staging (2021-04-12 12:12:09 +0100)
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-- PMM
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The following changes since commit 53f306f316549d20c76886903181413d20842423:
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Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210413
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
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for you to fetch changes up to 2d18b4ca023ca1a3aee18064251d6e6e1084f3eb:
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for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
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sphinx: qapidoc: Wrap "If" section body in a paragraph node (2021-04-13 10:14:58 +0100)
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docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Fix MPC setting for AN524 SRAM block
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* Don't require 'virt' board to be compiled in for ACPI GHES code
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* sphinx: qapidoc: Wrap "If" section body in a paragraph node
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* docs: Document which architecture extensions we emulate
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* Fix bugs in M-profile FPCXT_NS accesses
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* First slice of MVE patches
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* Implement MTE3
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* docs/system: arm: Add nRF boards description
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37
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----------------------------------------------------------------
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----------------------------------------------------------------
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John Snow (1):
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Alexandre Iooss (1):
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sphinx: qapidoc: Wrap "If" section body in a paragraph node
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docs/system: arm: Add nRF boards description
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Peter Maydell (2):
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Peter Collingbourne (1):
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hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block
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target/arm: Implement MTE3
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hw/arm/mps2-tz: Assert if more than one RAM is attached to an MPC
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docs/sphinx/qapidoc.py | 4 +++-
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Peter Maydell (55):
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hw/arm/mps2-tz.c | 10 +++++++---
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hw/acpi: Provide stub version of acpi_ghes_record_errors()
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2 files changed, 10 insertions(+), 4 deletions(-)
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hw/acpi: Provide function acpi_ghes_present()
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target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
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docs/system/arm: Document which architecture extensions we emulate
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target/arm/translate-vfp.c: Whitespace fixes
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target/arm: Handle FPU being disabled in FPCXT_NS accesses
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target/arm: Don't NOCP fault for FPCXT_NS accesses
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target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
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target/arm: Factor FP context update code out into helper function
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target/arm: Split vfp_access_check() into A and M versions
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target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
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target/arm: Implement MVE VLDR/VSTR (non-widening forms)
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target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
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target/arm: Implement MVE VCLZ
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target/arm: Implement MVE VCLS
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target/arm: Implement MVE VREV16, VREV32, VREV64
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target/arm: Implement MVE VMVN (register)
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target/arm: Implement MVE VABS
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target/arm: Implement MVE VNEG
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tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
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target/arm: Implement MVE VDUP
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target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
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target/arm: Implement MVE VADD, VSUB, VMUL
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target/arm: Implement MVE VMULH
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target/arm: Implement MVE VRMULH
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target/arm: Implement MVE VMAX, VMIN
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target/arm: Implement MVE VABD
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target/arm: Implement MVE VHADD, VHSUB
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target/arm: Implement MVE VMULL
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target/arm: Implement MVE VMLALDAV
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target/arm: Implement MVE VMLSLDAV
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target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
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target/arm: Implement MVE VADD (scalar)
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target/arm: Implement MVE VSUB, VMUL (scalar)
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target/arm: Implement MVE VHADD, VHSUB (scalar)
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target/arm: Implement MVE VBRSR
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target/arm: Implement MVE VPST
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target/arm: Implement MVE VQADD and VQSUB
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target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
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target/arm: Implement MVE VQDMULL scalar
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target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
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target/arm: Implement MVE VQADD, VQSUB (vector)
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target/arm: Implement MVE VQSHL (vector)
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target/arm: Implement MVE VQRSHL
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target/arm: Implement MVE VSHL insn
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target/arm: Implement MVE VRSHL
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target/arm: Implement MVE VQDMLADH and VQRDMLADH
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target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
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target/arm: Implement MVE VQDMULL (vector)
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target/arm: Implement MVE VRHADD
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target/arm: Implement MVE VADC, VSBC
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target/arm: Implement MVE VCADD
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target/arm: Implement MVE VHCADD
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target/arm: Implement MVE VADDV
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target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
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docs/system/arm/emulation.rst | 103 ++++
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docs/system/arm/nrf.rst | 51 ++
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docs/system/target-arm.rst | 7 +
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include/hw/acpi/ghes.h | 9 +
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include/tcg/tcg-op.h | 8 +
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include/tcg/tcg.h | 1 -
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target/arm/helper-mve.h | 357 +++++++++++++
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target/arm/helper.h | 2 +
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target/arm/internals.h | 11 +
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target/arm/translate-a32.h | 3 +
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target/arm/translate.h | 10 +
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target/arm/m-nocp.decode | 24 +
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target/arm/mve.decode | 240 +++++++++
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target/arm/vfp.decode | 14 -
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hw/acpi/ghes-stub.c | 22 +
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hw/acpi/ghes.c | 17 +
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target/arm/cpu64.c | 2 +-
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target/arm/kvm64.c | 6 +-
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target/arm/mte_helper.c | 82 +--
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target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
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target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
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target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
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target/arm/translate-vfp.c | 741 +++++++-------------------
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tcg/tcg-op-gvec.c | 20 +-
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MAINTAINERS | 1 +
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hw/acpi/meson.build | 6 +-
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target/arm/meson.build | 1 +
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27 files changed, 3578 insertions(+), 629 deletions(-)
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create mode 100644 docs/system/arm/emulation.rst
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create mode 100644 docs/system/arm/nrf.rst
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create mode 100644 target/arm/helper-mve.h
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create mode 100644 hw/acpi/ghes-stub.c
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create mode 100644 target/arm/mve_helper.c
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diff view generated by jsdifflib
[PULL 1/3] hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block
Deleted patch
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The AN524 has three MPCs: one for the BRAM, one for the QSPI flash,
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and one for the DDR. We incorrectly set the .mpc field in the
3
RAMInfo struct for the SRAM block to 1, giving it the same MPC we are
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using for the QSPI. The effect of this was that the QSPI didn't get
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mapped into the system address space at all, via an MPC or otherwise,
6
and guest programs which tried to read from the QSPI would get a bus
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error. Correct the SRAM RAMInfo to indicate that it does not have an
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associated MPC.
9
1
10
Fixes: 25ff112a8cc ("hw/arm/mps2-tz: Add new mps3-an524 board")
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Message-id: 20210409150527.15053-2-peter.maydell@linaro.org
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---
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hw/arm/mps2-tz.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/mps2-tz.c
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+++ b/hw/arm/mps2-tz.c
23
@@ -XXX,XX +XXX,XX @@ static const RAMInfo an524_raminfo[] = { {
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.name = "sram",
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.base = 0x20000000,
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.size = 32 * 4 * KiB,
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- .mpc = 1,
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+ .mpc = -1,
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.mrindex = 1,
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}, {
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/* We don't model QSPI flash yet; for now expose it as simple ROM */
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--
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2.20.1
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diff view generated by jsdifflib
[PULL 2/3] hw/arm/mps2-tz: Assert if more than one RAM is attached to an MPC
Deleted patch
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Each board in mps2-tz.c specifies a RAMInfo[] array providing
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information about each RAM in the board. The .mpc field of the
3
RAMInfo struct specifies which MPC, if any, the RAM is attached to.
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We already assert if the array doesn't have any entry for an MPC, but
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we don't diagnose the error of using the same MPC number twice (which
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is quite easy to do by accident if copy-and-pasting structure
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entries).
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1
9
Enhance find_raminfo_for_mpc() so that it detects multiple entries
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for the MPC as well as missing entries.
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Message-id: 20210409150527.15053-3-peter.maydell@linaro.org
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---
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hw/arm/mps2-tz.c | 8 ++++++--
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1 file changed, 6 insertions(+), 2 deletions(-)
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diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
21
index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/mps2-tz.c
23
+++ b/hw/arm/mps2-tz.c
24
@@ -XXX,XX +XXX,XX @@ static const RAMInfo *find_raminfo_for_mpc(MPS2TZMachineState *mms, int mpc)
25
{
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MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
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const RAMInfo *p;
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+ const RAMInfo *found = NULL;
29
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for (p = mmc->raminfo; p->name; p++) {
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if (p->mpc == mpc && !(p->flags & IS_ALIAS)) {
32
- return p;
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+ /* There should only be one entry in the array for this MPC */
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+ g_assert(!found);
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+ found = p;
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}
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}
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/* if raminfo array doesn't have an entry for each MPC this is a bug */
39
- g_assert_not_reached();
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+ assert(found);
41
+ return found;
42
}
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static MemoryRegion *mr_for_raminfo(MPS2TZMachineState *mms,
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--
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2.20.1
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diff view generated by jsdifflib
[PULL 3/3] sphinx: qapidoc: Wrap "If" section body in a paragraph node
Deleted patch
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From: John Snow <jsnow@redhat.com>
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1
3
These sections need to be wrapped in a block-level element, such as
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Paragraph in order for them to be rendered into Texinfo correctly.
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6
Before (e.g.):
7
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<section ids="qapidoc-713">
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<title>If</title>
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<literal>defined(CONFIG_REPLICATION)</literal>
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</section>
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became:
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.SS If
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\fBdefined(CONFIG_REPLICATION)\fP.SS \fBBlockdevOptionsReplication\fP (Object)
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...
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After:
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<section ids="qapidoc-713">
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<title>If</title>
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<paragraph>
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<literal>defined(CONFIG_REPLICATION)</literal>
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</paragraph>
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</section>
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becomes:
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30
.SS If
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.sp
32
\fBdefined(CONFIG_REPLICATION)\fP
33
.SS \fBBlockdevOptionsReplication\fP (Object)
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...
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Reported-by: Markus Armbruster <armbru@redhat.com>
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Tested-by: Markus Armbruster <armbru@redhat.com>
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Signed-off-by: John Snow <jsnow@redhat.com>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Message-id: 20210406141909.1992225-2-jsnow@redhat.com
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
42
---
43
docs/sphinx/qapidoc.py | 4 +++-
44
1 file changed, 3 insertions(+), 1 deletion(-)
45
46
diff --git a/docs/sphinx/qapidoc.py b/docs/sphinx/qapidoc.py
47
index XXXXXXX..XXXXXXX 100644
48
--- a/docs/sphinx/qapidoc.py
49
+++ b/docs/sphinx/qapidoc.py
50
@@ -XXX,XX +XXX,XX @@ def _nodes_for_if_section(self, ifcond):
51
nodelist = []
52
if ifcond:
53
snode = self._make_section('If')
54
- snode += self._nodes_for_ifcond(ifcond, with_if=False)
55
+ snode += nodes.paragraph(
56
+ '', '', *self._nodes_for_ifcond(ifcond, with_if=False)
57
+ )
58
nodelist.append(snode)
59
return nodelist
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--
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2.20.1
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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