[PULL 0/3] target-arm queue
[PULL v2 00/29] target-arm queue
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A few last patches to go in for rc3...
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v2: drop pvpanic-pci patches.
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The following changes since commit c1e90def01bdb8fcbdbebd9d1eaa8e4827ece620:
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The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210412' into staging (2021-04-12 12:12:09 +0100)
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210413
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
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for you to fetch changes up to 2d18b4ca023ca1a3aee18064251d6e6e1084f3eb:
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for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
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sphinx: qapidoc: Wrap "If" section body in a paragraph node (2021-04-13 10:14:58 +0100)
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docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Fix MPC setting for AN524 SRAM block
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* Implement IMPDEF pauth algorithm
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* sphinx: qapidoc: Wrap "If" section body in a paragraph node
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* Support ARMv8.4-SEL2
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* Fix bug where we were truncating predicate vector lengths in SVE insns
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* npcm7xx_adc-test: Fix memleak in adc_qom_set
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* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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* docs: Build and install all the docs in a single manual
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----------------------------------------------------------------
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----------------------------------------------------------------
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John Snow (1):
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Gan Qixin (1):
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sphinx: qapidoc: Wrap "If" section body in a paragraph node
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npcm7xx_adc-test: Fix memleak in adc_qom_set
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Peter Maydell (2):
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Peter Maydell (1):
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hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block
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docs: Build and install all the docs in a single manual
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hw/arm/mps2-tz: Assert if more than one RAM is attached to an MPC
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docs/sphinx/qapidoc.py | 4 +++-
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Philippe Mathieu-Daudé (1):
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hw/arm/mps2-tz.c | 10 +++++++---
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target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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2 files changed, 10 insertions(+), 4 deletions(-)
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Richard Henderson (7):
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target/arm: Implement an IMPDEF pauth algorithm
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target/arm: Add cpu properties to control pauth
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target/arm: Use object_property_add_bool for "sve" property
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target/arm: Introduce PREDDESC field definitions
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target/arm: Update PFIRST, PNEXT for pred_desc
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target/arm: Update ZIP, UZP, TRN for pred_desc
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target/arm: Update REV, PUNPK for pred_desc
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Rémi Denis-Courmont (19):
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target/arm: remove redundant tests
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target/arm: add arm_is_el2_enabled() helper
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target/arm: use arm_is_el2_enabled() where applicable
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target/arm: use arm_hcr_el2_eff() where applicable
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target/arm: factor MDCR_EL2 common handling
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target/arm: Define isar_feature function to test for presence of SEL2
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target/arm: add 64-bit S-EL2 to EL exception table
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target/arm: add MMU stage 1 for Secure EL2
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target/arm: add ARMv8.4-SEL2 system registers
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target/arm: handle VMID change in secure state
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target/arm: do S1_ptw_translate() before address space lookup
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target/arm: translate NS bit in page-walks
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target/arm: generalize 2-stage page-walk condition
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target/arm: secure stage 2 translation regime
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target/arm: set HPFAR_EL2.NS on secure stage 2 faults
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target/arm: revector to run-time pick target EL
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target/arm: Implement SCR_EL2.EEL2
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target/arm: enable Secure EL2 in max CPU
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target/arm: refactor vae1_tlbmask()
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docs/conf.py | 46 ++++-
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docs/devel/conf.py | 15 --
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docs/index.html.in | 17 --
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docs/interop/conf.py | 28 ---
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docs/meson.build | 64 +++---
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docs/specs/conf.py | 16 --
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docs/system/arm/cpu-features.rst | 21 ++
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docs/system/conf.py | 28 ---
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docs/tools/conf.py | 37 ----
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docs/user/conf.py | 15 --
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include/qemu/xxhash.h | 98 +++++++++
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target/arm/cpu-param.h | 2 +-
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target/arm/cpu.h | 107 ++++++++--
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target/arm/internals.h | 45 +++++
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target/arm/cpu.c | 23 ++-
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target/arm/cpu64.c | 65 ++++--
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target/arm/helper-a64.c | 8 +-
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target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
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target/arm/m_helper.c | 2 +-
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target/arm/monitor.c | 1 +
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target/arm/op_helper.c | 4 +-
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target/arm/pauth_helper.c | 27 ++-
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target/arm/sve_helper.c | 33 ++--
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target/arm/tlb_helper.c | 3 +
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target/arm/translate-a64.c | 4 +
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target/arm/translate-sve.c | 31 ++-
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target/arm/translate.c | 36 +++-
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tests/qtest/arm-cpu-features.c | 13 ++
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tests/qtest/npcm7xx_adc-test.c | 1 +
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.gitlab-ci.yml | 4 +-
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30 files changed, 770 insertions(+), 438 deletions(-)
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delete mode 100644 docs/devel/conf.py
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delete mode 100644 docs/index.html.in
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delete mode 100644 docs/interop/conf.py
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delete mode 100644 docs/specs/conf.py
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delete mode 100644 docs/system/conf.py
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delete mode 100644 docs/tools/conf.py
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delete mode 100644 docs/user/conf.py
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diff view generated by jsdifflib
[PULL 1/3] hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block
Deleted patch
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The AN524 has three MPCs: one for the BRAM, one for the QSPI flash,
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and one for the DDR. We incorrectly set the .mpc field in the
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RAMInfo struct for the SRAM block to 1, giving it the same MPC we are
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using for the QSPI. The effect of this was that the QSPI didn't get
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mapped into the system address space at all, via an MPC or otherwise,
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and guest programs which tried to read from the QSPI would get a bus
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error. Correct the SRAM RAMInfo to indicate that it does not have an
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associated MPC.
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1
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Fixes: 25ff112a8cc ("hw/arm/mps2-tz: Add new mps3-an524 board")
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Message-id: 20210409150527.15053-2-peter.maydell@linaro.org
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---
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hw/arm/mps2-tz.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/mps2-tz.c
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+++ b/hw/arm/mps2-tz.c
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@@ -XXX,XX +XXX,XX @@ static const RAMInfo an524_raminfo[] = { {
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.name = "sram",
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.base = 0x20000000,
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.size = 32 * 4 * KiB,
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- .mpc = 1,
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+ .mpc = -1,
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.mrindex = 1,
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}, {
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/* We don't model QSPI flash yet; for now expose it as simple ROM */
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--
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2.20.1
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diff view generated by jsdifflib
[PULL 2/3] hw/arm/mps2-tz: Assert if more than one RAM is attached to an MPC
Deleted patch
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Each board in mps2-tz.c specifies a RAMInfo[] array providing
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information about each RAM in the board. The .mpc field of the
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RAMInfo struct specifies which MPC, if any, the RAM is attached to.
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We already assert if the array doesn't have any entry for an MPC, but
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we don't diagnose the error of using the same MPC number twice (which
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is quite easy to do by accident if copy-and-pasting structure
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entries).
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1
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Enhance find_raminfo_for_mpc() so that it detects multiple entries
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for the MPC as well as missing entries.
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Message-id: 20210409150527.15053-3-peter.maydell@linaro.org
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---
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hw/arm/mps2-tz.c | 8 ++++++--
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1 file changed, 6 insertions(+), 2 deletions(-)
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diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/mps2-tz.c
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+++ b/hw/arm/mps2-tz.c
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@@ -XXX,XX +XXX,XX @@ static const RAMInfo *find_raminfo_for_mpc(MPS2TZMachineState *mms, int mpc)
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{
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MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
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const RAMInfo *p;
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+ const RAMInfo *found = NULL;
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for (p = mmc->raminfo; p->name; p++) {
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if (p->mpc == mpc && !(p->flags & IS_ALIAS)) {
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- return p;
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+ /* There should only be one entry in the array for this MPC */
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+ g_assert(!found);
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+ found = p;
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}
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}
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/* if raminfo array doesn't have an entry for each MPC this is a bug */
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- g_assert_not_reached();
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+ assert(found);
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+ return found;
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}
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static MemoryRegion *mr_for_raminfo(MPS2TZMachineState *mms,
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--
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2.20.1
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diff view generated by jsdifflib
[PULL 3/3] sphinx: qapidoc: Wrap "If" section body in a paragraph node
Deleted patch
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From: John Snow <jsnow@redhat.com>
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1
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These sections need to be wrapped in a block-level element, such as
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Paragraph in order for them to be rendered into Texinfo correctly.
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Before (e.g.):
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<section ids="qapidoc-713">
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<title>If</title>
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<literal>defined(CONFIG_REPLICATION)</literal>
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</section>
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became:
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.SS If
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\fBdefined(CONFIG_REPLICATION)\fP.SS \fBBlockdevOptionsReplication\fP (Object)
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...
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After:
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<section ids="qapidoc-713">
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<title>If</title>
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<paragraph>
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<literal>defined(CONFIG_REPLICATION)</literal>
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</paragraph>
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</section>
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becomes:
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.SS If
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.sp
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\fBdefined(CONFIG_REPLICATION)\fP
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.SS \fBBlockdevOptionsReplication\fP (Object)
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...
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Reported-by: Markus Armbruster <armbru@redhat.com>
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Tested-by: Markus Armbruster <armbru@redhat.com>
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Signed-off-by: John Snow <jsnow@redhat.com>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Message-id: 20210406141909.1992225-2-jsnow@redhat.com
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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docs/sphinx/qapidoc.py | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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diff --git a/docs/sphinx/qapidoc.py b/docs/sphinx/qapidoc.py
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index XXXXXXX..XXXXXXX 100644
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--- a/docs/sphinx/qapidoc.py
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+++ b/docs/sphinx/qapidoc.py
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@@ -XXX,XX +XXX,XX @@ def _nodes_for_if_section(self, ifcond):
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nodelist = []
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if ifcond:
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snode = self._make_section('If')
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- snode += self._nodes_for_ifcond(ifcond, with_if=False)
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+ snode += nodes.paragraph(
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+ '', '', *self._nodes_for_ifcond(ifcond, with_if=False)
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+ )
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nodelist.append(snode)
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return nodelist
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--
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2.20.1
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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