[PULL 0/6] target-arm queue
[PULL v2 00/29] target-arm queue
1
A few patches for the rc today...
1
v2: drop pvpanic-pci patches.
2
2
3
The following changes since commit 109918d24a3bb9ed3d05beb34ea4ac6be443c138:
3
The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
4
4
5
Merge remote-tracking branch 'remotes/nvme/tags/nvme-fixes-for-6.0-pull-request' into staging (2021-04-05 22:15:38 +0100)
5
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
6
6
7
are available in the Git repository at:
7
are available in the Git repository at:
8
8
9
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210406
9
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
10
10
11
for you to fetch changes up to 49bc76550c37f4a2b92a05cb3e6989a739d56ac9:
11
for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
12
12
13
Remove myself as i.mx31 maintainer (2021-04-06 11:49:15 +0100)
13
docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
14
14
15
----------------------------------------------------------------
15
----------------------------------------------------------------
16
target-arm queue:
16
target-arm queue:
17
* ppc/e500 and arm/virt: only add valid dynamic sysbus devices to the
17
* Implement IMPDEF pauth algorithm
18
platform bus
18
* Support ARMv8.4-SEL2
19
* update i.mx31 maintainer list
19
* Fix bug where we were truncating predicate vector lengths in SVE insns
20
* Revert "target/arm: Make number of counters in PMCR follow the CPU"
20
* npcm7xx_adc-test: Fix memleak in adc_qom_set
21
* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
22
* docs: Build and install all the docs in a single manual
21
23
22
----------------------------------------------------------------
24
----------------------------------------------------------------
23
Chubb, Peter (Data61, Eveleigh) (1):
25
Gan Qixin (1):
24
Remove myself as i.mx31 maintainer
26
npcm7xx_adc-test: Fix memleak in adc_qom_set
25
27
26
Peter Maydell (5):
28
Peter Maydell (1):
27
include/hw/boards.h: Document machine_class_allow_dynamic_sysbus_dev()
29
docs: Build and install all the docs in a single manual
28
machine: Provide a function to check the dynamic sysbus allowlist
29
hw/arm/virt: Only try to add valid dynamic sysbus devices to platform bus
30
hw/ppc/e500plat: Only try to add valid dynamic sysbus devices to platform bus
31
Revert "target/arm: Make number of counters in PMCR follow the CPU"
32
30
33
include/hw/boards.h | 39 +++++++++++++++++++++++++++++++++++++++
31
Philippe Mathieu-Daudé (1):
34
target/arm/cpu.h | 1 -
32
target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
35
hw/arm/virt.c | 8 ++++++--
36
hw/core/machine.c | 21 ++++++++++++++++-----
37
hw/ppc/e500plat.c | 8 ++++++--
38
target/arm/cpu64.c | 3 ---
39
target/arm/cpu_tcg.c | 5 -----
40
target/arm/helper.c | 29 ++++++++++++-----------------
41
target/arm/kvm64.c | 2 --
42
MAINTAINERS | 1 -
43
10 files changed, 79 insertions(+), 38 deletions(-)
44
33
34
Richard Henderson (7):
35
target/arm: Implement an IMPDEF pauth algorithm
36
target/arm: Add cpu properties to control pauth
37
target/arm: Use object_property_add_bool for "sve" property
38
target/arm: Introduce PREDDESC field definitions
39
target/arm: Update PFIRST, PNEXT for pred_desc
40
target/arm: Update ZIP, UZP, TRN for pred_desc
41
target/arm: Update REV, PUNPK for pred_desc
42
43
Rémi Denis-Courmont (19):
44
target/arm: remove redundant tests
45
target/arm: add arm_is_el2_enabled() helper
46
target/arm: use arm_is_el2_enabled() where applicable
47
target/arm: use arm_hcr_el2_eff() where applicable
48
target/arm: factor MDCR_EL2 common handling
49
target/arm: Define isar_feature function to test for presence of SEL2
50
target/arm: add 64-bit S-EL2 to EL exception table
51
target/arm: add MMU stage 1 for Secure EL2
52
target/arm: add ARMv8.4-SEL2 system registers
53
target/arm: handle VMID change in secure state
54
target/arm: do S1_ptw_translate() before address space lookup
55
target/arm: translate NS bit in page-walks
56
target/arm: generalize 2-stage page-walk condition
57
target/arm: secure stage 2 translation regime
58
target/arm: set HPFAR_EL2.NS on secure stage 2 faults
59
target/arm: revector to run-time pick target EL
60
target/arm: Implement SCR_EL2.EEL2
61
target/arm: enable Secure EL2 in max CPU
62
target/arm: refactor vae1_tlbmask()
63
64
docs/conf.py | 46 ++++-
65
docs/devel/conf.py | 15 --
66
docs/index.html.in | 17 --
67
docs/interop/conf.py | 28 ---
68
docs/meson.build | 64 +++---
69
docs/specs/conf.py | 16 --
70
docs/system/arm/cpu-features.rst | 21 ++
71
docs/system/conf.py | 28 ---
72
docs/tools/conf.py | 37 ----
73
docs/user/conf.py | 15 --
74
include/qemu/xxhash.h | 98 +++++++++
75
target/arm/cpu-param.h | 2 +-
76
target/arm/cpu.h | 107 ++++++++--
77
target/arm/internals.h | 45 +++++
78
target/arm/cpu.c | 23 ++-
79
target/arm/cpu64.c | 65 ++++--
80
target/arm/helper-a64.c | 8 +-
81
target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
82
target/arm/m_helper.c | 2 +-
83
target/arm/monitor.c | 1 +
84
target/arm/op_helper.c | 4 +-
85
target/arm/pauth_helper.c | 27 ++-
86
target/arm/sve_helper.c | 33 ++--
87
target/arm/tlb_helper.c | 3 +
88
target/arm/translate-a64.c | 4 +
89
target/arm/translate-sve.c | 31 ++-
90
target/arm/translate.c | 36 +++-
91
tests/qtest/arm-cpu-features.c | 13 ++
92
tests/qtest/npcm7xx_adc-test.c | 1 +
93
.gitlab-ci.yml | 4 +-
94
30 files changed, 770 insertions(+), 438 deletions(-)
95
delete mode 100644 docs/devel/conf.py
96
delete mode 100644 docs/index.html.in
97
delete mode 100644 docs/interop/conf.py
98
delete mode 100644 docs/specs/conf.py
99
delete mode 100644 docs/system/conf.py
100
delete mode 100644 docs/tools/conf.py
101
delete mode 100644 docs/user/conf.py
102
diff view generated by jsdifflib
[PULL 1/6] include/hw/boards.h: Document machine_class_allow_dynamic_sysbus_dev()
Deleted patch
1
The function machine_class_allow_dynamic_sysbus_dev() is currently
2
undocumented; add a doc comment.
3
1
4
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
6
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
7
Reviewed-by: Eric Auger <eric.auger@redhat.com>
8
Message-id: 20210325153310.9131-2-peter.maydell@linaro.org
9
---
10
include/hw/boards.h | 15 +++++++++++++++
11
1 file changed, 15 insertions(+)
12
13
diff --git a/include/hw/boards.h b/include/hw/boards.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/boards.h
16
+++ b/include/hw/boards.h
17
@@ -XXX,XX +XXX,XX @@ void machine_set_cpu_numa_node(MachineState *machine,
18
const CpuInstanceProperties *props,
19
Error **errp);
20
21
+/**
22
+ * machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devices
23
+ * @mc: Machine class
24
+ * @type: type to allow (should be a subtype of TYPE_SYS_BUS_DEVICE)
25
+ *
26
+ * Add the QOM type @type to the list of devices of which are subtypes
27
+ * of TYPE_SYS_BUS_DEVICE but which are still permitted to be dynamically
28
+ * created (eg by the user on the command line with -device).
29
+ * By default if the user tries to create any devices on the command line
30
+ * that are subtypes of TYPE_SYS_BUS_DEVICE they will get an error message;
31
+ * for the special cases which are permitted for this machine model, the
32
+ * machine model class init code must call this function to add them
33
+ * to the list of specifically permitted devices.
34
+ */
35
void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
36
+
37
/*
38
* Checks that backend isn't used, preps it for exclusive usage and
39
* returns migratable MemoryRegion provided by backend.
40
--
41
2.20.1
42
43
diff view generated by jsdifflib
[PULL 2/6] machine: Provide a function to check the dynamic sysbus allowlist
Deleted patch
1
Provide a new function dynamic_sysbus_dev_allowed() which checks the
2
per-machine list of permitted dynamic sysbus devices and returns a
3
boolean result indicating whether the device is allowed. We can use
4
this in the implementation of validate_sysbus_device(), but we will
5
also need it so that machine hotplug callbacks can validate devices
6
rather than assuming that any sysbus device might be hotpluggable
7
into the platform bus.
8
1
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
11
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
12
Reviewed-by: Eric Auger <eric.auger@redhat.com>
13
Message-id: 20210325153310.9131-3-peter.maydell@linaro.org
14
---
15
include/hw/boards.h | 24 ++++++++++++++++++++++++
16
hw/core/machine.c | 21 ++++++++++++++++-----
17
2 files changed, 40 insertions(+), 5 deletions(-)
18
19
diff --git a/include/hw/boards.h b/include/hw/boards.h
20
index XXXXXXX..XXXXXXX 100644
21
--- a/include/hw/boards.h
22
+++ b/include/hw/boards.h
23
@@ -XXX,XX +XXX,XX @@ void machine_set_cpu_numa_node(MachineState *machine,
24
*/
25
void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
26
27
+/**
28
+ * device_is_dynamic_sysbus: test whether device is a dynamic sysbus device
29
+ * @mc: Machine class
30
+ * @dev: device to check
31
+ *
32
+ * Returns: true if @dev is a sysbus device on the machine's list
33
+ * of dynamically pluggable sysbus devices; otherwise false.
34
+ *
35
+ * This function checks whether @dev is a valid dynamic sysbus device,
36
+ * by first confirming that it is a sysbus device and then checking it
37
+ * against the list of permitted dynamic sysbus devices which has been
38
+ * set up by the machine using machine_class_allow_dynamic_sysbus_dev().
39
+ *
40
+ * It is valid to call this with something that is not a subclass of
41
+ * TYPE_SYS_BUS_DEVICE; the function will return false in this case.
42
+ * This allows hotplug callback functions to be written as:
43
+ * if (device_is_dynamic_sysbus(mc, dev)) {
44
+ * handle dynamic sysbus case;
45
+ * } else if (some other kind of hotplug) {
46
+ * handle that;
47
+ * }
48
+ */
49
+bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev);
50
+
51
/*
52
* Checks that backend isn't used, preps it for exclusive usage and
53
* returns migratable MemoryRegion provided by backend.
54
diff --git a/hw/core/machine.c b/hw/core/machine.c
55
index XXXXXXX..XXXXXXX 100644
56
--- a/hw/core/machine.c
57
+++ b/hw/core/machine.c
58
@@ -XXX,XX +XXX,XX @@ void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
59
QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
60
}
61
62
-static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
63
+bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
64
{
65
- MachineState *machine = opaque;
66
- MachineClass *mc = MACHINE_GET_CLASS(machine);
67
bool allowed = false;
68
strList *wl;
69
+ Object *obj = OBJECT(dev);
70
+
71
+ if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
72
+ return false;
73
+ }
74
75
for (wl = mc->allowed_dynamic_sysbus_devices;
76
!allowed && wl;
77
wl = wl->next) {
78
- allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
79
+ allowed |= !!object_dynamic_cast(obj, wl->value);
80
}
81
82
- if (!allowed) {
83
+ return allowed;
84
+}
85
+
86
+static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
87
+{
88
+ MachineState *machine = opaque;
89
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
90
+
91
+ if (!device_is_dynamic_sysbus(mc, DEVICE(sbdev))) {
92
error_report("Option '-device %s' cannot be handled by this machine",
93
object_class_get_name(object_get_class(OBJECT(sbdev))));
94
exit(1);
95
--
96
2.20.1
97
98
diff view generated by jsdifflib
[PULL 3/6] hw/arm/virt: Only try to add valid dynamic sysbus devices to platform bus
Deleted patch
1
The virt machine device plug callback currently calls
2
platform_bus_link_device() for any sysbus device. This is overly
3
broad, because platform_bus_link_device() will unconditionally grab
4
the IRQs and MMIOs of the device it is passed, whether it was
5
intended for the platform bus or not. Restrict hotpluggability of
6
sysbus devices to only those devices on the dynamic sysbus
7
allowlist.
8
1
9
We were mostly getting away with this because the board creates the
10
platform bus as the last device it creates, and so the hotplug
11
callback did not do anything for all the sysbus devices created by
12
the board itself. However if the user plugged in a device which
13
itself uses a sysbus device internally we would have mishandled this
14
and probably asserted.
15
16
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
17
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
18
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
19
Reviewed-by: Eric Auger <eric.auger@redhat.com>
20
Message-id: 20210325153310.9131-4-peter.maydell@linaro.org
21
---
22
hw/arm/virt.c | 8 ++++++--
23
1 file changed, 6 insertions(+), 2 deletions(-)
24
25
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/virt.c
28
+++ b/hw/arm/virt.c
29
@@ -XXX,XX +XXX,XX @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
30
VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
31
32
if (vms->platform_bus_dev) {
33
- if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
34
+ MachineClass *mc = MACHINE_GET_CLASS(vms);
35
+
36
+ if (device_is_dynamic_sysbus(mc, dev)) {
37
platform_bus_link_device(PLATFORM_BUS_DEVICE(vms->platform_bus_dev),
38
SYS_BUS_DEVICE(dev));
39
}
40
@@ -XXX,XX +XXX,XX @@ static void virt_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
41
static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
42
DeviceState *dev)
43
{
44
- if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE) ||
45
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
46
+
47
+ if (device_is_dynamic_sysbus(mc, dev) ||
48
(object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM))) {
49
return HOTPLUG_HANDLER(machine);
50
}
51
--
52
2.20.1
53
54
diff view generated by jsdifflib
[PULL 4/6] hw/ppc/e500plat: Only try to add valid dynamic sysbus devices to platform bus
Deleted patch
1
The e500plat machine device plug callback currently calls
2
platform_bus_link_device() for any sysbus device. This is overly
3
broad, because platform_bus_link_device() will unconditionally grab
4
the IRQs and MMIOs of the device it is passed, whether it was
5
intended for the platform bus or not. Restrict hotpluggability of
6
sysbus devices to only those devices on the dynamic sysbus allowlist.
7
1
8
We were mostly getting away with this because the board creates the
9
platform bus as the last device it creates, and so the hotplug
10
callback did not do anything for all the sysbus devices created by
11
the board itself. However if the user plugged in a device which
12
itself uses a sysbus device internally we would have mishandled this
13
and probably asserted. An example of this is:
14
qemu-system-ppc64 -M ppce500 -device macio-oldworld
15
16
This isn't a sensible command because the macio-oldworld device
17
is really specific to the 'g3beige' machine, but we now fail
18
with a reasonable error message rather than asserting:
19
qemu-system-ppc64: Device heathrow is not supported by this machine yet.
20
21
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
22
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
23
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
24
Reviewed-by: Eric Auger <eric.auger@redhat.com>
25
Acked-by: David Gibson <david@gibson.dropbear.id.au>
26
Message-id: 20210325153310.9131-5-peter.maydell@linaro.org
27
---
28
hw/ppc/e500plat.c | 8 ++++++--
29
1 file changed, 6 insertions(+), 2 deletions(-)
30
31
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/hw/ppc/e500plat.c
34
+++ b/hw/ppc/e500plat.c
35
@@ -XXX,XX +XXX,XX @@ static void e500plat_machine_device_plug_cb(HotplugHandler *hotplug_dev,
36
PPCE500MachineState *pms = PPCE500_MACHINE(hotplug_dev);
37
38
if (pms->pbus_dev) {
39
- if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
40
+ MachineClass *mc = MACHINE_GET_CLASS(pms);
41
+
42
+ if (device_is_dynamic_sysbus(mc, dev)) {
43
platform_bus_link_device(pms->pbus_dev, SYS_BUS_DEVICE(dev));
44
}
45
}
46
@@ -XXX,XX +XXX,XX @@ static
47
HotplugHandler *e500plat_machine_get_hotpug_handler(MachineState *machine,
48
DeviceState *dev)
49
{
50
- if (object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)) {
51
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
52
+
53
+ if (device_is_dynamic_sysbus(mc, dev)) {
54
return HOTPLUG_HANDLER(machine);
55
}
56
57
--
58
2.20.1
59
60
diff view generated by jsdifflib
[PULL 5/6] Revert "target/arm: Make number of counters in PMCR follow the CPU"
Deleted patch
1
This reverts commit f7fb73b8cdd3f77e26f9fcff8cf24ff1b58d200f.
2
1
3
This change turned out to be a bit half-baked, and doesn't
4
work with KVM, which fails with the error:
5
"qemu-system-aarch64: Failed to retrieve host CPU features"
6
7
because KVM does not allow accessing of the PMCR_EL0 value in
8
the scratch "query CPU ID registers" VM unless we have first
9
set the KVM_ARM_VCPU_PMU_V3 feature on the VM.
10
11
Revert the change for 6.0.
12
13
Reported-by: Zenghui Yu <yuzenghui@huawei.com>
14
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
15
Tested-by: Zenghui Yu <yuzenghui@huawei.com>
16
Message-id: 20210331154822.23332-1-peter.maydell@linaro.org
17
---
18
target/arm/cpu.h | 1 -
19
target/arm/cpu64.c | 3 ---
20
target/arm/cpu_tcg.c | 5 -----
21
target/arm/helper.c | 29 ++++++++++++-----------------
22
target/arm/kvm64.c | 2 --
23
5 files changed, 12 insertions(+), 28 deletions(-)
24
25
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
26
index XXXXXXX..XXXXXXX 100644
27
--- a/target/arm/cpu.h
28
+++ b/target/arm/cpu.h
29
@@ -XXX,XX +XXX,XX @@ struct ARMCPU {
30
uint64_t id_aa64mmfr2;
31
uint64_t id_aa64dfr0;
32
uint64_t id_aa64dfr1;
33
- uint64_t reset_pmcr_el0;
34
} isar;
35
uint64_t midr;
36
uint32_t revidr;
37
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
38
index XXXXXXX..XXXXXXX 100644
39
--- a/target/arm/cpu64.c
40
+++ b/target/arm/cpu64.c
41
@@ -XXX,XX +XXX,XX @@ static void aarch64_a57_initfn(Object *obj)
42
cpu->gic_num_lrs = 4;
43
cpu->gic_vpribits = 5;
44
cpu->gic_vprebits = 5;
45
- cpu->isar.reset_pmcr_el0 = 0x41013000;
46
define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo);
47
}
48
49
@@ -XXX,XX +XXX,XX @@ static void aarch64_a53_initfn(Object *obj)
50
cpu->gic_num_lrs = 4;
51
cpu->gic_vpribits = 5;
52
cpu->gic_vprebits = 5;
53
- cpu->isar.reset_pmcr_el0 = 0x41033000;
54
define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo);
55
}
56
57
@@ -XXX,XX +XXX,XX @@ static void aarch64_a72_initfn(Object *obj)
58
cpu->gic_num_lrs = 4;
59
cpu->gic_vpribits = 5;
60
cpu->gic_vprebits = 5;
61
- cpu->isar.reset_pmcr_el0 = 0x41023000;
62
define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo);
63
}
64
65
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
66
index XXXXXXX..XXXXXXX 100644
67
--- a/target/arm/cpu_tcg.c
68
+++ b/target/arm/cpu_tcg.c
69
@@ -XXX,XX +XXX,XX @@ static void cortex_a8_initfn(Object *obj)
70
cpu->ccsidr[1] = 0x2007e01a; /* 16k L1 icache. */
71
cpu->ccsidr[2] = 0xf0000000; /* No L2 icache. */
72
cpu->reset_auxcr = 2;
73
- cpu->isar.reset_pmcr_el0 = 0x41002000;
74
define_arm_cp_regs(cpu, cortexa8_cp_reginfo);
75
}
76
77
@@ -XXX,XX +XXX,XX @@ static void cortex_a9_initfn(Object *obj)
78
cpu->clidr = (1 << 27) | (1 << 24) | 3;
79
cpu->ccsidr[0] = 0xe00fe019; /* 16k L1 dcache. */
80
cpu->ccsidr[1] = 0x200fe019; /* 16k L1 icache. */
81
- cpu->isar.reset_pmcr_el0 = 0x41093000;
82
define_arm_cp_regs(cpu, cortexa9_cp_reginfo);
83
}
84
85
@@ -XXX,XX +XXX,XX @@ static void cortex_a7_initfn(Object *obj)
86
cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */
87
cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */
88
cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */
89
- cpu->isar.reset_pmcr_el0 = 0x41072000;
90
define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */
91
}
92
93
@@ -XXX,XX +XXX,XX @@ static void cortex_a15_initfn(Object *obj)
94
cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */
95
cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */
96
cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */
97
- cpu->isar.reset_pmcr_el0 = 0x410F3000;
98
define_arm_cp_regs(cpu, cortexa15_cp_reginfo);
99
}
100
101
@@ -XXX,XX +XXX,XX @@ static void cortex_r5_initfn(Object *obj)
102
cpu->isar.id_isar6 = 0x0;
103
cpu->mp_is_up = true;
104
cpu->pmsav7_dregion = 16;
105
- cpu->isar.reset_pmcr_el0 = 0x41151800;
106
define_arm_cp_regs(cpu, cortexr5_cp_reginfo);
107
}
108
109
diff --git a/target/arm/helper.c b/target/arm/helper.c
110
index XXXXXXX..XXXXXXX 100644
111
--- a/target/arm/helper.c
112
+++ b/target/arm/helper.c
113
@@ -XXX,XX +XXX,XX @@
114
#endif
115
116
#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
117
+#define PMCR_NUM_COUNTERS 4 /* QEMU IMPDEF choice */
118
119
#ifndef CONFIG_USER_ONLY
120
121
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v6_cp_reginfo[] = {
122
123
static inline uint32_t pmu_num_counters(CPUARMState *env)
124
{
125
- ARMCPU *cpu = env_archcpu(env);
126
-
127
- return (cpu->isar.reset_pmcr_el0 & PMCRN_MASK) >> PMCRN_SHIFT;
128
+ return (env->cp15.c9_pmcr & PMCRN_MASK) >> PMCRN_SHIFT;
129
}
130
131
/* Bits allowed to be set/cleared for PMCNTEN* and PMINTEN* */
132
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
133
.resetvalue = 0,
134
.writefn = gt_hyp_ctl_write, .raw_writefn = raw_write },
135
#endif
136
+ /* The only field of MDCR_EL2 that has a defined architectural reset value
137
+ * is MDCR_EL2.HPMN which should reset to the value of PMCR_EL0.N.
138
+ */
139
+ { .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH,
140
+ .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1,
141
+ .access = PL2_RW, .resetvalue = PMCR_NUM_COUNTERS,
142
+ .fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2), },
143
{ .name = "HPFAR", .state = ARM_CP_STATE_AA32,
144
.cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
145
.access = PL2_RW, .accessfn = access_el3_aa32ns,
146
@@ -XXX,XX +XXX,XX @@ static void define_pmu_regs(ARMCPU *cpu)
147
* field as main ID register, and we implement four counters in
148
* addition to the cycle count register.
149
*/
150
- unsigned int i, pmcrn = pmu_num_counters(&cpu->env);
151
+ unsigned int i, pmcrn = PMCR_NUM_COUNTERS;
152
ARMCPRegInfo pmcr = {
153
.name = "PMCR", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 0,
154
.access = PL0_RW,
155
@@ -XXX,XX +XXX,XX @@ static void define_pmu_regs(ARMCPU *cpu)
156
.access = PL0_RW, .accessfn = pmreg_access,
157
.type = ARM_CP_IO,
158
.fieldoffset = offsetof(CPUARMState, cp15.c9_pmcr),
159
- .resetvalue = cpu->isar.reset_pmcr_el0,
160
+ .resetvalue = (cpu->midr & 0xff000000) | (pmcrn << PMCRN_SHIFT) |
161
+ PMCRLC,
162
.writefn = pmcr_write, .raw_writefn = raw_write,
163
};
164
-
165
define_one_arm_cp_reg(cpu, &pmcr);
166
define_one_arm_cp_reg(cpu, &pmcr64);
167
for (i = 0; i < pmcrn; i++) {
168
@@ -XXX,XX +XXX,XX @@ void register_cp_regs_for_features(ARMCPU *cpu)
169
.fieldoffset = offsetof(CPUARMState, cp15.vmpidr_el2) },
170
REGINFO_SENTINEL
171
};
172
- /*
173
- * The only field of MDCR_EL2 that has a defined architectural reset
174
- * value is MDCR_EL2.HPMN which should reset to the value of PMCR_EL0.N.
175
- */
176
- ARMCPRegInfo mdcr_el2 = {
177
- .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH,
178
- .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1,
179
- .access = PL2_RW, .resetvalue = pmu_num_counters(env),
180
- .fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2),
181
- };
182
- define_one_arm_cp_reg(cpu, &mdcr_el2);
183
define_arm_cp_regs(cpu, vpidr_regs);
184
define_arm_cp_regs(cpu, el2_cp_reginfo);
185
if (arm_feature(env, ARM_FEATURE_V8)) {
186
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
187
index XXXXXXX..XXXXXXX 100644
188
--- a/target/arm/kvm64.c
189
+++ b/target/arm/kvm64.c
190
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
191
ARM64_SYS_REG(3, 0, 0, 7, 1));
192
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2,
193
ARM64_SYS_REG(3, 0, 0, 7, 2));
194
- err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
195
- ARM64_SYS_REG(3, 3, 9, 12, 0));
196
197
/*
198
* Note that if AArch32 support is not present in the host,
199
--
200
2.20.1
201
202
diff view generated by jsdifflib
[PULL 6/6] Remove myself as i.mx31 maintainer
Deleted patch
1
From: "Chubb, Peter (Data61, Eveleigh)" <Peter.Chubb@data61.csiro.au>
2
1
3
Remove Peter Chubb as i/MX31 maintainer.
4
5
I'm leaving my current job and will no longer have access to the
6
hardware to test or maintain this port.
7
8
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
12
MAINTAINERS | 1 -
13
1 file changed, 1 deletion(-)
14
15
diff --git a/MAINTAINERS b/MAINTAINERS
16
index XXXXXXX..XXXXXXX 100644
17
--- a/MAINTAINERS
18
+++ b/MAINTAINERS
19
@@ -XXX,XX +XXX,XX @@ F: include/hw/misc/imx25_ccm.h
20
F: include/hw/watchdog/wdt_imx2.h
21
22
i.MX31 (kzm)
23
-M: Peter Chubb <peter.chubb@nicta.com.au>
24
M: Peter Maydell <peter.maydell@linaro.org>
25
L: qemu-arm@nongnu.org
26
S: Odd Fixes
27
--
28
2.20.1
29
30
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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