| 1 | v1->v2: fix format-string errors on 32-bit hosts in xilinx csu dma model. | 1 | Squashed in a trivial fix for 32-bit hosts: |
|---|---|---|---|
| 2 | |||
| 3 | --- a/target/arm/mve_helper.c | ||
| 4 | +++ b/target/arm/mve_helper.c | ||
| 5 | @@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=) | ||
| 6 | acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \ | ||
| 7 | m[H##ESIZE(e)])); \ | ||
| 8 | } \ | ||
| 9 | - acc = int128_add(acc, 1 << 7); \ | ||
| 10 | + acc = int128_add(acc, int128_make64(1 << 7)); \ | ||
| 11 | } \ | ||
| 12 | } \ | ||
| 13 | mve_advance_vpt(env); \ | ||
| 2 | 14 | ||
| 3 | -- PMM | 15 | -- PMM |
| 4 | 16 | ||
| 5 | The following changes since commit 0436c55edf6b357ff56e2a5bf688df8636f83456: | 17 | The following changes since commit 53f306f316549d20c76886903181413d20842423: |
| 6 | 18 | ||
| 7 | Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging (2021-03-08 13:51:41 +0000) | 19 | Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100) |
| 8 | 20 | ||
| 9 | are available in the Git repository at: | 21 | are available in the Git repository at: |
| 10 | 22 | ||
| 11 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210310 | 23 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624 |
| 12 | 24 | ||
| 13 | for you to fetch changes up to 81b3ddaf8772ec6f88d372e52f9b433cfa46bc46: | 25 | for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee: |
| 14 | 26 | ||
| 15 | hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() (2021-03-10 13:54:51 +0000) | 27 | docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100) |
| 16 | 28 | ||
| 17 | ---------------------------------------------------------------- | 29 | ---------------------------------------------------------------- |
| 18 | target-arm queue: | 30 | target-arm queue: |
| 19 | * Add new mps3-an547 board | 31 | * Don't require 'virt' board to be compiled in for ACPI GHES code |
| 20 | * target/arm: Restrict v7A TCG cpus to TCG accel | 32 | * docs: Document which architecture extensions we emulate |
| 21 | * Implement a Xilinx CSU DMA model | 33 | * Fix bugs in M-profile FPCXT_NS accesses |
| 22 | * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() | 34 | * First slice of MVE patches |
| 35 | * Implement MTE3 | ||
| 36 | * docs/system: arm: Add nRF boards description | ||
| 23 | 37 | ||
| 24 | ---------------------------------------------------------------- | 38 | ---------------------------------------------------------------- |
| 25 | Peter Maydell (48): | 39 | Alexandre Iooss (1): |
| 26 | clock: Add ClockEvent parameter to callbacks | 40 | docs/system: arm: Add nRF boards description |
| 27 | clock: Add ClockPreUpdate callback event type | ||
| 28 | clock: Add clock_ns_to_ticks() function | ||
| 29 | hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() | ||
| 30 | hw/arm/armsse: Introduce SSE subsystem version property | ||
| 31 | hw/misc/iotkit-sysctl: Remove is_sse200 flag | ||
| 32 | hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values | ||
| 33 | hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values | ||
| 34 | hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 | ||
| 35 | hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR | ||
| 36 | hw/timer/sse-counter: Model the SSE Subsystem System Counter | ||
| 37 | hw/timer/sse-timer: Model the SSE Subsystem System Timer | ||
| 38 | hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour | ||
| 39 | hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 | ||
| 40 | hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300 | ||
| 41 | hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register | ||
| 42 | hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers | ||
| 43 | hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values | ||
| 44 | hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc | ||
| 45 | hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block | ||
| 46 | hw/arm/armsse: Use an array for apb_ppc fields in the state structure | ||
| 47 | hw/arm/armsse: Add a define for number of IRQs used by the SSE itself | ||
| 48 | hw/arm/armsse: Add framework for data-driven device placement | ||
| 49 | hw/arm/armsse: Move dual-timer device into data-driven framework | ||
| 50 | hw/arm/armsse: Move watchdogs into data-driven framework | ||
| 51 | hw/arm/armsse: Move s32ktimer into data-driven framework | ||
| 52 | hw/arm/armsse: Move sysinfo register block into data-driven framework | ||
| 53 | hw/arm/armsse: Move sysctl register block into data-driven framework | ||
| 54 | hw/arm/armsse: Move PPUs into data-driven framework | ||
| 55 | hw/arm/armsse: Add missing SSE-200 SYS_PPU | ||
| 56 | hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo | ||
| 57 | hw/arm/armsse: Add support for SSE variants with a system counter | ||
| 58 | hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo | ||
| 59 | hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block | ||
| 60 | hw/arm/armsse: Add SSE-300 support | ||
| 61 | hw/arm/mps2-tz: Make UART overflow IRQ board-specific | ||
| 62 | hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate | ||
| 63 | hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register | ||
| 64 | hw/misc/mps2-scc: Implement changes for AN547 | ||
| 65 | hw/arm/mps2-tz: Support running APB peripherals on different clock | ||
| 66 | hw/arm/mps2-tz: Make initsvtor0 setting board-specific | ||
| 67 | hw/arm/mps2-tz: Add new mps3-an547 board | ||
| 68 | docs/system/arm/mps2.rst: Document the new mps3-an547 board | ||
| 69 | tests/qtest/sse-timer-test: Add simple test of the SSE counter | ||
| 70 | tests/qtest/sse-timer-test: Test the system timer | ||
| 71 | tests/qtest/sse-timer-test: Test counter scaling changes | ||
| 72 | hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ | ||
| 73 | hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() | ||
| 74 | 41 | ||
| 75 | Philippe Mathieu-Daudé (1): | 42 | Peter Collingbourne (1): |
| 76 | target/arm: Restrict v7A TCG cpus to TCG accel | 43 | target/arm: Implement MTE3 |
| 77 | 44 | ||
| 78 | Xuzhou Cheng (5): | 45 | Peter Maydell (55): |
| 79 | hw/dma: Implement a Xilinx CSU DMA model | 46 | hw/acpi: Provide stub version of acpi_ghes_record_errors() |
| 80 | hw/arm: xlnx-zynqmp: Clean up coding convention issues | 47 | hw/acpi: Provide function acpi_ghes_present() |
| 81 | hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI | 48 | target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors |
| 82 | hw/ssi: xilinx_spips: Clean up coding convention issues | 49 | docs/system/arm: Document which architecture extensions we emulate |
| 83 | hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips | 50 | target/arm/translate-vfp.c: Whitespace fixes |
| 51 | target/arm: Handle FPU being disabled in FPCXT_NS accesses | ||
| 52 | target/arm: Don't NOCP fault for FPCXT_NS accesses | ||
| 53 | target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access | ||
| 54 | target/arm: Factor FP context update code out into helper function | ||
| 55 | target/arm: Split vfp_access_check() into A and M versions | ||
| 56 | target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m() | ||
| 57 | target/arm: Implement MVE VLDR/VSTR (non-widening forms) | ||
| 58 | target/arm: Implement widening/narrowing MVE VLDR/VSTR insns | ||
| 59 | target/arm: Implement MVE VCLZ | ||
| 60 | target/arm: Implement MVE VCLS | ||
| 61 | target/arm: Implement MVE VREV16, VREV32, VREV64 | ||
| 62 | target/arm: Implement MVE VMVN (register) | ||
| 63 | target/arm: Implement MVE VABS | ||
| 64 | target/arm: Implement MVE VNEG | ||
| 65 | tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64 | ||
| 66 | target/arm: Implement MVE VDUP | ||
| 67 | target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR | ||
| 68 | target/arm: Implement MVE VADD, VSUB, VMUL | ||
| 69 | target/arm: Implement MVE VMULH | ||
| 70 | target/arm: Implement MVE VRMULH | ||
| 71 | target/arm: Implement MVE VMAX, VMIN | ||
| 72 | target/arm: Implement MVE VABD | ||
| 73 | target/arm: Implement MVE VHADD, VHSUB | ||
| 74 | target/arm: Implement MVE VMULL | ||
| 75 | target/arm: Implement MVE VMLALDAV | ||
| 76 | target/arm: Implement MVE VMLSLDAV | ||
| 77 | target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH | ||
| 78 | target/arm: Implement MVE VADD (scalar) | ||
| 79 | target/arm: Implement MVE VSUB, VMUL (scalar) | ||
| 80 | target/arm: Implement MVE VHADD, VHSUB (scalar) | ||
| 81 | target/arm: Implement MVE VBRSR | ||
| 82 | target/arm: Implement MVE VPST | ||
| 83 | target/arm: Implement MVE VQADD and VQSUB | ||
| 84 | target/arm: Implement MVE VQDMULH and VQRDMULH (scalar) | ||
| 85 | target/arm: Implement MVE VQDMULL scalar | ||
| 86 | target/arm: Implement MVE VQDMULH, VQRDMULH (vector) | ||
| 87 | target/arm: Implement MVE VQADD, VQSUB (vector) | ||
| 88 | target/arm: Implement MVE VQSHL (vector) | ||
| 89 | target/arm: Implement MVE VQRSHL | ||
| 90 | target/arm: Implement MVE VSHL insn | ||
| 91 | target/arm: Implement MVE VRSHL | ||
| 92 | target/arm: Implement MVE VQDMLADH and VQRDMLADH | ||
| 93 | target/arm: Implement MVE VQDMLSDH and VQRDMLSDH | ||
| 94 | target/arm: Implement MVE VQDMULL (vector) | ||
| 95 | target/arm: Implement MVE VRHADD | ||
| 96 | target/arm: Implement MVE VADC, VSBC | ||
| 97 | target/arm: Implement MVE VCADD | ||
| 98 | target/arm: Implement MVE VHCADD | ||
| 99 | target/arm: Implement MVE VADDV | ||
| 100 | target/arm: Make VMOV scalar <-> gpreg beatwise for MVE | ||
| 84 | 101 | ||
| 85 | docs/devel/clocks.rst | 71 ++- | 102 | docs/system/arm/emulation.rst | 103 ++++ |
| 86 | docs/system/arm/mps2.rst | 6 +- | 103 | docs/system/arm/nrf.rst | 51 ++ |
| 87 | include/hw/arm/armsse-version.h | 42 ++ | 104 | docs/system/target-arm.rst | 7 + |
| 88 | include/hw/arm/armsse.h | 40 +- | 105 | include/hw/acpi/ghes.h | 9 + |
| 89 | include/hw/arm/xlnx-zynqmp.h | 5 +- | 106 | include/tcg/tcg-op.h | 8 + |
| 90 | include/hw/clock.h | 63 ++- | 107 | include/tcg/tcg.h | 1 - |
| 91 | include/hw/dma/xlnx_csu_dma.h | 52 ++ | 108 | target/arm/helper-mve.h | 357 +++++++++++++ |
| 92 | include/hw/misc/armsse-cpu-pwrctrl.h | 40 ++ | 109 | target/arm/helper.h | 2 + |
| 93 | include/hw/misc/iotkit-secctl.h | 2 + | 110 | target/arm/internals.h | 11 + |
| 94 | include/hw/misc/iotkit-sysctl.h | 13 +- | 111 | target/arm/translate-a32.h | 3 + |
| 95 | include/hw/misc/iotkit-sysinfo.h | 2 + | 112 | target/arm/translate.h | 10 + |
| 96 | include/hw/misc/mps2-fpgaio.h | 2 + | 113 | target/arm/m-nocp.decode | 24 + |
| 97 | include/hw/qdev-clock.h | 17 +- | 114 | target/arm/mve.decode | 240 +++++++++ |
| 98 | include/hw/ssi/xilinx_spips.h | 2 +- | 115 | target/arm/vfp.decode | 14 - |
| 99 | include/hw/timer/sse-counter.h | 105 ++++ | 116 | hw/acpi/ghes-stub.c | 22 + |
| 100 | include/hw/timer/sse-timer.h | 53 ++ | 117 | hw/acpi/ghes.c | 17 + |
| 101 | hw/adc/npcm7xx_adc.c | 2 +- | 118 | target/arm/cpu64.c | 2 +- |
| 102 | hw/arm/armsse.c | 1008 +++++++++++++++++++++++++--------- | 119 | target/arm/kvm64.c | 6 +- |
| 103 | hw/arm/mps2-tz.c | 168 +++++- | 120 | target/arm/mte_helper.c | 82 +-- |
| 104 | hw/arm/xlnx-zynqmp.c | 21 +- | 121 | target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++ |
| 105 | hw/char/cadence_uart.c | 4 +- | 122 | target/arm/translate-m-nocp.c | 550 +++++++++++++++++++ |
| 106 | hw/char/ibex_uart.c | 4 +- | 123 | target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++ |
| 107 | hw/char/pl011.c | 5 +- | 124 | target/arm/translate-vfp.c | 741 +++++++------------------- |
| 108 | hw/core/clock.c | 24 +- | 125 | tcg/tcg-op-gvec.c | 20 +- |
| 109 | hw/core/qdev-clock.c | 8 +- | 126 | MAINTAINERS | 1 + |
| 110 | hw/dma/xlnx_csu_dma.c | 745 +++++++++++++++++++++++++ | 127 | hw/acpi/meson.build | 6 +- |
| 111 | hw/mips/cps.c | 2 +- | 128 | target/arm/meson.build | 1 + |
| 112 | hw/misc/armsse-cpu-pwrctrl.c | 149 +++++ | 129 | 27 files changed, 3578 insertions(+), 629 deletions(-) |
| 113 | hw/misc/bcm2835_cprman.c | 23 +- | 130 | create mode 100644 docs/system/arm/emulation.rst |
| 114 | hw/misc/iotkit-secctl.c | 50 +- | 131 | create mode 100644 docs/system/arm/nrf.rst |
| 115 | hw/misc/iotkit-sysctl.c | 522 +++++++++++++++--- | 132 | create mode 100644 target/arm/helper-mve.h |
| 116 | hw/misc/iotkit-sysinfo.c | 51 +- | 133 | create mode 100644 hw/acpi/ghes-stub.c |
| 117 | hw/misc/mps2-fpgaio.c | 52 +- | 134 | create mode 100644 target/arm/mve_helper.c |
| 118 | hw/misc/mps2-scc.c | 15 +- | ||
| 119 | hw/misc/npcm7xx_clk.c | 26 +- | ||
| 120 | hw/misc/npcm7xx_pwm.c | 2 +- | ||
| 121 | hw/misc/zynq_slcr.c | 5 +- | ||
| 122 | hw/ssi/xilinx_spips.c | 33 +- | ||
| 123 | hw/timer/cmsdk-apb-dualtimer.c | 5 +- | ||
| 124 | hw/timer/cmsdk-apb-timer.c | 4 +- | ||
| 125 | hw/timer/npcm7xx_timer.c | 6 +- | ||
| 126 | hw/timer/renesas_tmr.c | 33 +- | ||
| 127 | hw/timer/sse-counter.c | 474 ++++++++++++++++ | ||
| 128 | hw/timer/sse-timer.c | 470 ++++++++++++++++ | ||
| 129 | hw/watchdog/cmsdk-apb-watchdog.c | 5 +- | ||
| 130 | target/arm/cpu.c | 335 ----------- | ||
| 131 | target/arm/cpu_tcg.c | 318 +++++++++++ | ||
| 132 | target/mips/cpu.c | 2 +- | ||
| 133 | tests/qtest/sse-timer-test.c | 240 ++++++++ | ||
| 134 | MAINTAINERS | 7 + | ||
| 135 | hw/arm/Kconfig | 10 +- | ||
| 136 | hw/dma/Kconfig | 4 + | ||
| 137 | hw/dma/meson.build | 1 + | ||
| 138 | hw/misc/Kconfig | 9 + | ||
| 139 | hw/misc/meson.build | 1 + | ||
| 140 | hw/misc/trace-events | 4 + | ||
| 141 | hw/timer/Kconfig | 6 + | ||
| 142 | hw/timer/meson.build | 2 + | ||
| 143 | hw/timer/trace-events | 12 + | ||
| 144 | tests/qtest/meson.build | 1 + | ||
| 145 | 60 files changed, 4537 insertions(+), 846 deletions(-) | ||
| 146 | create mode 100644 include/hw/arm/armsse-version.h | ||
| 147 | create mode 100644 include/hw/dma/xlnx_csu_dma.h | ||
| 148 | create mode 100644 include/hw/misc/armsse-cpu-pwrctrl.h | ||
| 149 | create mode 100644 include/hw/timer/sse-counter.h | ||
| 150 | create mode 100644 include/hw/timer/sse-timer.h | ||
| 151 | create mode 100644 hw/dma/xlnx_csu_dma.c | ||
| 152 | create mode 100644 hw/misc/armsse-cpu-pwrctrl.c | ||
| 153 | create mode 100644 hw/timer/sse-counter.c | ||
| 154 | create mode 100644 hw/timer/sse-timer.c | ||
| 155 | create mode 100644 tests/qtest/sse-timer-test.c | ||
| 156 | 135 | diff view generated by jsdifflib |