[PULL 00/27] tcg patch queue
[PULL 00/16] tcg patch queue
1
The following changes since commit 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1:
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The following changes since commit 48ab886d3da4f3ab94f79f6c0f8b4535b446bbfd:
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3
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305' into staging (2021-03-05 19:04:47 +0000)
3
Merge tag 'pull-target-arm-20230619' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-06-19 16:32:25 +0200)
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5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210306
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230620
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8
9
for you to fetch changes up to 6cc9d67c6f682cf04eea2d6e64a252b63a7eccdf:
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for you to fetch changes up to d7ee93e24359703debf4137f4cc632563aa4e8d1:
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11
accel/tcg: Precompute curr_cflags into cpu->tcg_cflags (2021-03-06 11:53:57 -0800)
11
cputlb: Restrict SavedIOTLB to system emulation (2023-06-20 10:02:14 +0200)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
TCI build fix and cleanup
14
tcg: Define _CALL_AIX for clang on ppc64
15
Streamline tb_lookup
15
accel/tcg: Build fix for macos catalina
16
Fixes for tcg/aarch64
16
accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
17
accel/tcg: Restrict SavedIOTLB to system emulation
18
accel/tcg: Use generic 'helper-proto-common.h' header
19
plugins: Remove unused 'exec/helper-proto.h' header
20
*: Check for CONFIG_USER_ONLY instead of CONFIG_SOFTMMU
17
21
18
----------------------------------------------------------------
22
----------------------------------------------------------------
19
Alex Bennée (4):
23
Philippe Mathieu-Daudé (13):
20
accel/tcg: rename tb_lookup__cpu_state and hoist state extraction
24
target/i386: Simplify i386_tr_init_disas_context()
21
accel/tcg: move CF_CLUSTER calculation to curr_cflags
25
target/tricore: Remove pointless CONFIG_SOFTMMU guard
22
accel/tcg: drop the use of CF_HASH_MASK and rename params
26
target/m68k: Check for USER_ONLY definition instead of SOFTMMU one
23
include/exec: lightly re-arrange TranslationBlock
27
target/ppc: Check for USER_ONLY definition instead of SOFTMMU one
28
hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one
29
accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one
30
meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
31
meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
32
meson: Replace softmmu_ss -> system_ss
33
plugins: Remove unused 'exec/helper-proto.h' header
34
accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header
35
exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY
36
cputlb: Restrict SavedIOTLB to system emulation
24
37
25
Richard Henderson (23):
38
Richard Henderson (3):
26
tcg/aarch64: Fix constant subtraction in tcg_out_addsub2
39
host/include/x86_64: Use __m128i for "x" constraints
27
tcg/aarch64: Fix I3617_CMLE0
40
accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
28
tcg/aarch64: Fix generation of "scalar" vector operations
41
tcg/ppc: Define _CALL_AIX for clang on ppc64(be)
29
tcg/tci: Use exec/cpu_ldst.h interfaces
30
tcg: Split out tcg_raise_tb_overflow
31
tcg: Manage splitwx in tc_ptr_to_region_tree by hand
32
tcg/tci: Merge identical cases in generation (arithmetic opcodes)
33
tcg/tci: Merge identical cases in generation (exchange opcodes)
34
tcg/tci: Merge identical cases in generation (deposit opcode)
35
tcg/tci: Merge identical cases in generation (conditional opcodes)
36
tcg/tci: Merge identical cases in generation (load/store opcodes)
37
tcg/tci: Remove tci_read_r8
38
tcg/tci: Remove tci_read_r8s
39
tcg/tci: Remove tci_read_r16
40
tcg/tci: Remove tci_read_r16s
41
tcg/tci: Remove tci_read_r32
42
tcg/tci: Remove tci_read_r32s
43
tcg/tci: Reduce use of tci_read_r64
44
tcg/tci: Merge basic arithmetic operations
45
tcg/tci: Merge extension operations
46
tcg/tci: Merge bswap operations
47
tcg/tci: Merge mov, not and neg operations
48
accel/tcg: Precompute curr_cflags into cpu->tcg_cflags
49
42
50
accel/tcg/tcg-accel-ops.h | 1 +
43
docs/devel/build-system.rst | 14 +--
51
include/exec/exec-all.h | 22 +-
44
meson.build | 15 +--
52
include/exec/tb-lookup.h | 26 +-
45
accel/tcg/internal.h | 6 +-
53
include/hw/core/cpu.h | 2 +
46
host/include/x86_64/host/atomic128-ldst.h | 25 ++--
54
accel/tcg/cpu-exec.c | 34 +--
47
host/include/x86_64/host/load-extract-al16-al8.h | 8 +-
55
accel/tcg/tcg-accel-ops-mttcg.c | 3 +-
48
include/exec/cpu-defs.h | 12 +-
56
accel/tcg/tcg-accel-ops-rr.c | 2 +-
49
include/hw/core/cpu.h | 10 +-
57
accel/tcg/tcg-accel-ops.c | 8 +
50
include/hw/core/tcg-cpu-ops.h | 102 ++++++++--------
58
accel/tcg/tcg-runtime.c | 6 +-
51
target/m68k/helper.h | 2 +-
59
accel/tcg/translate-all.c | 18 +-
52
accel/tcg/cpu-exec.c | 6 +-
60
linux-user/main.c | 1 +
53
accel/tcg/cputlb.c | 1 +
61
linux-user/sh4/signal.c | 8 +-
54
plugins/core.c | 1 -
62
linux-user/syscall.c | 18 +-
55
target/i386/tcg/translate.c | 3 -
63
softmmu/physmem.c | 2 +-
56
target/m68k/cpu.c | 14 +--
64
tcg/tcg.c | 29 ++-
57
target/m68k/helper.c | 4 +-
65
tcg/tci.c | 526 ++++++++++++----------------------------
58
target/m68k/translate.c | 28 ++---
66
tcg/aarch64/tcg-target.c.inc | 229 ++++++++++++++---
59
target/ppc/cpu_init.c | 20 +--
67
tcg/tci/tcg-target.c.inc | 204 ++++++----------
60
target/ppc/helper_regs.c | 6 +-
68
18 files changed, 529 insertions(+), 610 deletions(-)
61
target/tricore/helper.c | 2 -
62
tcg/ppc/tcg-target.c.inc | 23 ++--
63
accel/meson.build | 4 +-
64
accel/qtest/meson.build | 2 +-
65
accel/stubs/meson.build | 2 +-
66
accel/tcg/meson.build | 6 +-
67
audio/meson.build | 8 +-
68
backends/meson.build | 20 +--
69
backends/tpm/meson.build | 8 +-
70
block/meson.build | 6 +-
71
block/monitor/meson.build | 2 +-
72
chardev/meson.build | 2 +-
73
disas/meson.build | 2 +-
74
dump/meson.build | 4 +-
75
ebpf/meson.build | 2 +-
76
fsdev/meson.build | 4 +-
77
gdbstub/meson.build | 10 +-
78
hw/9pfs/meson.build | 2 +-
79
hw/acpi/meson.build | 10 +-
80
hw/adc/meson.build | 10 +-
81
hw/arm/meson.build | 8 +-
82
hw/audio/meson.build | 28 ++---
83
hw/block/meson.build | 28 ++---
84
hw/char/meson.build | 70 +++++------
85
hw/core/meson.build | 22 ++--
86
hw/cpu/meson.build | 6 +-
87
hw/cxl/meson.build | 4 +-
88
hw/display/meson.build | 76 ++++++------
89
hw/dma/meson.build | 32 ++---
90
hw/gpio/meson.build | 26 ++--
91
hw/i2c/meson.build | 2 +-
92
hw/i386/kvm/meson.build | 2 +-
93
hw/ide/meson.build | 28 ++---
94
hw/input/meson.build | 32 ++---
95
hw/intc/meson.build | 44 +++----
96
hw/ipack/meson.build | 2 +-
97
hw/ipmi/meson.build | 2 +-
98
hw/isa/meson.build | 18 +--
99
hw/mem/meson.build | 8 +-
100
hw/misc/macio/meson.build | 2 +-
101
hw/misc/meson.build | 148 +++++++++++------------
102
hw/net/can/meson.build | 16 +--
103
hw/net/meson.build | 96 +++++++--------
104
hw/nubus/meson.build | 2 +-
105
hw/nvme/meson.build | 2 +-
106
hw/nvram/meson.build | 26 ++--
107
hw/pci-bridge/meson.build | 4 +-
108
hw/pci-host/meson.build | 2 +-
109
hw/pci/meson.build | 8 +-
110
hw/pcmcia/meson.build | 4 +-
111
hw/rdma/meson.build | 2 +-
112
hw/remote/meson.build | 2 +-
113
hw/rtc/meson.build | 28 ++---
114
hw/scsi/meson.build | 2 +-
115
hw/sd/meson.build | 24 ++--
116
hw/sensor/meson.build | 18 +--
117
hw/smbios/meson.build | 6 +-
118
hw/ssi/meson.build | 26 ++--
119
hw/timer/meson.build | 74 ++++++------
120
hw/tpm/meson.build | 14 +--
121
hw/usb/meson.build | 74 ++++++------
122
hw/virtio/meson.build | 12 +-
123
hw/watchdog/meson.build | 18 +--
124
hw/xen/meson.build | 4 +-
125
migration/meson.build | 12 +-
126
monitor/meson.build | 6 +-
127
net/can/meson.build | 2 +-
128
net/meson.build | 38 +++---
129
qapi/meson.build | 2 +-
130
qom/meson.build | 2 +-
131
replay/meson.build | 2 +-
132
semihosting/meson.build | 2 +-
133
softmmu/meson.build | 12 +-
134
stats/meson.build | 2 +-
135
target/alpha/meson.build | 6 +-
136
target/arm/hvf/meson.build | 2 +-
137
target/arm/meson.build | 6 +-
138
target/arm/tcg/meson.build | 2 +-
139
target/avr/meson.build | 6 +-
140
target/cris/meson.build | 6 +-
141
target/hppa/meson.build | 6 +-
142
target/i386/hax/meson.build | 6 +-
143
target/i386/hvf/meson.build | 2 +-
144
target/i386/kvm/meson.build | 4 +-
145
target/i386/meson.build | 8 +-
146
target/i386/nvmm/meson.build | 4 +-
147
target/i386/tcg/sysemu/meson.build | 2 +-
148
target/i386/whpx/meson.build | 2 +-
149
target/loongarch/meson.build | 6 +-
150
target/m68k/meson.build | 6 +-
151
target/microblaze/meson.build | 6 +-
152
target/mips/meson.build | 4 +-
153
target/mips/sysemu/meson.build | 2 +-
154
target/mips/tcg/sysemu/meson.build | 2 +-
155
target/nios2/meson.build | 6 +-
156
target/openrisc/meson.build | 6 +-
157
target/ppc/meson.build | 10 +-
158
target/riscv/meson.build | 6 +-
159
target/s390x/kvm/meson.build | 2 +-
160
target/s390x/meson.build | 6 +-
161
target/sh4/meson.build | 6 +-
162
target/sparc/meson.build | 6 +-
163
target/tricore/meson.build | 4 +-
164
target/xtensa/meson.build | 6 +-
165
tcg/meson.build | 2 +-
166
trace/meson.build | 2 +-
167
ui/meson.build | 30 ++---
168
125 files changed, 864 insertions(+), 854 deletions(-)
69
169
diff view generated by jsdifflib
[PULL 01/27] tcg/aarch64: Fix constant subtraction in tcg_out_addsub2
Deleted patch
1
An hppa guest executing
2
1
3
0x000000000000e05c: ldil L%10000,r4
4
0x000000000000e060: ldo 0(r4),r4
5
0x000000000000e064: sub r3,r4,sp
6
7
produces
8
9
---- 000000000000e064 000000000000e068
10
sub2_i32 tmp0,tmp4,r3,$0x1,$0x10000,$0x0
11
12
after folding and constant propagation. Then we hit
13
14
tcg-target.c.inc:640: tcg_out_insn_3401: Assertion `aimm <= 0xfff' failed.
15
16
because aimm is in fact -16, but unsigned.
17
18
The ((bl < 0) ^ sub) condition which negates bl is incorrect and will
19
always lead to this abort. If the constant is positive, sub will make
20
it negative; if the constant is negative, sub will keep it negative.
21
22
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23
---
24
tcg/aarch64/tcg-target.c.inc | 16 +++++++++-------
25
1 file changed, 9 insertions(+), 7 deletions(-)
26
27
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
28
index XXXXXXX..XXXXXXX 100644
29
--- a/tcg/aarch64/tcg-target.c.inc
30
+++ b/tcg/aarch64/tcg-target.c.inc
31
@@ -XXX,XX +XXX,XX @@ static void tcg_out_addsubi(TCGContext *s, int ext, TCGReg rd,
32
}
33
}
34
35
-static inline void tcg_out_addsub2(TCGContext *s, TCGType ext, TCGReg rl,
36
- TCGReg rh, TCGReg al, TCGReg ah,
37
- tcg_target_long bl, tcg_target_long bh,
38
- bool const_bl, bool const_bh, bool sub)
39
+static void tcg_out_addsub2(TCGContext *s, TCGType ext, TCGReg rl,
40
+ TCGReg rh, TCGReg al, TCGReg ah,
41
+ tcg_target_long bl, tcg_target_long bh,
42
+ bool const_bl, bool const_bh, bool sub)
43
{
44
TCGReg orig_rl = rl;
45
AArch64Insn insn;
46
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_addsub2(TCGContext *s, TCGType ext, TCGReg rl,
47
}
48
49
if (const_bl) {
50
- insn = I3401_ADDSI;
51
- if ((bl < 0) ^ sub) {
52
- insn = I3401_SUBSI;
53
+ if (bl < 0) {
54
bl = -bl;
55
+ insn = sub ? I3401_ADDSI : I3401_SUBSI;
56
+ } else {
57
+ insn = sub ? I3401_SUBSI : I3401_ADDSI;
58
}
59
+
60
if (unlikely(al == TCG_REG_XZR)) {
61
/* ??? We want to allow al to be zero for the benefit of
62
negation via subtraction. However, that leaves open the
63
--
64
2.25.1
65
66
diff view generated by jsdifflib
[PULL 02/27] tcg/aarch64: Fix I3617_CMLE0
Deleted patch
1
Fix a typo in the encodeing of the cmle (zero) instruction.
2
1
3
Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/aarch64/tcg-target.c.inc | 2 +-
7
1 file changed, 1 insertion(+), 1 deletion(-)
8
9
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
10
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/aarch64/tcg-target.c.inc
12
+++ b/tcg/aarch64/tcg-target.c.inc
13
@@ -XXX,XX +XXX,XX @@ typedef enum {
14
I3617_CMEQ0 = 0x0e209800,
15
I3617_CMLT0 = 0x0e20a800,
16
I3617_CMGE0 = 0x2e208800,
17
- I3617_CMLE0 = 0x2e20a800,
18
+ I3617_CMLE0 = 0x2e209800,
19
I3617_NOT = 0x2e205800,
20
I3617_ABS = 0x0e20b800,
21
I3617_NEG = 0x2e20b800,
22
--
23
2.25.1
24
25
diff view generated by jsdifflib
[PULL 03/27] tcg/aarch64: Fix generation of "scalar" vector operations
Deleted patch
1
For some vector operations, "1D" is not a valid type, and there
2
are separate instructions for the 64-bit scalar operation.
3
1
4
Tested-by: Stefan Weil <sw@weilnetz.de>
5
Buglink: https://bugs.launchpad.net/qemu/+bug/1916112
6
Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
tcg/aarch64/tcg-target.c.inc | 211 ++++++++++++++++++++++++++++++-----
10
1 file changed, 181 insertions(+), 30 deletions(-)
11
12
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
13
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/aarch64/tcg-target.c.inc
15
+++ b/tcg/aarch64/tcg-target.c.inc
16
@@ -XXX,XX +XXX,XX @@ typedef enum {
17
I3606_BIC = 0x2f001400,
18
I3606_ORR = 0x0f001400,
19
20
+ /* AdvSIMD scalar shift by immediate */
21
+ I3609_SSHR = 0x5f000400,
22
+ I3609_SSRA = 0x5f001400,
23
+ I3609_SHL = 0x5f005400,
24
+ I3609_USHR = 0x7f000400,
25
+ I3609_USRA = 0x7f001400,
26
+ I3609_SLI = 0x7f005400,
27
+
28
+ /* AdvSIMD scalar three same */
29
+ I3611_SQADD = 0x5e200c00,
30
+ I3611_SQSUB = 0x5e202c00,
31
+ I3611_CMGT = 0x5e203400,
32
+ I3611_CMGE = 0x5e203c00,
33
+ I3611_SSHL = 0x5e204400,
34
+ I3611_ADD = 0x5e208400,
35
+ I3611_CMTST = 0x5e208c00,
36
+ I3611_UQADD = 0x7e200c00,
37
+ I3611_UQSUB = 0x7e202c00,
38
+ I3611_CMHI = 0x7e203400,
39
+ I3611_CMHS = 0x7e203c00,
40
+ I3611_USHL = 0x7e204400,
41
+ I3611_SUB = 0x7e208400,
42
+ I3611_CMEQ = 0x7e208c00,
43
+
44
+ /* AdvSIMD scalar two-reg misc */
45
+ I3612_CMGT0 = 0x5e208800,
46
+ I3612_CMEQ0 = 0x5e209800,
47
+ I3612_CMLT0 = 0x5e20a800,
48
+ I3612_ABS = 0x5e20b800,
49
+ I3612_CMGE0 = 0x7e208800,
50
+ I3612_CMLE0 = 0x7e209800,
51
+ I3612_NEG = 0x7e20b800,
52
+
53
/* AdvSIMD shift by immediate */
54
I3614_SSHR = 0x0f000400,
55
I3614_SSRA = 0x0f001400,
56
@@ -XXX,XX +XXX,XX @@ static void tcg_out_insn_3606(TCGContext *s, AArch64Insn insn, bool q,
57
| (imm8 & 0xe0) << (16 - 5) | (imm8 & 0x1f) << 5);
58
}
59
60
+static void tcg_out_insn_3609(TCGContext *s, AArch64Insn insn,
61
+ TCGReg rd, TCGReg rn, unsigned immhb)
62
+{
63
+ tcg_out32(s, insn | immhb << 16 | (rn & 0x1f) << 5 | (rd & 0x1f));
64
+}
65
+
66
+static void tcg_out_insn_3611(TCGContext *s, AArch64Insn insn,
67
+ unsigned size, TCGReg rd, TCGReg rn, TCGReg rm)
68
+{
69
+ tcg_out32(s, insn | (size << 22) | (rm & 0x1f) << 16
70
+ | (rn & 0x1f) << 5 | (rd & 0x1f));
71
+}
72
+
73
+static void tcg_out_insn_3612(TCGContext *s, AArch64Insn insn,
74
+ unsigned size, TCGReg rd, TCGReg rn)
75
+{
76
+ tcg_out32(s, insn | (size << 22) | (rn & 0x1f) << 5 | (rd & 0x1f));
77
+}
78
+
79
static void tcg_out_insn_3614(TCGContext *s, AArch64Insn insn, bool q,
80
TCGReg rd, TCGReg rn, unsigned immhb)
81
{
82
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
83
unsigned vecl, unsigned vece,
84
const TCGArg *args, const int *const_args)
85
{
86
- static const AArch64Insn cmp_insn[16] = {
87
+ static const AArch64Insn cmp_vec_insn[16] = {
88
[TCG_COND_EQ] = I3616_CMEQ,
89
[TCG_COND_GT] = I3616_CMGT,
90
[TCG_COND_GE] = I3616_CMGE,
91
[TCG_COND_GTU] = I3616_CMHI,
92
[TCG_COND_GEU] = I3616_CMHS,
93
};
94
- static const AArch64Insn cmp0_insn[16] = {
95
+ static const AArch64Insn cmp_scalar_insn[16] = {
96
+ [TCG_COND_EQ] = I3611_CMEQ,
97
+ [TCG_COND_GT] = I3611_CMGT,
98
+ [TCG_COND_GE] = I3611_CMGE,
99
+ [TCG_COND_GTU] = I3611_CMHI,
100
+ [TCG_COND_GEU] = I3611_CMHS,
101
+ };
102
+ static const AArch64Insn cmp0_vec_insn[16] = {
103
[TCG_COND_EQ] = I3617_CMEQ0,
104
[TCG_COND_GT] = I3617_CMGT0,
105
[TCG_COND_GE] = I3617_CMGE0,
106
[TCG_COND_LT] = I3617_CMLT0,
107
[TCG_COND_LE] = I3617_CMLE0,
108
};
109
+ static const AArch64Insn cmp0_scalar_insn[16] = {
110
+ [TCG_COND_EQ] = I3612_CMEQ0,
111
+ [TCG_COND_GT] = I3612_CMGT0,
112
+ [TCG_COND_GE] = I3612_CMGE0,
113
+ [TCG_COND_LT] = I3612_CMLT0,
114
+ [TCG_COND_LE] = I3612_CMLE0,
115
+ };
116
117
TCGType type = vecl + TCG_TYPE_V64;
118
unsigned is_q = vecl;
119
+ bool is_scalar = !is_q && vece == MO_64;
120
TCGArg a0, a1, a2, a3;
121
int cmode, imm8;
122
123
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
124
tcg_out_dupm_vec(s, type, vece, a0, a1, a2);
125
break;
126
case INDEX_op_add_vec:
127
- tcg_out_insn(s, 3616, ADD, is_q, vece, a0, a1, a2);
128
+ if (is_scalar) {
129
+ tcg_out_insn(s, 3611, ADD, vece, a0, a1, a2);
130
+ } else {
131
+ tcg_out_insn(s, 3616, ADD, is_q, vece, a0, a1, a2);
132
+ }
133
break;
134
case INDEX_op_sub_vec:
135
- tcg_out_insn(s, 3616, SUB, is_q, vece, a0, a1, a2);
136
+ if (is_scalar) {
137
+ tcg_out_insn(s, 3611, SUB, vece, a0, a1, a2);
138
+ } else {
139
+ tcg_out_insn(s, 3616, SUB, is_q, vece, a0, a1, a2);
140
+ }
141
break;
142
case INDEX_op_mul_vec:
143
tcg_out_insn(s, 3616, MUL, is_q, vece, a0, a1, a2);
144
break;
145
case INDEX_op_neg_vec:
146
- tcg_out_insn(s, 3617, NEG, is_q, vece, a0, a1);
147
+ if (is_scalar) {
148
+ tcg_out_insn(s, 3612, NEG, vece, a0, a1);
149
+ } else {
150
+ tcg_out_insn(s, 3617, NEG, is_q, vece, a0, a1);
151
+ }
152
break;
153
case INDEX_op_abs_vec:
154
- tcg_out_insn(s, 3617, ABS, is_q, vece, a0, a1);
155
+ if (is_scalar) {
156
+ tcg_out_insn(s, 3612, ABS, vece, a0, a1);
157
+ } else {
158
+ tcg_out_insn(s, 3617, ABS, is_q, vece, a0, a1);
159
+ }
160
break;
161
case INDEX_op_and_vec:
162
if (const_args[2]) {
163
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
164
tcg_out_insn(s, 3616, EOR, is_q, 0, a0, a1, a2);
165
break;
166
case INDEX_op_ssadd_vec:
167
- tcg_out_insn(s, 3616, SQADD, is_q, vece, a0, a1, a2);
168
+ if (is_scalar) {
169
+ tcg_out_insn(s, 3611, SQADD, vece, a0, a1, a2);
170
+ } else {
171
+ tcg_out_insn(s, 3616, SQADD, is_q, vece, a0, a1, a2);
172
+ }
173
break;
174
case INDEX_op_sssub_vec:
175
- tcg_out_insn(s, 3616, SQSUB, is_q, vece, a0, a1, a2);
176
+ if (is_scalar) {
177
+ tcg_out_insn(s, 3611, SQSUB, vece, a0, a1, a2);
178
+ } else {
179
+ tcg_out_insn(s, 3616, SQSUB, is_q, vece, a0, a1, a2);
180
+ }
181
break;
182
case INDEX_op_usadd_vec:
183
- tcg_out_insn(s, 3616, UQADD, is_q, vece, a0, a1, a2);
184
+ if (is_scalar) {
185
+ tcg_out_insn(s, 3611, UQADD, vece, a0, a1, a2);
186
+ } else {
187
+ tcg_out_insn(s, 3616, UQADD, is_q, vece, a0, a1, a2);
188
+ }
189
break;
190
case INDEX_op_ussub_vec:
191
- tcg_out_insn(s, 3616, UQSUB, is_q, vece, a0, a1, a2);
192
+ if (is_scalar) {
193
+ tcg_out_insn(s, 3611, UQSUB, vece, a0, a1, a2);
194
+ } else {
195
+ tcg_out_insn(s, 3616, UQSUB, is_q, vece, a0, a1, a2);
196
+ }
197
break;
198
case INDEX_op_smax_vec:
199
tcg_out_insn(s, 3616, SMAX, is_q, vece, a0, a1, a2);
200
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
201
tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a1);
202
break;
203
case INDEX_op_shli_vec:
204
- tcg_out_insn(s, 3614, SHL, is_q, a0, a1, a2 + (8 << vece));
205
+ if (is_scalar) {
206
+ tcg_out_insn(s, 3609, SHL, a0, a1, a2 + (8 << vece));
207
+ } else {
208
+ tcg_out_insn(s, 3614, SHL, is_q, a0, a1, a2 + (8 << vece));
209
+ }
210
break;
211
case INDEX_op_shri_vec:
212
- tcg_out_insn(s, 3614, USHR, is_q, a0, a1, (16 << vece) - a2);
213
+ if (is_scalar) {
214
+ tcg_out_insn(s, 3609, USHR, a0, a1, (16 << vece) - a2);
215
+ } else {
216
+ tcg_out_insn(s, 3614, USHR, is_q, a0, a1, (16 << vece) - a2);
217
+ }
218
break;
219
case INDEX_op_sari_vec:
220
- tcg_out_insn(s, 3614, SSHR, is_q, a0, a1, (16 << vece) - a2);
221
+ if (is_scalar) {
222
+ tcg_out_insn(s, 3609, SSHR, a0, a1, (16 << vece) - a2);
223
+ } else {
224
+ tcg_out_insn(s, 3614, SSHR, is_q, a0, a1, (16 << vece) - a2);
225
+ }
226
break;
227
case INDEX_op_aa64_sli_vec:
228
- tcg_out_insn(s, 3614, SLI, is_q, a0, a2, args[3] + (8 << vece));
229
+ if (is_scalar) {
230
+ tcg_out_insn(s, 3609, SLI, a0, a2, args[3] + (8 << vece));
231
+ } else {
232
+ tcg_out_insn(s, 3614, SLI, is_q, a0, a2, args[3] + (8 << vece));
233
+ }
234
break;
235
case INDEX_op_shlv_vec:
236
- tcg_out_insn(s, 3616, USHL, is_q, vece, a0, a1, a2);
237
+ if (is_scalar) {
238
+ tcg_out_insn(s, 3611, USHL, vece, a0, a1, a2);
239
+ } else {
240
+ tcg_out_insn(s, 3616, USHL, is_q, vece, a0, a1, a2);
241
+ }
242
break;
243
case INDEX_op_aa64_sshl_vec:
244
- tcg_out_insn(s, 3616, SSHL, is_q, vece, a0, a1, a2);
245
+ if (is_scalar) {
246
+ tcg_out_insn(s, 3611, SSHL, vece, a0, a1, a2);
247
+ } else {
248
+ tcg_out_insn(s, 3616, SSHL, is_q, vece, a0, a1, a2);
249
+ }
250
break;
251
case INDEX_op_cmp_vec:
252
{
253
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
254
255
if (cond == TCG_COND_NE) {
256
if (const_args[2]) {
257
- tcg_out_insn(s, 3616, CMTST, is_q, vece, a0, a1, a1);
258
+ if (is_scalar) {
259
+ tcg_out_insn(s, 3611, CMTST, vece, a0, a1, a1);
260
+ } else {
261
+ tcg_out_insn(s, 3616, CMTST, is_q, vece, a0, a1, a1);
262
+ }
263
} else {
264
- tcg_out_insn(s, 3616, CMEQ, is_q, vece, a0, a1, a2);
265
+ if (is_scalar) {
266
+ tcg_out_insn(s, 3611, CMEQ, vece, a0, a1, a2);
267
+ } else {
268
+ tcg_out_insn(s, 3616, CMEQ, is_q, vece, a0, a1, a2);
269
+ }
270
tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a0);
271
}
272
} else {
273
if (const_args[2]) {
274
- insn = cmp0_insn[cond];
275
- if (insn) {
276
- tcg_out_insn_3617(s, insn, is_q, vece, a0, a1);
277
- break;
278
+ if (is_scalar) {
279
+ insn = cmp0_scalar_insn[cond];
280
+ if (insn) {
281
+ tcg_out_insn_3612(s, insn, vece, a0, a1);
282
+ break;
283
+ }
284
+ } else {
285
+ insn = cmp0_vec_insn[cond];
286
+ if (insn) {
287
+ tcg_out_insn_3617(s, insn, is_q, vece, a0, a1);
288
+ break;
289
+ }
290
}
291
tcg_out_dupi_vec(s, type, MO_8, TCG_VEC_TMP, 0);
292
a2 = TCG_VEC_TMP;
293
}
294
- insn = cmp_insn[cond];
295
- if (insn == 0) {
296
- TCGArg t;
297
- t = a1, a1 = a2, a2 = t;
298
- cond = tcg_swap_cond(cond);
299
- insn = cmp_insn[cond];
300
- tcg_debug_assert(insn != 0);
301
+ if (is_scalar) {
302
+ insn = cmp_scalar_insn[cond];
303
+ if (insn == 0) {
304
+ TCGArg t;
305
+ t = a1, a1 = a2, a2 = t;
306
+ cond = tcg_swap_cond(cond);
307
+ insn = cmp_scalar_insn[cond];
308
+ tcg_debug_assert(insn != 0);
309
+ }
310
+ tcg_out_insn_3611(s, insn, vece, a0, a1, a2);
311
+ } else {
312
+ insn = cmp_vec_insn[cond];
313
+ if (insn == 0) {
314
+ TCGArg t;
315
+ t = a1, a1 = a2, a2 = t;
316
+ cond = tcg_swap_cond(cond);
317
+ insn = cmp_vec_insn[cond];
318
+ tcg_debug_assert(insn != 0);
319
+ }
320
+ tcg_out_insn_3616(s, insn, is_q, vece, a0, a1, a2);
321
}
322
- tcg_out_insn_3616(s, insn, is_q, vece, a0, a1, a2);
323
}
324
}
325
break;
326
--
327
2.25.1
328
329
diff view generated by jsdifflib
[PULL 16/27] tcg/tci: Remove tci_read_r32
[PULL 01/16] host/include/x86_64: Use __m128i for "x" constraints
1
Use explicit casts for ext32u opcodes, and allow truncation
1
The macOS catalina compiler produces an error for __int128_t
2
to happen for other users.
2
as the type for allocation with SSE inline asm constraint.
3
Create a new X86Int128Union type and use the vector type for
4
all SSE register inputs and outputs.
3
5
4
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Tested-by: Peter Maydell <peter.maydell@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
8
---
7
tcg/tci.c | 122 ++++++++++++++++++++++++------------------------------
9
host/include/x86_64/host/atomic128-ldst.h | 25 ++++++++++++-------
8
1 file changed, 54 insertions(+), 68 deletions(-)
10
.../x86_64/host/load-extract-al16-al8.h | 8 +++---
11
2 files changed, 20 insertions(+), 13 deletions(-)
9
12
10
diff --git a/tcg/tci.c b/tcg/tci.c
13
diff --git a/host/include/x86_64/host/atomic128-ldst.h b/host/include/x86_64/host/atomic128-ldst.h
11
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/tci.c
15
--- a/host/include/x86_64/host/atomic128-ldst.h
13
+++ b/tcg/tci.c
16
+++ b/host/include/x86_64/host/atomic128-ldst.h
14
@@ -XXX,XX +XXX,XX @@ static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index)
17
@@ -XXX,XX +XXX,XX @@
18
* atomic primitive is meant to provide.
19
*/
20
21
-#ifndef AARCH64_ATOMIC128_LDST_H
22
-#define AARCH64_ATOMIC128_LDST_H
23
+#ifndef X86_64_ATOMIC128_LDST_H
24
+#define X86_64_ATOMIC128_LDST_H
25
26
#ifdef CONFIG_INT128_TYPE
27
#include "host/cpuinfo.h"
28
#include "tcg/debug-assert.h"
29
+#include <immintrin.h>
30
+
31
+typedef union {
32
+ __m128i v;
33
+ __int128_t i;
34
+ Int128 s;
35
+} X86Int128Union;
36
37
/*
38
* Through clang 16, with -mcx16, __atomic_load_n is incorrectly
39
@@ -XXX,XX +XXX,XX @@
40
41
static inline Int128 atomic16_read_ro(const Int128 *ptr)
42
{
43
- Int128Alias r;
44
+ X86Int128Union r;
45
46
tcg_debug_assert(HAVE_ATOMIC128_RO);
47
- asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr));
48
+ asm("vmovdqa %1, %0" : "=x" (r.v) : "m" (*ptr));
49
50
return r.s;
15
}
51
}
52
@@ -XXX,XX +XXX,XX @@ static inline Int128 atomic16_read_ro(const Int128 *ptr)
53
static inline Int128 atomic16_read_rw(Int128 *ptr)
54
{
55
__int128_t *ptr_align = __builtin_assume_aligned(ptr, 16);
56
- Int128Alias r;
57
+ X86Int128Union r;
58
59
if (HAVE_ATOMIC128_RO) {
60
- asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr_align));
61
+ asm("vmovdqa %1, %0" : "=x" (r.v) : "m" (*ptr_align));
62
} else {
63
r.i = __sync_val_compare_and_swap_16(ptr_align, 0, 0);
64
}
65
@@ -XXX,XX +XXX,XX @@ static inline Int128 atomic16_read_rw(Int128 *ptr)
66
static inline void atomic16_set(Int128 *ptr, Int128 val)
67
{
68
__int128_t *ptr_align = __builtin_assume_aligned(ptr, 16);
69
- Int128Alias new = { .s = val };
70
+ X86Int128Union new = { .s = val };
71
72
if (HAVE_ATOMIC128_RO) {
73
- asm("vmovdqa %1, %0" : "=m"(*ptr_align) : "x" (new.i));
74
+ asm("vmovdqa %1, %0" : "=m"(*ptr_align) : "x" (new.v));
75
} else {
76
__int128_t old;
77
do {
78
@@ -XXX,XX +XXX,XX @@ static inline void atomic16_set(Int128 *ptr, Int128 val)
79
#include "host/include/generic/host/atomic128-ldst.h"
16
#endif
80
#endif
17
81
18
-static uint32_t tci_read_reg32(const tcg_target_ulong *regs, TCGReg index)
82
-#endif /* AARCH64_ATOMIC128_LDST_H */
19
-{
83
+#endif /* X86_64_ATOMIC128_LDST_H */
20
- return (uint32_t)tci_read_reg(regs, index);
84
diff --git a/host/include/x86_64/host/load-extract-al16-al8.h b/host/include/x86_64/host/load-extract-al16-al8.h
21
-}
85
index XXXXXXX..XXXXXXX 100644
22
-
86
--- a/host/include/x86_64/host/load-extract-al16-al8.h
23
#if TCG_TARGET_REG_BITS == 64
87
+++ b/host/include/x86_64/host/load-extract-al16-al8.h
24
static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index)
88
@@ -XXX,XX +XXX,XX @@
25
{
89
#define X86_64_LOAD_EXTRACT_AL16_AL8_H
26
@@ -XXX,XX +XXX,XX @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
90
27
return value;
91
#ifdef CONFIG_INT128_TYPE
92
-#include "host/cpuinfo.h"
93
+#include "host/atomic128-ldst.h"
94
95
/**
96
* load_atom_extract_al16_or_al8:
97
@@ -XXX,XX +XXX,XX @@ load_atom_extract_al16_or_al8(void *pv, int s)
98
uintptr_t pi = (uintptr_t)pv;
99
__int128_t *ptr_align = (__int128_t *)(pi & ~7);
100
int shr = (pi & 7) * 8;
101
- Int128Alias r;
102
+ X86Int128Union r;
103
104
/*
105
* ptr_align % 16 is now only 0 or 8.
106
@@ -XXX,XX +XXX,XX @@ load_atom_extract_al16_or_al8(void *pv, int s)
107
* when ptr_align % 16 == 0 for 16-byte atomicity.
108
*/
109
if ((cpuinfo & CPUINFO_ATOMIC_VMOVDQU) || (pi & 8)) {
110
- asm("vmovdqu %1, %0" : "=x" (r.i) : "m" (*ptr_align));
111
+ asm("vmovdqu %1, %0" : "=x" (r.v) : "m" (*ptr_align));
112
} else {
113
- asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr_align));
114
+ asm("vmovdqa %1, %0" : "=x" (r.v) : "m" (*ptr_align));
115
}
116
return int128_getlo(int128_urshift(r.s, shr));
28
}
117
}
29
30
-/* Read indexed register (32 bit) from bytecode. */
31
-static uint32_t tci_read_r32(const tcg_target_ulong *regs,
32
- const uint8_t **tb_ptr)
33
-{
34
- uint32_t value = tci_read_reg32(regs, **tb_ptr);
35
- *tb_ptr += 1;
36
- return value;
37
-}
38
-
39
#if TCG_TARGET_REG_BITS == 32
40
/* Read two indexed registers (2 * 32 bit) from bytecode. */
41
static uint64_t tci_read_r64(const tcg_target_ulong *regs,
42
const uint8_t **tb_ptr)
43
{
44
- uint32_t low = tci_read_r32(regs, tb_ptr);
45
- return tci_uint64(tci_read_r32(regs, tb_ptr), low);
46
+ uint32_t low = tci_read_r(regs, tb_ptr);
47
+ return tci_uint64(tci_read_r(regs, tb_ptr), low);
48
}
49
#elif TCG_TARGET_REG_BITS == 64
50
/* Read indexed register (32 bit signed) from bytecode. */
51
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
52
continue;
53
case INDEX_op_setcond_i32:
54
t0 = *tb_ptr++;
55
- t1 = tci_read_r32(regs, &tb_ptr);
56
- t2 = tci_read_r32(regs, &tb_ptr);
57
+ t1 = tci_read_r(regs, &tb_ptr);
58
+ t2 = tci_read_r(regs, &tb_ptr);
59
condition = *tb_ptr++;
60
tci_write_reg(regs, t0, tci_compare32(t1, t2, condition));
61
break;
62
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
63
#endif
64
case INDEX_op_mov_i32:
65
t0 = *tb_ptr++;
66
- t1 = tci_read_r32(regs, &tb_ptr);
67
+ t1 = tci_read_r(regs, &tb_ptr);
68
tci_write_reg(regs, t0, t1);
69
break;
70
case INDEX_op_tci_movi_i32:
71
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
72
break;
73
case INDEX_op_st_i32:
74
CASE_64(st32)
75
- t0 = tci_read_r32(regs, &tb_ptr);
76
+ t0 = tci_read_r(regs, &tb_ptr);
77
t1 = tci_read_r(regs, &tb_ptr);
78
t2 = tci_read_s32(&tb_ptr);
79
*(uint32_t *)(t1 + t2) = t0;
80
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
81
82
case INDEX_op_add_i32:
83
t0 = *tb_ptr++;
84
- t1 = tci_read_r32(regs, &tb_ptr);
85
- t2 = tci_read_r32(regs, &tb_ptr);
86
+ t1 = tci_read_r(regs, &tb_ptr);
87
+ t2 = tci_read_r(regs, &tb_ptr);
88
tci_write_reg(regs, t0, t1 + t2);
89
break;
90
case INDEX_op_sub_i32:
91
t0 = *tb_ptr++;
92
- t1 = tci_read_r32(regs, &tb_ptr);
93
- t2 = tci_read_r32(regs, &tb_ptr);
94
+ t1 = tci_read_r(regs, &tb_ptr);
95
+ t2 = tci_read_r(regs, &tb_ptr);
96
tci_write_reg(regs, t0, t1 - t2);
97
break;
98
case INDEX_op_mul_i32:
99
t0 = *tb_ptr++;
100
- t1 = tci_read_r32(regs, &tb_ptr);
101
- t2 = tci_read_r32(regs, &tb_ptr);
102
+ t1 = tci_read_r(regs, &tb_ptr);
103
+ t2 = tci_read_r(regs, &tb_ptr);
104
tci_write_reg(regs, t0, t1 * t2);
105
break;
106
case INDEX_op_div_i32:
107
t0 = *tb_ptr++;
108
- t1 = tci_read_r32(regs, &tb_ptr);
109
- t2 = tci_read_r32(regs, &tb_ptr);
110
+ t1 = tci_read_r(regs, &tb_ptr);
111
+ t2 = tci_read_r(regs, &tb_ptr);
112
tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2);
113
break;
114
case INDEX_op_divu_i32:
115
t0 = *tb_ptr++;
116
- t1 = tci_read_r32(regs, &tb_ptr);
117
- t2 = tci_read_r32(regs, &tb_ptr);
118
- tci_write_reg(regs, t0, t1 / t2);
119
+ t1 = tci_read_r(regs, &tb_ptr);
120
+ t2 = tci_read_r(regs, &tb_ptr);
121
+ tci_write_reg(regs, t0, (uint32_t)t1 / (uint32_t)t2);
122
break;
123
case INDEX_op_rem_i32:
124
t0 = *tb_ptr++;
125
- t1 = tci_read_r32(regs, &tb_ptr);
126
- t2 = tci_read_r32(regs, &tb_ptr);
127
+ t1 = tci_read_r(regs, &tb_ptr);
128
+ t2 = tci_read_r(regs, &tb_ptr);
129
tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2);
130
break;
131
case INDEX_op_remu_i32:
132
t0 = *tb_ptr++;
133
- t1 = tci_read_r32(regs, &tb_ptr);
134
- t2 = tci_read_r32(regs, &tb_ptr);
135
- tci_write_reg(regs, t0, t1 % t2);
136
+ t1 = tci_read_r(regs, &tb_ptr);
137
+ t2 = tci_read_r(regs, &tb_ptr);
138
+ tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2);
139
break;
140
case INDEX_op_and_i32:
141
t0 = *tb_ptr++;
142
- t1 = tci_read_r32(regs, &tb_ptr);
143
- t2 = tci_read_r32(regs, &tb_ptr);
144
+ t1 = tci_read_r(regs, &tb_ptr);
145
+ t2 = tci_read_r(regs, &tb_ptr);
146
tci_write_reg(regs, t0, t1 & t2);
147
break;
148
case INDEX_op_or_i32:
149
t0 = *tb_ptr++;
150
- t1 = tci_read_r32(regs, &tb_ptr);
151
- t2 = tci_read_r32(regs, &tb_ptr);
152
+ t1 = tci_read_r(regs, &tb_ptr);
153
+ t2 = tci_read_r(regs, &tb_ptr);
154
tci_write_reg(regs, t0, t1 | t2);
155
break;
156
case INDEX_op_xor_i32:
157
t0 = *tb_ptr++;
158
- t1 = tci_read_r32(regs, &tb_ptr);
159
- t2 = tci_read_r32(regs, &tb_ptr);
160
+ t1 = tci_read_r(regs, &tb_ptr);
161
+ t2 = tci_read_r(regs, &tb_ptr);
162
tci_write_reg(regs, t0, t1 ^ t2);
163
break;
164
165
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
166
167
case INDEX_op_shl_i32:
168
t0 = *tb_ptr++;
169
- t1 = tci_read_r32(regs, &tb_ptr);
170
- t2 = tci_read_r32(regs, &tb_ptr);
171
- tci_write_reg(regs, t0, t1 << (t2 & 31));
172
+ t1 = tci_read_r(regs, &tb_ptr);
173
+ t2 = tci_read_r(regs, &tb_ptr);
174
+ tci_write_reg(regs, t0, (uint32_t)t1 << (t2 & 31));
175
break;
176
case INDEX_op_shr_i32:
177
t0 = *tb_ptr++;
178
- t1 = tci_read_r32(regs, &tb_ptr);
179
- t2 = tci_read_r32(regs, &tb_ptr);
180
- tci_write_reg(regs, t0, t1 >> (t2 & 31));
181
+ t1 = tci_read_r(regs, &tb_ptr);
182
+ t2 = tci_read_r(regs, &tb_ptr);
183
+ tci_write_reg(regs, t0, (uint32_t)t1 >> (t2 & 31));
184
break;
185
case INDEX_op_sar_i32:
186
t0 = *tb_ptr++;
187
- t1 = tci_read_r32(regs, &tb_ptr);
188
- t2 = tci_read_r32(regs, &tb_ptr);
189
- tci_write_reg(regs, t0, ((int32_t)t1 >> (t2 & 31)));
190
+ t1 = tci_read_r(regs, &tb_ptr);
191
+ t2 = tci_read_r(regs, &tb_ptr);
192
+ tci_write_reg(regs, t0, (int32_t)t1 >> (t2 & 31));
193
break;
194
#if TCG_TARGET_HAS_rot_i32
195
case INDEX_op_rotl_i32:
196
t0 = *tb_ptr++;
197
- t1 = tci_read_r32(regs, &tb_ptr);
198
- t2 = tci_read_r32(regs, &tb_ptr);
199
+ t1 = tci_read_r(regs, &tb_ptr);
200
+ t2 = tci_read_r(regs, &tb_ptr);
201
tci_write_reg(regs, t0, rol32(t1, t2 & 31));
202
break;
203
case INDEX_op_rotr_i32:
204
t0 = *tb_ptr++;
205
- t1 = tci_read_r32(regs, &tb_ptr);
206
- t2 = tci_read_r32(regs, &tb_ptr);
207
+ t1 = tci_read_r(regs, &tb_ptr);
208
+ t2 = tci_read_r(regs, &tb_ptr);
209
tci_write_reg(regs, t0, ror32(t1, t2 & 31));
210
break;
211
#endif
212
#if TCG_TARGET_HAS_deposit_i32
213
case INDEX_op_deposit_i32:
214
t0 = *tb_ptr++;
215
- t1 = tci_read_r32(regs, &tb_ptr);
216
- t2 = tci_read_r32(regs, &tb_ptr);
217
+ t1 = tci_read_r(regs, &tb_ptr);
218
+ t2 = tci_read_r(regs, &tb_ptr);
219
tmp16 = *tb_ptr++;
220
tmp8 = *tb_ptr++;
221
tmp32 = (((1 << tmp8) - 1) << tmp16);
222
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
223
break;
224
#endif
225
case INDEX_op_brcond_i32:
226
- t0 = tci_read_r32(regs, &tb_ptr);
227
- t1 = tci_read_r32(regs, &tb_ptr);
228
+ t0 = tci_read_r(regs, &tb_ptr);
229
+ t1 = tci_read_r(regs, &tb_ptr);
230
condition = *tb_ptr++;
231
label = tci_read_label(&tb_ptr);
232
if (tci_compare32(t0, t1, condition)) {
233
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
234
case INDEX_op_mulu2_i32:
235
t0 = *tb_ptr++;
236
t1 = *tb_ptr++;
237
- t2 = tci_read_r32(regs, &tb_ptr);
238
- tmp64 = tci_read_r32(regs, &tb_ptr);
239
- tci_write_reg64(regs, t1, t0, t2 * tmp64);
240
+ t2 = tci_read_r(regs, &tb_ptr);
241
+ tmp64 = (uint32_t)tci_read_r(regs, &tb_ptr);
242
+ tci_write_reg64(regs, t1, t0, (uint32_t)t2 * tmp64);
243
break;
244
#endif /* TCG_TARGET_REG_BITS == 32 */
245
#if TCG_TARGET_HAS_ext8s_i32
246
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
247
#if TCG_TARGET_HAS_bswap32_i32
248
case INDEX_op_bswap32_i32:
249
t0 = *tb_ptr++;
250
- t1 = tci_read_r32(regs, &tb_ptr);
251
+ t1 = tci_read_r(regs, &tb_ptr);
252
tci_write_reg(regs, t0, bswap32(t1));
253
break;
254
#endif
255
#if TCG_TARGET_HAS_not_i32
256
case INDEX_op_not_i32:
257
t0 = *tb_ptr++;
258
- t1 = tci_read_r32(regs, &tb_ptr);
259
+ t1 = tci_read_r(regs, &tb_ptr);
260
tci_write_reg(regs, t0, ~t1);
261
break;
262
#endif
263
#if TCG_TARGET_HAS_neg_i32
264
case INDEX_op_neg_i32:
265
t0 = *tb_ptr++;
266
- t1 = tci_read_r32(regs, &tb_ptr);
267
+ t1 = tci_read_r(regs, &tb_ptr);
268
tci_write_reg(regs, t0, -t1);
269
break;
270
#endif
271
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
272
#endif
273
case INDEX_op_extu_i32_i64:
274
t0 = *tb_ptr++;
275
- t1 = tci_read_r32(regs, &tb_ptr);
276
- tci_write_reg(regs, t0, t1);
277
+ t1 = tci_read_r(regs, &tb_ptr);
278
+ tci_write_reg(regs, t0, (uint32_t)t1);
279
break;
280
#if TCG_TARGET_HAS_bswap16_i64
281
case INDEX_op_bswap16_i64:
282
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
283
#if TCG_TARGET_HAS_bswap32_i64
284
case INDEX_op_bswap32_i64:
285
t0 = *tb_ptr++;
286
- t1 = tci_read_r32(regs, &tb_ptr);
287
+ t1 = tci_read_r(regs, &tb_ptr);
288
tci_write_reg(regs, t0, bswap32(t1));
289
break;
290
#endif
291
--
118
--
292
2.25.1
119
2.34.1
293
294
diff view generated by jsdifflib
[PULL 26/27] include/exec: lightly re-arrange TranslationBlock
[PULL 02/16] accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
1
From: Alex Bennée <alex.bennee@linaro.org>
1
Otherwise we hit the default assert not reached.
2
Handle it as MO_ATOM_NONE, because of size and misalignment.
3
We already handle this correctly in do_ld16_beN.
2
4
3
Lets make sure all the flags we compare when looking up blocks are
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
4
together in the same place.
5
6
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
7
Message-Id: <20210224165811.11567-5-alex.bennee@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
7
---
10
include/exec/exec-all.h | 11 ++++++++---
8
accel/tcg/cputlb.c | 1 +
11
1 file changed, 8 insertions(+), 3 deletions(-)
9
1 file changed, 1 insertion(+)
12
10
13
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
11
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
14
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
15
--- a/include/exec/exec-all.h
13
--- a/accel/tcg/cputlb.c
16
+++ b/include/exec/exec-all.h
14
+++ b/accel/tcg/cputlb.c
17
@@ -XXX,XX +XXX,XX @@ struct TranslationBlock {
15
@@ -XXX,XX +XXX,XX @@ static uint64_t do_st16_leN(CPUArchState *env, MMULookupPageData *p,
18
target_ulong pc; /* simulated PC corresponding to this block (EIP + CS base) */
16
* and so neither is atomic.
19
target_ulong cs_base; /* CS base for this block */
17
*/
20
uint32_t flags; /* flags defining in which context the code was generated */
18
case MO_ATOM_IFALIGN:
21
- uint16_t size; /* size of target code for this block (1 <=
19
+ case MO_ATOM_WITHIN16:
22
- size <= TARGET_PAGE_SIZE) */
20
case MO_ATOM_NONE:
23
- uint16_t icount;
21
stq_le_p(p->haddr, int128_getlo(val_le));
24
uint32_t cflags; /* compile flags */
22
return store_bytes_leN(p->haddr + 8, p->size - 8,
25
#define CF_COUNT_MASK 0x00007fff
26
#define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */
27
@@ -XXX,XX +XXX,XX @@ struct TranslationBlock {
28
/* Per-vCPU dynamic tracing state used to generate this TB */
29
uint32_t trace_vcpu_dstate;
30
31
+ /*
32
+ * Above fields used for comparing
33
+ */
34
+
35
+ /* size of target code for this block (1 <= size <= TARGET_PAGE_SIZE) */
36
+ uint16_t size;
37
+ uint16_t icount;
38
+
39
struct tb_tc tc;
40
41
/* first and second physical page containing code. The lower bit
42
--
23
--
43
2.25.1
24
2.34.1
44
45
diff view generated by jsdifflib
[PULL 25/27] accel/tcg: drop the use of CF_HASH_MASK and rename params
[PULL 03/16] tcg/ppc: Define _CALL_AIX for clang on ppc64(be)
1
From: Alex Bennée <alex.bennee@linaro.org>
1
Restructure the ifdef ladder, separating 64-bit from 32-bit,
2
and ensure _CALL_AIX is set for ELF v1. Fixes the build for
3
ppc64 big-endian host with clang.
2
4
3
We don't really deal in cf_mask most of the time. The one time it's
5
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
4
relevant is when we want to remove an invalidated TB from the QHT
5
lookup. Everywhere else we should be looking up things without
6
CF_INVALID set.
7
8
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
9
Message-Id: <20210224165811.11567-4-alex.bennee@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
7
---
12
include/exec/exec-all.h | 4 +---
8
tcg/ppc/tcg-target.c.inc | 23 ++++++++++++++++-------
13
include/exec/tb-lookup.h | 9 ++++++---
9
1 file changed, 16 insertions(+), 7 deletions(-)
14
accel/tcg/cpu-exec.c | 16 ++++++++--------
15
accel/tcg/tcg-runtime.c | 2 +-
16
accel/tcg/translate-all.c | 8 +++++---
17
5 files changed, 21 insertions(+), 18 deletions(-)
18
10
19
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
11
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
20
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
21
--- a/include/exec/exec-all.h
13
--- a/tcg/ppc/tcg-target.c.inc
22
+++ b/include/exec/exec-all.h
14
+++ b/tcg/ppc/tcg-target.c.inc
23
@@ -XXX,XX +XXX,XX @@ struct TranslationBlock {
24
#define CF_PARALLEL 0x00080000 /* Generate code for a parallel context */
25
#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */
26
#define CF_CLUSTER_SHIFT 24
27
-/* cflags' mask for hashing/comparison, basically ignore CF_INVALID */
28
-#define CF_HASH_MASK (~CF_INVALID)
29
30
/* Per-vCPU dynamic tracing state used to generate this TB */
31
uint32_t trace_vcpu_dstate;
32
@@ -XXX,XX +XXX,XX @@ void tb_flush(CPUState *cpu);
33
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
34
TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
35
target_ulong cs_base, uint32_t flags,
36
- uint32_t cf_mask);
37
+ uint32_t cflags);
38
void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
39
40
/* GETPC is the true target of the return instruction that we'll execute. */
41
diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h
42
index XXXXXXX..XXXXXXX 100644
43
--- a/include/exec/tb-lookup.h
44
+++ b/include/exec/tb-lookup.h
45
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@
46
/* Might cause an exception, so have a longjmp destination ready */
16
/*
47
static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
17
* Standardize on the _CALL_FOO symbols used by GCC:
48
target_ulong cs_base,
18
* Apple XCode does not define _CALL_DARWIN.
49
- uint32_t flags, uint32_t cf_mask)
19
- * Clang defines _CALL_ELF (64-bit) but not _CALL_SYSV (32-bit).
50
+ uint32_t flags, uint32_t cflags)
20
+ * Clang defines _CALL_ELF (64-bit) but not _CALL_SYSV or _CALL_AIX.
51
{
21
*/
52
TranslationBlock *tb;
22
-#if !defined(_CALL_SYSV) && \
53
uint32_t hash;
23
- !defined(_CALL_DARWIN) && \
54
24
- !defined(_CALL_AIX) && \
55
+ /* we should never be trying to look up an INVALID tb */
25
- !defined(_CALL_ELF)
56
+ tcg_debug_assert(!(cflags & CF_INVALID));
26
-# if defined(__APPLE__)
57
+
27
+#if TCG_TARGET_REG_BITS == 64
58
hash = tb_jmp_cache_hash_func(pc);
28
+# ifdef _CALL_AIX
59
tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]);
29
+ /* ok */
60
30
+# elif defined(_CALL_ELF) && _CALL_ELF == 1
61
@@ -XXX,XX +XXX,XX @@ static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
31
+# define _CALL_AIX
62
tb->cs_base == cs_base &&
32
+# elif defined(_CALL_ELF) && _CALL_ELF == 2
63
tb->flags == flags &&
33
+ /* ok */
64
tb->trace_vcpu_dstate == *cpu->trace_dstate &&
34
+# else
65
- (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == cf_mask)) {
35
+# error "Unknown ABI"
66
+ tb_cflags(tb) == cflags)) {
36
+# endif
67
return tb;
37
+#else
68
}
38
+# if defined(_CALL_SYSV) || defined(_CALL_DARWIN)
69
- tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask);
39
+ /* ok */
70
+ tb = tb_htable_lookup(cpu, pc, cs_base, flags, cflags);
40
+# elif defined(__APPLE__)
71
if (tb == NULL) {
41
# define _CALL_DARWIN
72
return NULL;
42
-# elif defined(__ELF__) && TCG_TARGET_REG_BITS == 32
73
}
43
+# elif defined(__ELF__)
74
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
44
# define _CALL_SYSV
75
index XXXXXXX..XXXXXXX 100644
45
# else
76
--- a/accel/tcg/cpu-exec.c
46
# error "Unknown ABI"
77
+++ b/accel/tcg/cpu-exec.c
78
@@ -XXX,XX +XXX,XX @@ struct tb_desc {
79
CPUArchState *env;
80
tb_page_addr_t phys_page1;
81
uint32_t flags;
82
- uint32_t cf_mask;
83
+ uint32_t cflags;
84
uint32_t trace_vcpu_dstate;
85
};
86
87
@@ -XXX,XX +XXX,XX @@ static bool tb_lookup_cmp(const void *p, const void *d)
88
tb->cs_base == desc->cs_base &&
89
tb->flags == desc->flags &&
90
tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
91
- (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
92
+ tb_cflags(tb) == desc->cflags) {
93
/* check next page if needed */
94
if (tb->page_addr[1] == -1) {
95
return true;
96
@@ -XXX,XX +XXX,XX @@ static bool tb_lookup_cmp(const void *p, const void *d)
97
98
TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
99
target_ulong cs_base, uint32_t flags,
100
- uint32_t cf_mask)
101
+ uint32_t cflags)
102
{
103
tb_page_addr_t phys_pc;
104
struct tb_desc desc;
105
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
106
desc.env = (CPUArchState *)cpu->env_ptr;
107
desc.cs_base = cs_base;
108
desc.flags = flags;
109
- desc.cf_mask = cf_mask;
110
+ desc.cflags = cflags;
111
desc.trace_vcpu_dstate = *cpu->trace_dstate;
112
desc.pc = pc;
113
phys_pc = get_page_addr_code(desc.env, pc);
114
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
115
return NULL;
116
}
117
desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
118
- h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
119
+ h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate);
120
return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
121
}
122
123
@@ -XXX,XX +XXX,XX @@ static inline void tb_add_jump(TranslationBlock *tb, int n,
124
125
static inline TranslationBlock *tb_find(CPUState *cpu,
126
TranslationBlock *last_tb,
127
- int tb_exit, uint32_t cf_mask)
128
+ int tb_exit, uint32_t cflags)
129
{
130
CPUArchState *env = (CPUArchState *)cpu->env_ptr;
131
TranslationBlock *tb;
132
@@ -XXX,XX +XXX,XX @@ static inline TranslationBlock *tb_find(CPUState *cpu,
133
134
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
135
136
- tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
137
+ tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
138
if (tb == NULL) {
139
mmap_lock();
140
- tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
141
+ tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
142
mmap_unlock();
143
/* We add the TB in the virtual pc hash table for the fast lookup */
144
qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
145
diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c
146
index XXXXXXX..XXXXXXX 100644
147
--- a/accel/tcg/tcg-runtime.c
148
+++ b/accel/tcg/tcg-runtime.c
149
@@ -XXX,XX +XXX,XX @@
150
#include "exec/helper-proto.h"
151
#include "exec/cpu_ldst.h"
152
#include "exec/exec-all.h"
153
-#include "exec/tb-lookup.h"
154
#include "disas/disas.h"
155
#include "exec/log.h"
156
#include "tcg/tcg.h"
157
+#include "exec/tb-lookup.h"
158
159
/* 32-bit helpers */
160
161
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
162
index XXXXXXX..XXXXXXX 100644
163
--- a/accel/tcg/translate-all.c
164
+++ b/accel/tcg/translate-all.c
165
@@ -XXX,XX +XXX,XX @@ static bool tb_cmp(const void *ap, const void *bp)
166
return a->pc == b->pc &&
167
a->cs_base == b->cs_base &&
168
a->flags == b->flags &&
169
- (tb_cflags(a) & CF_HASH_MASK) == (tb_cflags(b) & CF_HASH_MASK) &&
170
+ (tb_cflags(a) & ~CF_INVALID) == (tb_cflags(b) & ~CF_INVALID) &&
171
a->trace_vcpu_dstate == b->trace_vcpu_dstate &&
172
a->page_addr[0] == b->page_addr[0] &&
173
a->page_addr[1] == b->page_addr[1];
174
@@ -XXX,XX +XXX,XX @@ static void do_tb_phys_invalidate(TranslationBlock *tb, bool rm_from_page_list)
175
PageDesc *p;
176
uint32_t h;
177
tb_page_addr_t phys_pc;
178
+ uint32_t orig_cflags = tb_cflags(tb);
179
180
assert_memory_lock();
181
182
@@ -XXX,XX +XXX,XX @@ static void do_tb_phys_invalidate(TranslationBlock *tb, bool rm_from_page_list)
183
184
/* remove the TB from the hash list */
185
phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);
186
- h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb_cflags(tb) & CF_HASH_MASK,
187
+ h = tb_hash_func(phys_pc, tb->pc, tb->flags, orig_cflags,
188
tb->trace_vcpu_dstate);
189
if (!qht_remove(&tb_ctx.htable, tb, h)) {
190
return;
191
@@ -XXX,XX +XXX,XX @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
192
uint32_t h;
193
194
assert_memory_lock();
195
+ tcg_debug_assert(!(tb->cflags & CF_INVALID));
196
197
/*
198
* Add the TB to the page list, acquiring first the pages's locks.
199
@@ -XXX,XX +XXX,XX @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
200
}
201
202
/* add in the hash table */
203
- h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb->cflags & CF_HASH_MASK,
204
+ h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb->cflags,
205
tb->trace_vcpu_dstate);
206
qht_insert(&tb_ctx.htable, tb, h, &existing_tb);
207
208
--
47
--
209
2.25.1
48
2.34.1
210
211
diff view generated by jsdifflib
[PULL 22/27] tcg/tci: Merge mov, not and neg operations
[PULL 04/16] target/i386: Simplify i386_tr_init_disas_context()
1
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
3
Since cpu_mmu_index() is well-defined for user-only,
4
we can remove the surrounding #ifdef'ry entirely.
5
6
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230613133347.82210-2-philmd@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
11
---
4
tcg/tci.c | 29 +++++------------------------
12
target/i386/tcg/translate.c | 3 ---
5
1 file changed, 5 insertions(+), 24 deletions(-)
13
1 file changed, 3 deletions(-)
6
14
7
diff --git a/tcg/tci.c b/tcg/tci.c
15
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
8
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
9
--- a/tcg/tci.c
17
--- a/target/i386/tcg/translate.c
10
+++ b/tcg/tci.c
18
+++ b/target/i386/tcg/translate.c
11
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
19
@@ -XXX,XX +XXX,XX @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
12
tci_write_reg(regs, t0, tci_compare64(t1, t2, condition));
20
dc->cc_op_dirty = false;
13
break;
21
dc->popl_esp_hack = 0;
14
#endif
22
/* select memory access functions */
15
- case INDEX_op_mov_i32:
23
- dc->mem_index = 0;
16
+ CASE_32_64(mov)
24
-#ifdef CONFIG_SOFTMMU
17
t0 = *tb_ptr++;
25
dc->mem_index = cpu_mmu_index(env, false);
18
t1 = tci_read_r(regs, &tb_ptr);
19
tci_write_reg(regs, t0, t1);
20
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
21
tci_write_reg(regs, t0, bswap32(t1));
22
break;
23
#endif
24
-#if TCG_TARGET_HAS_not_i32
25
- case INDEX_op_not_i32:
26
+#if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64
27
+ CASE_32_64(not)
28
t0 = *tb_ptr++;
29
t1 = tci_read_r(regs, &tb_ptr);
30
tci_write_reg(regs, t0, ~t1);
31
break;
32
#endif
33
-#if TCG_TARGET_HAS_neg_i32
34
- case INDEX_op_neg_i32:
35
+#if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64
36
+ CASE_32_64(neg)
37
t0 = *tb_ptr++;
38
t1 = tci_read_r(regs, &tb_ptr);
39
tci_write_reg(regs, t0, -t1);
40
break;
41
#endif
42
#if TCG_TARGET_REG_BITS == 64
43
- case INDEX_op_mov_i64:
44
- t0 = *tb_ptr++;
45
- t1 = tci_read_r(regs, &tb_ptr);
46
- tci_write_reg(regs, t0, t1);
47
- break;
48
case INDEX_op_tci_movi_i64:
49
t0 = *tb_ptr++;
50
t1 = tci_read_i64(&tb_ptr);
51
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
52
tci_write_reg(regs, t0, bswap64(t1));
53
break;
54
#endif
55
-#if TCG_TARGET_HAS_not_i64
56
- case INDEX_op_not_i64:
57
- t0 = *tb_ptr++;
58
- t1 = tci_read_r(regs, &tb_ptr);
59
- tci_write_reg(regs, t0, ~t1);
60
- break;
61
-#endif
26
-#endif
62
-#if TCG_TARGET_HAS_neg_i64
27
dc->cpuid_features = env->features[FEAT_1_EDX];
63
- case INDEX_op_neg_i64:
28
dc->cpuid_ext_features = env->features[FEAT_1_ECX];
64
- t0 = *tb_ptr++;
29
dc->cpuid_ext2_features = env->features[FEAT_8000_0001_EDX];
65
- t1 = tci_read_r(regs, &tb_ptr);
66
- tci_write_reg(regs, t0, -t1);
67
- break;
68
-#endif
69
#endif /* TCG_TARGET_REG_BITS == 64 */
70
71
/* QEMU specific operations. */
72
--
30
--
73
2.25.1
31
2.34.1
74
32
75
33
diff view generated by jsdifflib
[PULL 21/27] tcg/tci: Merge bswap operations
[PULL 05/16] target/tricore: Remove pointless CONFIG_SOFTMMU guard
1
This includes bswap16 and bswap32.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
We don't build any user emulation target for Tricore,
4
only the system emulation. No need to check for it as
5
it is always defined.
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
10
Message-Id: <20230613133347.82210-3-philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
12
---
6
tcg/tci.c | 22 ++++------------------
13
target/tricore/helper.c | 2 --
7
1 file changed, 4 insertions(+), 18 deletions(-)
14
1 file changed, 2 deletions(-)
8
15
9
diff --git a/tcg/tci.c b/tcg/tci.c
16
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
10
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/tci.c
18
--- a/target/tricore/helper.c
12
+++ b/tcg/tci.c
19
+++ b/target/tricore/helper.c
13
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
20
@@ -XXX,XX +XXX,XX @@ enum {
14
tci_write_reg(regs, t0, (uint16_t)t1);
21
TLBRET_MATCH = 0
15
break;
22
};
16
#endif
23
17
-#if TCG_TARGET_HAS_bswap16_i32
24
-#if defined(CONFIG_SOFTMMU)
18
- case INDEX_op_bswap16_i32:
25
static int get_physical_address(CPUTriCoreState *env, hwaddr *physical,
19
+#if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64
26
int *prot, target_ulong address,
20
+ CASE_32_64(bswap16)
27
MMUAccessType access_type, int mmu_idx)
21
t0 = *tb_ptr++;
28
@@ -XXX,XX +XXX,XX @@ hwaddr tricore_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
22
t1 = tci_read_r(regs, &tb_ptr);
29
}
23
tci_write_reg(regs, t0, bswap16(t1));
30
return phys_addr;
24
break;
31
}
25
#endif
26
-#if TCG_TARGET_HAS_bswap32_i32
27
- case INDEX_op_bswap32_i32:
28
+#if TCG_TARGET_HAS_bswap32_i32 || TCG_TARGET_HAS_bswap32_i64
29
+ CASE_32_64(bswap32)
30
t0 = *tb_ptr++;
31
t1 = tci_read_r(regs, &tb_ptr);
32
tci_write_reg(regs, t0, bswap32(t1));
33
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
34
t1 = tci_read_r(regs, &tb_ptr);
35
tci_write_reg(regs, t0, (uint32_t)t1);
36
break;
37
-#if TCG_TARGET_HAS_bswap16_i64
38
- case INDEX_op_bswap16_i64:
39
- t0 = *tb_ptr++;
40
- t1 = tci_read_r(regs, &tb_ptr);
41
- tci_write_reg(regs, t0, bswap16(t1));
42
- break;
43
-#endif
32
-#endif
44
-#if TCG_TARGET_HAS_bswap32_i64
33
45
- case INDEX_op_bswap32_i64:
34
/* TODO: Add exeption support*/
46
- t0 = *tb_ptr++;
35
static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,
47
- t1 = tci_read_r(regs, &tb_ptr);
48
- tci_write_reg(regs, t0, bswap32(t1));
49
- break;
50
-#endif
51
#if TCG_TARGET_HAS_bswap64_i64
52
case INDEX_op_bswap64_i64:
53
t0 = *tb_ptr++;
54
--
36
--
55
2.25.1
37
2.34.1
56
38
57
39
diff view generated by jsdifflib
[PULL 05/27] tcg: Split out tcg_raise_tb_overflow
[PULL 06/16] target/m68k: Check for USER_ONLY definition instead of SOFTMMU one
1
Allow other places in tcg to restart with a smaller tb.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
Since we *might* have user emulation with softmmu,
4
replace the system emulation check by !user emulation one.
5
6
Invert some if() ladders for clarity.
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20230613133347.82210-4-philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
12
---
6
tcg/tcg.c | 9 +++++++--
13
target/m68k/helper.h | 2 +-
7
1 file changed, 7 insertions(+), 2 deletions(-)
14
target/m68k/cpu.c | 14 ++++++--------
8
15
target/m68k/helper.c | 4 ++--
9
diff --git a/tcg/tcg.c b/tcg/tcg.c
16
target/m68k/translate.c | 28 ++++++++++++++--------------
10
index XXXXXXX..XXXXXXX 100644
17
4 files changed, 23 insertions(+), 25 deletions(-)
11
--- a/tcg/tcg.c
18
12
+++ b/tcg/tcg.c
19
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
13
@@ -XXX,XX +XXX,XX @@ static void set_jmp_reset_offset(TCGContext *s, int which)
20
index XXXXXXX..XXXXXXX 100644
14
s->tb_jmp_reset_offset[which] = tcg_current_code_size(s);
21
--- a/target/m68k/helper.h
15
}
22
+++ b/target/m68k/helper.h
16
23
@@ -XXX,XX +XXX,XX @@ DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
17
+/* Signal overflow, starting over with fewer guest insns. */
24
DEF_HELPER_3(chk, void, env, s32, s32)
18
+static void QEMU_NORETURN tcg_raise_tb_overflow(TCGContext *s)
25
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
19
+{
26
20
+ siglongjmp(s->jmp_trans, -2);
27
-#if defined(CONFIG_SOFTMMU)
21
+}
28
+#if !defined(CONFIG_USER_ONLY)
22
+
29
DEF_HELPER_3(ptest, void, env, i32, i32)
23
#define C_PFX1(P, A) P##A
30
DEF_HELPER_3(pflush, void, env, i32, i32)
24
#define C_PFX2(P, A, B) P##A##_##B
31
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
25
#define C_PFX3(P, A, B, C) P##A##_##B##_##C
32
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
26
@@ -XXX,XX +XXX,XX @@ static TCGTemp *tcg_temp_alloc(TCGContext *s)
33
index XXXXXXX..XXXXXXX 100644
27
int n = s->nb_temps++;
34
--- a/target/m68k/cpu.c
28
35
+++ b/target/m68k/cpu.c
29
if (n >= TCG_MAX_TEMPS) {
36
@@ -XXX,XX +XXX,XX @@ static void m68k_cpu_reset_hold(Object *obj)
30
- /* Signal overflow, starting over with fewer guest insns. */
31
- siglongjmp(s->jmp_trans, -2);
32
+ tcg_raise_tb_overflow(s);
33
}
37
}
34
return memset(&s->temps[n], 0, sizeof(TCGTemp));
38
39
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
40
-#ifdef CONFIG_SOFTMMU
41
- cpu_m68k_set_sr(env, SR_S | SR_I);
42
-#else
43
+#ifdef CONFIG_USER_ONLY
44
cpu_m68k_set_sr(env, 0);
45
+#else
46
+ cpu_m68k_set_sr(env, SR_S | SR_I);
47
#endif
48
for (i = 0; i < 8; i++) {
49
env->fregs[i].d = nan;
50
@@ -XXX,XX +XXX,XX @@ static void m68k_cpu_initfn(Object *obj)
51
cpu_set_cpustate_pointers(cpu);
52
}
53
54
-#if defined(CONFIG_SOFTMMU)
55
+#if !defined(CONFIG_USER_ONLY)
56
static bool fpu_needed(void *opaque)
57
{
58
M68kCPU *s = opaque;
59
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m68k_cpu = {
60
NULL
61
},
62
};
63
-#endif
64
65
-#ifndef CONFIG_USER_ONLY
66
#include "hw/core/sysemu-cpu-ops.h"
67
68
static const struct SysemuCPUOps m68k_sysemu_ops = {
69
.get_phys_page_debug = m68k_cpu_get_phys_page_debug,
70
};
71
-#endif
72
+#endif /* !CONFIG_USER_ONLY */
73
74
#include "hw/core/tcg-cpu-ops.h"
75
76
@@ -XXX,XX +XXX,XX @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
77
cc->get_pc = m68k_cpu_get_pc;
78
cc->gdb_read_register = m68k_cpu_gdb_read_register;
79
cc->gdb_write_register = m68k_cpu_gdb_write_register;
80
-#if defined(CONFIG_SOFTMMU)
81
+#if !defined(CONFIG_USER_ONLY)
82
dc->vmsd = &vmstate_m68k_cpu;
83
cc->sysemu_ops = &m68k_sysemu_ops;
84
#endif
85
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
86
index XXXXXXX..XXXXXXX 100644
87
--- a/target/m68k/helper.c
88
+++ b/target/m68k/helper.c
89
@@ -XXX,XX +XXX,XX @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
90
env->macc[acc + 1] = res;
91
}
92
93
-#if defined(CONFIG_SOFTMMU)
94
+#if !defined(CONFIG_USER_ONLY)
95
void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
96
{
97
hwaddr physical;
98
@@ -XXX,XX +XXX,XX @@ void HELPER(reset)(CPUM68KState *env)
99
{
100
/* FIXME: reset all except CPU */
101
}
102
-#endif
103
+#endif /* !CONFIG_USER_ONLY */
104
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
105
index XXXXXXX..XXXXXXX 100644
106
--- a/target/m68k/translate.c
107
+++ b/target/m68k/translate.c
108
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(swap)
109
110
DISAS_INSN(bkpt)
111
{
112
-#if defined(CONFIG_SOFTMMU)
113
- gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
114
-#else
115
+#if defined(CONFIG_USER_ONLY)
116
gen_exception(s, s->base.pc_next, EXCP_DEBUG);
117
+#else
118
+ gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
119
#endif
120
}
121
122
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(unlk)
123
tcg_gen_addi_i32(QREG_SP, src, 4);
124
}
125
126
-#if defined(CONFIG_SOFTMMU)
127
+#if !defined(CONFIG_USER_ONLY)
128
DISAS_INSN(reset)
129
{
130
if (IS_USER(s)) {
131
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(move_from_sr)
132
DEST_EA(env, insn, OS_WORD, sr, NULL);
133
}
134
135
-#if defined(CONFIG_SOFTMMU)
136
+#if !defined(CONFIG_USER_ONLY)
137
DISAS_INSN(moves)
138
{
139
int opsize;
140
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(cinv)
141
/* Invalidate cache line. Implement as no-op. */
142
}
143
144
-#if defined(CONFIG_SOFTMMU)
145
+#if !defined(CONFIG_USER_ONLY)
146
DISAS_INSN(pflush)
147
{
148
TCGv opmode;
149
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(ftrapcc)
150
do_trapcc(s, &c);
151
}
152
153
-#if defined(CONFIG_SOFTMMU)
154
+#if !defined(CONFIG_USER_ONLY)
155
DISAS_INSN(frestore)
156
{
157
TCGv addr;
158
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
159
BASE(bitop_im, 08c0, ffc0);
160
INSN(arith_im, 0a80, fff8, CF_ISA_A);
161
INSN(arith_im, 0a00, ff00, M68K);
162
-#if defined(CONFIG_SOFTMMU)
163
+#if !defined(CONFIG_USER_ONLY)
164
INSN(moves, 0e00, ff00, M68K);
165
#endif
166
INSN(cas, 0ac0, ffc0, CAS);
167
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
168
BASE(move_to_ccr, 44c0, ffc0);
169
INSN(not, 4680, fff8, CF_ISA_A);
170
INSN(not, 4600, ff00, M68K);
171
-#if defined(CONFIG_SOFTMMU)
172
+#if !defined(CONFIG_USER_ONLY)
173
BASE(move_to_sr, 46c0, ffc0);
174
#endif
175
INSN(nbcd, 4800, ffc0, M68K);
176
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
177
BASE(tst, 4a00, ff00);
178
INSN(tas, 4ac0, ffc0, CF_ISA_B);
179
INSN(tas, 4ac0, ffc0, M68K);
180
-#if defined(CONFIG_SOFTMMU)
181
+#if !defined(CONFIG_USER_ONLY)
182
INSN(halt, 4ac8, ffff, CF_ISA_A);
183
INSN(halt, 4ac8, ffff, M68K);
184
#endif
185
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
186
BASE(trap, 4e40, fff0);
187
BASE(link, 4e50, fff8);
188
BASE(unlk, 4e58, fff8);
189
-#if defined(CONFIG_SOFTMMU)
190
+#if !defined(CONFIG_USER_ONLY)
191
INSN(move_to_usp, 4e60, fff8, USP);
192
INSN(move_from_usp, 4e68, fff8, USP);
193
INSN(reset, 4e70, ffff, M68K);
194
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
195
INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */
196
INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */
197
INSN(fbcc, f280, ff80, FPU);
198
-#if defined(CONFIG_SOFTMMU)
199
+#if !defined(CONFIG_USER_ONLY)
200
INSN(frestore, f340, ffc0, CF_FPU);
201
INSN(fsave, f300, ffc0, CF_FPU);
202
INSN(frestore, f340, ffc0, FPU);
203
@@ -XXX,XX +XXX,XX @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
204
break;
205
}
206
qemu_fprintf(f, "\n");
207
-#ifdef CONFIG_SOFTMMU
208
+#ifndef CONFIG_USER_ONLY
209
qemu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n",
210
env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP],
211
env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP],
212
@@ -XXX,XX +XXX,XX @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
213
env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]);
214
qemu_fprintf(f, "MMUSR %08x, fault at %08x\n",
215
env->mmu.mmusr, env->mmu.ar);
216
-#endif
217
+#endif /* !CONFIG_USER_ONLY */
35
}
218
}
36
--
219
--
37
2.25.1
220
2.34.1
38
221
39
222
diff view generated by jsdifflib
[PULL 04/27] tcg/tci: Use exec/cpu_ldst.h interfaces
[PULL 07/16] target/ppc: Check for USER_ONLY definition instead of SOFTMMU one
1
Use the provided cpu_ldst.h interfaces. This fixes the build vs
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
the unconverted uses of g2h(), adds missed memory trace events,
3
and correctly recognizes when a SIGSEGV belongs to the guest via
4
set_helper_retaddr().
5
2
6
Fixes: 3e8f1628e864
3
Since we *might* have user emulation with softmmu,
7
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
4
replace the system emulation check by !user emulation one.
5
6
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
9
Message-Id: <20230613133347.82210-5-philmd@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
11
---
10
tcg/tci.c | 73 +++++++++++++++++++++----------------------------------
12
target/ppc/cpu_init.c | 20 ++++++++++----------
11
1 file changed, 28 insertions(+), 45 deletions(-)
13
target/ppc/helper_regs.c | 6 ++----
14
2 files changed, 12 insertions(+), 14 deletions(-)
12
15
13
diff --git a/tcg/tci.c b/tcg/tci.c
16
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
14
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
15
--- a/tcg/tci.c
18
--- a/target/ppc/cpu_init.c
16
+++ b/tcg/tci.c
19
+++ b/target/ppc/cpu_init.c
17
@@ -XXX,XX +XXX,XX @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition)
20
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data)
18
return result;
21
(1ull << MSR_PMM) |
22
(1ull << MSR_RI);
23
pcc->mmu_model = POWERPC_MMU_64B;
24
-#if defined(CONFIG_SOFTMMU)
25
+#if !defined(CONFIG_USER_ONLY)
26
pcc->hash64_opts = &ppc_hash64_opts_basic;
27
#endif
28
pcc->excp_model = POWERPC_EXCP_970;
29
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
30
pcc->lpcr_mask = LPCR_RMLS | LPCR_ILE | LPCR_LPES0 | LPCR_LPES1 |
31
LPCR_RMI | LPCR_HDICE;
32
pcc->mmu_model = POWERPC_MMU_2_03;
33
-#if defined(CONFIG_SOFTMMU)
34
+#if !defined(CONFIG_USER_ONLY)
35
pcc->hash64_opts = &ppc_hash64_opts_basic;
36
pcc->lrg_decr_bits = 32;
37
#endif
38
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
39
LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE;
40
pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2;
41
pcc->mmu_model = POWERPC_MMU_2_06;
42
-#if defined(CONFIG_SOFTMMU)
43
+#if !defined(CONFIG_USER_ONLY)
44
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
45
pcc->lrg_decr_bits = 32;
46
#endif
47
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
48
pcc->lpcr_pm = LPCR_P8_PECE0 | LPCR_P8_PECE1 | LPCR_P8_PECE2 |
49
LPCR_P8_PECE3 | LPCR_P8_PECE4;
50
pcc->mmu_model = POWERPC_MMU_2_07;
51
-#if defined(CONFIG_SOFTMMU)
52
+#if !defined(CONFIG_USER_ONLY)
53
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
54
pcc->lrg_decr_bits = 32;
55
pcc->n_host_threads = 8;
56
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
57
pcc->l1_icache_size = 0x8000;
19
}
58
}
20
59
21
-#ifdef CONFIG_SOFTMMU
60
-#ifdef CONFIG_SOFTMMU
22
-# define qemu_ld_ub \
61
+#ifndef CONFIG_USER_ONLY
23
- helper_ret_ldub_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
62
/*
24
-# define qemu_ld_leuw \
63
* Radix pg sizes and AP encodings for dt node ibm,processor-radix-AP-encodings
25
- helper_le_lduw_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
64
* Encoded as array of int_32s in the form:
26
-# define qemu_ld_leul \
65
@@ -XXX,XX +XXX,XX @@ static struct ppc_radix_page_info POWER9_radix_page_info = {
27
- helper_le_ldul_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
66
0x4000001e /* 1G - enc: 0x2 */
28
-# define qemu_ld_leq \
67
}
29
- helper_le_ldq_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
68
};
30
-# define qemu_ld_beuw \
69
-#endif /* CONFIG_SOFTMMU */
31
- helper_be_lduw_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
70
+#endif /* CONFIG_USER_ONLY */
32
-# define qemu_ld_beul \
71
33
- helper_be_ldul_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
72
static void init_proc_POWER9(CPUPPCState *env)
34
-# define qemu_ld_beq \
73
{
35
- helper_be_ldq_mmu(env, taddr, oi, (uintptr_t)tb_ptr)
74
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
36
-# define qemu_st_b(X) \
75
LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE;
37
- helper_ret_stb_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
76
pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE;
38
-# define qemu_st_lew(X) \
77
pcc->mmu_model = POWERPC_MMU_3_00;
39
- helper_le_stw_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
78
-#if defined(CONFIG_SOFTMMU)
40
-# define qemu_st_lel(X) \
79
+#if !defined(CONFIG_USER_ONLY)
41
- helper_le_stl_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
80
/* segment page size remain the same */
42
-# define qemu_st_leq(X) \
81
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
43
- helper_le_stq_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
82
pcc->radix_page_info = &POWER9_radix_page_info;
44
-# define qemu_st_bew(X) \
83
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
45
- helper_be_stw_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
84
pcc->l1_icache_size = 0x8000;
46
-# define qemu_st_bel(X) \
85
}
47
- helper_be_stl_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
86
48
-# define qemu_st_beq(X) \
87
-#ifdef CONFIG_SOFTMMU
49
- helper_be_stq_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr)
88
+#ifndef CONFIG_USER_ONLY
50
-#else
89
/*
51
-# define qemu_ld_ub ldub_p(g2h(taddr))
90
* Radix pg sizes and AP encodings for dt node ibm,processor-radix-AP-encodings
52
-# define qemu_ld_leuw lduw_le_p(g2h(taddr))
91
* Encoded as array of int_32s in the form:
53
-# define qemu_ld_leul (uint32_t)ldl_le_p(g2h(taddr))
92
@@ -XXX,XX +XXX,XX @@ static struct ppc_radix_page_info POWER10_radix_page_info = {
54
-# define qemu_ld_leq ldq_le_p(g2h(taddr))
93
0x4000001e /* 1G - enc: 0x2 */
55
-# define qemu_ld_beuw lduw_be_p(g2h(taddr))
94
}
56
-# define qemu_ld_beul (uint32_t)ldl_be_p(g2h(taddr))
95
};
57
-# define qemu_ld_beq ldq_be_p(g2h(taddr))
96
-#endif /* CONFIG_SOFTMMU */
58
-# define qemu_st_b(X) stb_p(g2h(taddr), X)
97
+#endif /* !CONFIG_USER_ONLY */
59
-# define qemu_st_lew(X) stw_le_p(g2h(taddr), X)
98
60
-# define qemu_st_lel(X) stl_le_p(g2h(taddr), X)
99
static void init_proc_POWER10(CPUPPCState *env)
61
-# define qemu_st_leq(X) stq_le_p(g2h(taddr), X)
100
{
62
-# define qemu_st_bew(X) stw_be_p(g2h(taddr), X)
101
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
63
-# define qemu_st_bel(X) stl_be_p(g2h(taddr), X)
102
64
-# define qemu_st_beq(X) stq_be_p(g2h(taddr), X)
103
pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE;
104
pcc->mmu_model = POWERPC_MMU_3_00;
105
-#if defined(CONFIG_SOFTMMU)
106
+#if !defined(CONFIG_USER_ONLY)
107
/* segment page size remain the same */
108
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
109
pcc->radix_page_info = &POWER10_radix_page_info;
110
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
111
index XXXXXXX..XXXXXXX 100644
112
--- a/target/ppc/helper_regs.c
113
+++ b/target/ppc/helper_regs.c
114
@@ -XXX,XX +XXX,XX @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
115
return excp;
116
}
117
118
-#ifdef CONFIG_SOFTMMU
119
+#ifndef CONFIG_USER_ONLY
120
void store_40x_sler(CPUPPCState *env, uint32_t val)
121
{
122
/* XXX: TO BE FIXED */
123
@@ -XXX,XX +XXX,XX @@ void store_40x_sler(CPUPPCState *env, uint32_t val)
124
}
125
env->spr[SPR_405_SLER] = val;
126
}
127
-#endif /* CONFIG_SOFTMMU */
128
129
-#ifndef CONFIG_USER_ONLY
130
void check_tlb_flush(CPUPPCState *env, bool global)
131
{
132
CPUState *cs = env_cpu(env);
133
@@ -XXX,XX +XXX,XX @@ void check_tlb_flush(CPUPPCState *env, bool global)
134
tlb_flush(cs);
135
}
136
}
65
-#endif
137
-#endif
66
+#define qemu_ld_ub \
138
+#endif /* !CONFIG_USER_ONLY */
67
+ cpu_ldub_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
139
68
+#define qemu_ld_leuw \
140
/**
69
+ cpu_lduw_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
141
* _spr_register
70
+#define qemu_ld_leul \
71
+ cpu_ldl_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
72
+#define qemu_ld_leq \
73
+ cpu_ldq_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
74
+#define qemu_ld_beuw \
75
+ cpu_lduw_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
76
+#define qemu_ld_beul \
77
+ cpu_ldl_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
78
+#define qemu_ld_beq \
79
+ cpu_ldq_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr)
80
+#define qemu_st_b(X) \
81
+ cpu_stb_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
82
+#define qemu_st_lew(X) \
83
+ cpu_stw_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
84
+#define qemu_st_lel(X) \
85
+ cpu_stl_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
86
+#define qemu_st_leq(X) \
87
+ cpu_stq_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
88
+#define qemu_st_bew(X) \
89
+ cpu_stw_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
90
+#define qemu_st_bel(X) \
91
+ cpu_stl_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
92
+#define qemu_st_beq(X) \
93
+ cpu_stq_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr)
94
95
#if TCG_TARGET_REG_BITS == 64
96
# define CASE_32_64(x) \
97
--
142
--
98
2.25.1
143
2.34.1
99
144
100
145
diff view generated by jsdifflib
[PULL 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand
Deleted patch
1
The use in tcg_tb_lookup is given a random pc that comes from the pc
2
of a signal handler. Do not assert that the pointer is already within
3
the code gen buffer at all, much less the writable mirror of it.
4
1
5
Fixes: db0c51a3803
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
tcg/tcg.c | 20 ++++++++++++++++++--
9
1 file changed, 18 insertions(+), 2 deletions(-)
10
11
diff --git a/tcg/tcg.c b/tcg/tcg.c
12
index XXXXXXX..XXXXXXX 100644
13
--- a/tcg/tcg.c
14
+++ b/tcg/tcg.c
15
@@ -XXX,XX +XXX,XX @@ static void tcg_region_trees_init(void)
16
}
17
}
18
19
-static struct tcg_region_tree *tc_ptr_to_region_tree(const void *cp)
20
+static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p)
21
{
22
- void *p = tcg_splitwx_to_rw(cp);
23
size_t region_idx;
24
25
+ /*
26
+ * Like tcg_splitwx_to_rw, with no assert. The pc may come from
27
+ * a signal handler over which the caller has no control.
28
+ */
29
+ if (!in_code_gen_buffer(p)) {
30
+ p -= tcg_splitwx_diff;
31
+ if (!in_code_gen_buffer(p)) {
32
+ return NULL;
33
+ }
34
+ }
35
+
36
if (p < region.start_aligned) {
37
region_idx = 0;
38
} else {
39
@@ -XXX,XX +XXX,XX @@ void tcg_tb_insert(TranslationBlock *tb)
40
{
41
struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr);
42
43
+ g_assert(rt != NULL);
44
qemu_mutex_lock(&rt->lock);
45
g_tree_insert(rt->tree, &tb->tc, tb);
46
qemu_mutex_unlock(&rt->lock);
47
@@ -XXX,XX +XXX,XX @@ void tcg_tb_remove(TranslationBlock *tb)
48
{
49
struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr);
50
51
+ g_assert(rt != NULL);
52
qemu_mutex_lock(&rt->lock);
53
g_tree_remove(rt->tree, &tb->tc);
54
qemu_mutex_unlock(&rt->lock);
55
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr)
56
TranslationBlock *tb;
57
struct tb_tc s = { .ptr = (void *)tc_ptr };
58
59
+ if (rt == NULL) {
60
+ return NULL;
61
+ }
62
+
63
qemu_mutex_lock(&rt->lock);
64
tb = g_tree_lookup(rt->tree, &s);
65
qemu_mutex_unlock(&rt->lock);
66
--
67
2.25.1
68
69
diff view generated by jsdifflib
[PULL 07/27] tcg/tci: Merge identical cases in generation (arithmetic opcodes)
Deleted patch
1
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
2
cases that are identical between 32-bit and 64-bit hosts.
3
1
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
7
[PMD: Split patch as 1/5]
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Message-Id: <20210218232840.1760806-2-f4bug@amsat.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
tcg/tci/tcg-target.c.inc | 85 +++++++++++++++++-----------------------
13
1 file changed, 37 insertions(+), 48 deletions(-)
14
15
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
16
index XXXXXXX..XXXXXXX 100644
17
--- a/tcg/tci/tcg-target.c.inc
18
+++ b/tcg/tci/tcg-target.c.inc
19
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg)
20
old_code_ptr[1] = s->code_ptr - old_code_ptr;
21
}
22
23
+#if TCG_TARGET_REG_BITS == 64
24
+# define CASE_32_64(x) \
25
+ case glue(glue(INDEX_op_, x), _i64): \
26
+ case glue(glue(INDEX_op_, x), _i32):
27
+# define CASE_64(x) \
28
+ case glue(glue(INDEX_op_, x), _i64):
29
+#else
30
+# define CASE_32_64(x) \
31
+ case glue(glue(INDEX_op_, x), _i32):
32
+# define CASE_64(x)
33
+#endif
34
+
35
static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
36
const int *const_args)
37
{
38
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
39
case INDEX_op_exit_tb:
40
tcg_out64(s, args[0]);
41
break;
42
+
43
case INDEX_op_goto_tb:
44
if (s->tb_jmp_insn_offset) {
45
/* Direct jump method. */
46
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
47
tcg_debug_assert(args[2] == (int32_t)args[2]);
48
tcg_out32(s, args[2]);
49
break;
50
- case INDEX_op_add_i32:
51
- case INDEX_op_sub_i32:
52
- case INDEX_op_mul_i32:
53
- case INDEX_op_and_i32:
54
- case INDEX_op_andc_i32: /* Optional (TCG_TARGET_HAS_andc_i32). */
55
- case INDEX_op_eqv_i32: /* Optional (TCG_TARGET_HAS_eqv_i32). */
56
- case INDEX_op_nand_i32: /* Optional (TCG_TARGET_HAS_nand_i32). */
57
- case INDEX_op_nor_i32: /* Optional (TCG_TARGET_HAS_nor_i32). */
58
- case INDEX_op_or_i32:
59
- case INDEX_op_orc_i32: /* Optional (TCG_TARGET_HAS_orc_i32). */
60
- case INDEX_op_xor_i32:
61
- case INDEX_op_shl_i32:
62
- case INDEX_op_shr_i32:
63
- case INDEX_op_sar_i32:
64
- case INDEX_op_rotl_i32: /* Optional (TCG_TARGET_HAS_rot_i32). */
65
- case INDEX_op_rotr_i32: /* Optional (TCG_TARGET_HAS_rot_i32). */
66
+
67
+ CASE_32_64(add)
68
+ CASE_32_64(sub)
69
+ CASE_32_64(mul)
70
+ CASE_32_64(and)
71
+ CASE_32_64(or)
72
+ CASE_32_64(xor)
73
+ CASE_32_64(andc) /* Optional (TCG_TARGET_HAS_andc_*). */
74
+ CASE_32_64(orc) /* Optional (TCG_TARGET_HAS_orc_*). */
75
+ CASE_32_64(eqv) /* Optional (TCG_TARGET_HAS_eqv_*). */
76
+ CASE_32_64(nand) /* Optional (TCG_TARGET_HAS_nand_*). */
77
+ CASE_32_64(nor) /* Optional (TCG_TARGET_HAS_nor_*). */
78
+ CASE_32_64(shl)
79
+ CASE_32_64(shr)
80
+ CASE_32_64(sar)
81
+ CASE_32_64(rotl) /* Optional (TCG_TARGET_HAS_rot_*). */
82
+ CASE_32_64(rotr) /* Optional (TCG_TARGET_HAS_rot_*). */
83
+ CASE_32_64(div) /* Optional (TCG_TARGET_HAS_div_*). */
84
+ CASE_32_64(divu) /* Optional (TCG_TARGET_HAS_div_*). */
85
+ CASE_32_64(rem) /* Optional (TCG_TARGET_HAS_div_*). */
86
+ CASE_32_64(remu) /* Optional (TCG_TARGET_HAS_div_*). */
87
tcg_out_r(s, args[0]);
88
tcg_out_r(s, args[1]);
89
tcg_out_r(s, args[2]);
90
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
91
break;
92
93
#if TCG_TARGET_REG_BITS == 64
94
- case INDEX_op_add_i64:
95
- case INDEX_op_sub_i64:
96
- case INDEX_op_mul_i64:
97
- case INDEX_op_and_i64:
98
- case INDEX_op_andc_i64: /* Optional (TCG_TARGET_HAS_andc_i64). */
99
- case INDEX_op_eqv_i64: /* Optional (TCG_TARGET_HAS_eqv_i64). */
100
- case INDEX_op_nand_i64: /* Optional (TCG_TARGET_HAS_nand_i64). */
101
- case INDEX_op_nor_i64: /* Optional (TCG_TARGET_HAS_nor_i64). */
102
- case INDEX_op_or_i64:
103
- case INDEX_op_orc_i64: /* Optional (TCG_TARGET_HAS_orc_i64). */
104
- case INDEX_op_xor_i64:
105
- case INDEX_op_shl_i64:
106
- case INDEX_op_shr_i64:
107
- case INDEX_op_sar_i64:
108
- case INDEX_op_rotl_i64: /* Optional (TCG_TARGET_HAS_rot_i64). */
109
- case INDEX_op_rotr_i64: /* Optional (TCG_TARGET_HAS_rot_i64). */
110
- case INDEX_op_div_i64: /* Optional (TCG_TARGET_HAS_div_i64). */
111
- case INDEX_op_divu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */
112
- case INDEX_op_rem_i64: /* Optional (TCG_TARGET_HAS_div_i64). */
113
- case INDEX_op_remu_i64: /* Optional (TCG_TARGET_HAS_div_i64). */
114
- tcg_out_r(s, args[0]);
115
- tcg_out_r(s, args[1]);
116
- tcg_out_r(s, args[2]);
117
- break;
118
case INDEX_op_deposit_i64: /* Optional (TCG_TARGET_HAS_deposit_i64). */
119
tcg_out_r(s, args[0]);
120
tcg_out_r(s, args[1]);
121
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
122
tcg_out_r(s, args[0]);
123
tcg_out_r(s, args[1]);
124
break;
125
- case INDEX_op_div_i32: /* Optional (TCG_TARGET_HAS_div_i32). */
126
- case INDEX_op_divu_i32: /* Optional (TCG_TARGET_HAS_div_i32). */
127
- case INDEX_op_rem_i32: /* Optional (TCG_TARGET_HAS_div_i32). */
128
- case INDEX_op_remu_i32: /* Optional (TCG_TARGET_HAS_div_i32). */
129
- tcg_out_r(s, args[0]);
130
- tcg_out_r(s, args[1]);
131
- tcg_out_r(s, args[2]);
132
- break;
133
+
134
#if TCG_TARGET_REG_BITS == 32
135
case INDEX_op_add2_i32:
136
case INDEX_op_sub2_i32:
137
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
138
}
139
tcg_out_i(s, *args++);
140
break;
141
+
142
case INDEX_op_mb:
143
break;
144
+
145
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
146
case INDEX_op_mov_i64:
147
case INDEX_op_call: /* Always emitted via tcg_out_call. */
148
--
149
2.25.1
150
151
diff view generated by jsdifflib
[PULL 08/27] tcg/tci: Merge identical cases in generation (exchange opcodes)
Deleted patch
1
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
2
cases that are identical between 32-bit and 64-bit hosts.
3
1
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
7
[PMD: Split patch as 2/5]
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Message-Id: <20210218232840.1760806-3-f4bug@amsat.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
tcg/tci/tcg-target.c.inc | 35 ++++++++++++++---------------------
13
1 file changed, 14 insertions(+), 21 deletions(-)
14
15
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
16
index XXXXXXX..XXXXXXX 100644
17
--- a/tcg/tci/tcg-target.c.inc
18
+++ b/tcg/tci/tcg-target.c.inc
19
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
20
tcg_out8(s, args[2]); /* condition */
21
tci_out_label(s, arg_label(args[3]));
22
break;
23
- case INDEX_op_bswap16_i64: /* Optional (TCG_TARGET_HAS_bswap16_i64). */
24
- case INDEX_op_bswap32_i64: /* Optional (TCG_TARGET_HAS_bswap32_i64). */
25
- case INDEX_op_bswap64_i64: /* Optional (TCG_TARGET_HAS_bswap64_i64). */
26
- case INDEX_op_not_i64: /* Optional (TCG_TARGET_HAS_not_i64). */
27
- case INDEX_op_neg_i64: /* Optional (TCG_TARGET_HAS_neg_i64). */
28
- case INDEX_op_ext8s_i64: /* Optional (TCG_TARGET_HAS_ext8s_i64). */
29
- case INDEX_op_ext8u_i64: /* Optional (TCG_TARGET_HAS_ext8u_i64). */
30
- case INDEX_op_ext16s_i64: /* Optional (TCG_TARGET_HAS_ext16s_i64). */
31
- case INDEX_op_ext16u_i64: /* Optional (TCG_TARGET_HAS_ext16u_i64). */
32
- case INDEX_op_ext32s_i64: /* Optional (TCG_TARGET_HAS_ext32s_i64). */
33
- case INDEX_op_ext32u_i64: /* Optional (TCG_TARGET_HAS_ext32u_i64). */
34
- case INDEX_op_ext_i32_i64:
35
- case INDEX_op_extu_i32_i64:
36
#endif /* TCG_TARGET_REG_BITS == 64 */
37
- case INDEX_op_neg_i32: /* Optional (TCG_TARGET_HAS_neg_i32). */
38
- case INDEX_op_not_i32: /* Optional (TCG_TARGET_HAS_not_i32). */
39
- case INDEX_op_ext8s_i32: /* Optional (TCG_TARGET_HAS_ext8s_i32). */
40
- case INDEX_op_ext16s_i32: /* Optional (TCG_TARGET_HAS_ext16s_i32). */
41
- case INDEX_op_ext8u_i32: /* Optional (TCG_TARGET_HAS_ext8u_i32). */
42
- case INDEX_op_ext16u_i32: /* Optional (TCG_TARGET_HAS_ext16u_i32). */
43
- case INDEX_op_bswap16_i32: /* Optional (TCG_TARGET_HAS_bswap16_i32). */
44
- case INDEX_op_bswap32_i32: /* Optional (TCG_TARGET_HAS_bswap32_i32). */
45
+
46
+ CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */
47
+ CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */
48
+ CASE_32_64(ext8s) /* Optional (TCG_TARGET_HAS_ext8s_*). */
49
+ CASE_32_64(ext8u) /* Optional (TCG_TARGET_HAS_ext8u_*). */
50
+ CASE_32_64(ext16s) /* Optional (TCG_TARGET_HAS_ext16s_*). */
51
+ CASE_32_64(ext16u) /* Optional (TCG_TARGET_HAS_ext16u_*). */
52
+ CASE_64(ext32s) /* Optional (TCG_TARGET_HAS_ext32s_i64). */
53
+ CASE_64(ext32u) /* Optional (TCG_TARGET_HAS_ext32u_i64). */
54
+ CASE_64(ext_i32)
55
+ CASE_64(extu_i32)
56
+ CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */
57
+ CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */
58
+ CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */
59
tcg_out_r(s, args[0]);
60
tcg_out_r(s, args[1]);
61
break;
62
--
63
2.25.1
64
65
diff view generated by jsdifflib
[PULL 09/27] tcg/tci: Merge identical cases in generation (deposit opcode)
Deleted patch
1
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
2
cases that are identical between 32-bit and 64-bit hosts.
3
1
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
7
[PMD: Split patch as 3/5]
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Message-Id: <20210218232840.1760806-4-f4bug@amsat.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
tcg/tci/tcg-target.c.inc | 12 ++----------
13
1 file changed, 2 insertions(+), 10 deletions(-)
14
15
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
16
index XXXXXXX..XXXXXXX 100644
17
--- a/tcg/tci/tcg-target.c.inc
18
+++ b/tcg/tci/tcg-target.c.inc
19
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
20
tcg_out_r(s, args[1]);
21
tcg_out_r(s, args[2]);
22
break;
23
- case INDEX_op_deposit_i32: /* Optional (TCG_TARGET_HAS_deposit_i32). */
24
+
25
+ CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */
26
tcg_out_r(s, args[0]);
27
tcg_out_r(s, args[1]);
28
tcg_out_r(s, args[2]);
29
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
30
break;
31
32
#if TCG_TARGET_REG_BITS == 64
33
- case INDEX_op_deposit_i64: /* Optional (TCG_TARGET_HAS_deposit_i64). */
34
- tcg_out_r(s, args[0]);
35
- tcg_out_r(s, args[1]);
36
- tcg_out_r(s, args[2]);
37
- tcg_debug_assert(args[3] <= UINT8_MAX);
38
- tcg_out8(s, args[3]);
39
- tcg_debug_assert(args[4] <= UINT8_MAX);
40
- tcg_out8(s, args[4]);
41
- break;
42
case INDEX_op_brcond_i64:
43
tcg_out_r(s, args[0]);
44
tcg_out_r(s, args[1]);
45
--
46
2.25.1
47
48
diff view generated by jsdifflib
[PULL 10/27] tcg/tci: Merge identical cases in generation (conditional opcodes)
Deleted patch
1
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
2
cases that are identical between 32-bit and 64-bit hosts.
3
1
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
7
[PMD: Split patch as 4/5]
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Message-Id: <20210218232840.1760806-5-f4bug@amsat.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
tcg/tci/tcg-target.c.inc | 23 ++++++-----------------
13
1 file changed, 6 insertions(+), 17 deletions(-)
14
15
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
16
index XXXXXXX..XXXXXXX 100644
17
--- a/tcg/tci/tcg-target.c.inc
18
+++ b/tcg/tci/tcg-target.c.inc
19
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
20
}
21
set_jmp_reset_offset(s, args[0]);
22
break;
23
+
24
case INDEX_op_br:
25
tci_out_label(s, arg_label(args[0]));
26
break;
27
- case INDEX_op_setcond_i32:
28
+
29
+ CASE_32_64(setcond)
30
tcg_out_r(s, args[0]);
31
tcg_out_r(s, args[1]);
32
tcg_out_r(s, args[2]);
33
tcg_out8(s, args[3]); /* condition */
34
break;
35
+
36
#if TCG_TARGET_REG_BITS == 32
37
case INDEX_op_setcond2_i32:
38
/* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */
39
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
40
tcg_out_r(s, args[4]);
41
tcg_out8(s, args[5]); /* condition */
42
break;
43
-#elif TCG_TARGET_REG_BITS == 64
44
- case INDEX_op_setcond_i64:
45
- tcg_out_r(s, args[0]);
46
- tcg_out_r(s, args[1]);
47
- tcg_out_r(s, args[2]);
48
- tcg_out8(s, args[3]); /* condition */
49
- break;
50
#endif
51
case INDEX_op_ld8u_i32:
52
case INDEX_op_ld8s_i32:
53
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
54
tcg_out8(s, args[4]);
55
break;
56
57
-#if TCG_TARGET_REG_BITS == 64
58
- case INDEX_op_brcond_i64:
59
+ CASE_32_64(brcond)
60
tcg_out_r(s, args[0]);
61
tcg_out_r(s, args[1]);
62
tcg_out8(s, args[2]); /* condition */
63
tci_out_label(s, arg_label(args[3]));
64
break;
65
-#endif /* TCG_TARGET_REG_BITS == 64 */
66
67
CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */
68
CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */
69
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
70
tcg_out_r(s, args[3]);
71
break;
72
#endif
73
- case INDEX_op_brcond_i32:
74
- tcg_out_r(s, args[0]);
75
- tcg_out_r(s, args[1]);
76
- tcg_out8(s, args[2]); /* condition */
77
- tci_out_label(s, arg_label(args[3]));
78
- break;
79
+
80
case INDEX_op_qemu_ld_i32:
81
tcg_out_r(s, *args++);
82
tcg_out_r(s, *args++);
83
--
84
2.25.1
85
86
diff view generated by jsdifflib
[PULL 11/27] tcg/tci: Merge identical cases in generation (load/store opcodes)
Deleted patch
1
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
2
cases that are identical between 32-bit and 64-bit hosts.
3
1
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
7
[PMD: Split patch as 5/5]
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Message-Id: <20210218232840.1760806-6-f4bug@amsat.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
tcg/tci/tcg-target.c.inc | 49 ++++++++++++----------------------------
13
1 file changed, 14 insertions(+), 35 deletions(-)
14
15
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
16
index XXXXXXX..XXXXXXX 100644
17
--- a/tcg/tci/tcg-target.c.inc
18
+++ b/tcg/tci/tcg-target.c.inc
19
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
20
tcg_out8(s, args[5]); /* condition */
21
break;
22
#endif
23
- case INDEX_op_ld8u_i32:
24
- case INDEX_op_ld8s_i32:
25
- case INDEX_op_ld16u_i32:
26
- case INDEX_op_ld16s_i32:
27
+
28
+ CASE_32_64(ld8u)
29
+ CASE_32_64(ld8s)
30
+ CASE_32_64(ld16u)
31
+ CASE_32_64(ld16s)
32
case INDEX_op_ld_i32:
33
- case INDEX_op_st8_i32:
34
- case INDEX_op_st16_i32:
35
+ CASE_64(ld32u)
36
+ CASE_64(ld32s)
37
+ CASE_64(ld)
38
+ CASE_32_64(st8)
39
+ CASE_32_64(st16)
40
case INDEX_op_st_i32:
41
- case INDEX_op_ld8u_i64:
42
- case INDEX_op_ld8s_i64:
43
- case INDEX_op_ld16u_i64:
44
- case INDEX_op_ld16s_i64:
45
- case INDEX_op_ld32u_i64:
46
- case INDEX_op_ld32s_i64:
47
- case INDEX_op_ld_i64:
48
- case INDEX_op_st8_i64:
49
- case INDEX_op_st16_i64:
50
- case INDEX_op_st32_i64:
51
- case INDEX_op_st_i64:
52
+ CASE_64(st32)
53
+ CASE_64(st)
54
stack_bounds_check(args[1], args[2]);
55
tcg_out_r(s, args[0]);
56
tcg_out_r(s, args[1]);
57
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
58
#endif
59
60
case INDEX_op_qemu_ld_i32:
61
- tcg_out_r(s, *args++);
62
- tcg_out_r(s, *args++);
63
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
64
- tcg_out_r(s, *args++);
65
- }
66
- tcg_out_i(s, *args++);
67
- break;
68
- case INDEX_op_qemu_ld_i64:
69
- tcg_out_r(s, *args++);
70
- if (TCG_TARGET_REG_BITS == 32) {
71
- tcg_out_r(s, *args++);
72
- }
73
- tcg_out_r(s, *args++);
74
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
75
- tcg_out_r(s, *args++);
76
- }
77
- tcg_out_i(s, *args++);
78
- break;
79
case INDEX_op_qemu_st_i32:
80
tcg_out_r(s, *args++);
81
tcg_out_r(s, *args++);
82
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
83
}
84
tcg_out_i(s, *args++);
85
break;
86
+
87
+ case INDEX_op_qemu_ld_i64:
88
case INDEX_op_qemu_st_i64:
89
tcg_out_r(s, *args++);
90
if (TCG_TARGET_REG_BITS == 32) {
91
--
92
2.25.1
93
94
diff view generated by jsdifflib
[PULL 12/27] tcg/tci: Remove tci_read_r8
Deleted patch
1
Use explicit casts for ext8u opcodes, and allow truncation
2
to happen with the store for st8 opcodes.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/tci.c | 23 +++++------------------
8
1 file changed, 5 insertions(+), 18 deletions(-)
9
10
diff --git a/tcg/tci.c b/tcg/tci.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/tci.c
13
+++ b/tcg/tci.c
14
@@ -XXX,XX +XXX,XX @@ static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index)
15
}
16
#endif
17
18
-static uint8_t tci_read_reg8(const tcg_target_ulong *regs, TCGReg index)
19
-{
20
- return (uint8_t)tci_read_reg(regs, index);
21
-}
22
-
23
static uint16_t tci_read_reg16(const tcg_target_ulong *regs, TCGReg index)
24
{
25
return (uint16_t)tci_read_reg(regs, index);
26
@@ -XXX,XX +XXX,XX @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
27
return value;
28
}
29
30
-/* Read indexed register (8 bit) from bytecode. */
31
-static uint8_t tci_read_r8(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
32
-{
33
- uint8_t value = tci_read_reg8(regs, **tb_ptr);
34
- *tb_ptr += 1;
35
- return value;
36
-}
37
-
38
#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
39
/* Read indexed register (8 bit signed) from bytecode. */
40
static int8_t tci_read_r8s(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
41
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
42
tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2));
43
break;
44
CASE_32_64(st8)
45
- t0 = tci_read_r8(regs, &tb_ptr);
46
+ t0 = tci_read_r(regs, &tb_ptr);
47
t1 = tci_read_r(regs, &tb_ptr);
48
t2 = tci_read_s32(&tb_ptr);
49
*(uint8_t *)(t1 + t2) = t0;
50
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
51
#if TCG_TARGET_HAS_ext8u_i32
52
case INDEX_op_ext8u_i32:
53
t0 = *tb_ptr++;
54
- t1 = tci_read_r8(regs, &tb_ptr);
55
- tci_write_reg(regs, t0, t1);
56
+ t1 = tci_read_r(regs, &tb_ptr);
57
+ tci_write_reg(regs, t0, (uint8_t)t1);
58
break;
59
#endif
60
#if TCG_TARGET_HAS_ext16u_i32
61
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
62
#if TCG_TARGET_HAS_ext8u_i64
63
case INDEX_op_ext8u_i64:
64
t0 = *tb_ptr++;
65
- t1 = tci_read_r8(regs, &tb_ptr);
66
- tci_write_reg(regs, t0, t1);
67
+ t1 = tci_read_r(regs, &tb_ptr);
68
+ tci_write_reg(regs, t0, (uint8_t)t1);
69
break;
70
#endif
71
#if TCG_TARGET_HAS_ext8s_i64
72
--
73
2.25.1
74
75
diff view generated by jsdifflib
[PULL 13/27] tcg/tci: Remove tci_read_r8s
Deleted patch
1
Use explicit casts for ext8s opcodes.
2
1
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/tci.c | 25 ++++---------------------
7
1 file changed, 4 insertions(+), 21 deletions(-)
8
9
diff --git a/tcg/tci.c b/tcg/tci.c
10
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/tci.c
12
+++ b/tcg/tci.c
13
@@ -XXX,XX +XXX,XX @@ static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
14
return regs[index];
15
}
16
17
-#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
18
-static int8_t tci_read_reg8s(const tcg_target_ulong *regs, TCGReg index)
19
-{
20
- return (int8_t)tci_read_reg(regs, index);
21
-}
22
-#endif
23
-
24
#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
25
static int16_t tci_read_reg16s(const tcg_target_ulong *regs, TCGReg index)
26
{
27
@@ -XXX,XX +XXX,XX @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
28
return value;
29
}
30
31
-#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
32
-/* Read indexed register (8 bit signed) from bytecode. */
33
-static int8_t tci_read_r8s(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
34
-{
35
- int8_t value = tci_read_reg8s(regs, **tb_ptr);
36
- *tb_ptr += 1;
37
- return value;
38
-}
39
-#endif
40
-
41
/* Read indexed register (16 bit) from bytecode. */
42
static uint16_t tci_read_r16(const tcg_target_ulong *regs,
43
const uint8_t **tb_ptr)
44
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
45
#if TCG_TARGET_HAS_ext8s_i32
46
case INDEX_op_ext8s_i32:
47
t0 = *tb_ptr++;
48
- t1 = tci_read_r8s(regs, &tb_ptr);
49
- tci_write_reg(regs, t0, t1);
50
+ t1 = tci_read_r(regs, &tb_ptr);
51
+ tci_write_reg(regs, t0, (int8_t)t1);
52
break;
53
#endif
54
#if TCG_TARGET_HAS_ext16s_i32
55
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
56
#if TCG_TARGET_HAS_ext8s_i64
57
case INDEX_op_ext8s_i64:
58
t0 = *tb_ptr++;
59
- t1 = tci_read_r8s(regs, &tb_ptr);
60
- tci_write_reg(regs, t0, t1);
61
+ t1 = tci_read_r(regs, &tb_ptr);
62
+ tci_write_reg(regs, t0, (int8_t)t1);
63
break;
64
#endif
65
#if TCG_TARGET_HAS_ext16s_i64
66
--
67
2.25.1
68
69
diff view generated by jsdifflib
[PULL 20/27] tcg/tci: Merge extension operations
[PULL 08/16] hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one
1
This includes ext8s, ext8u, ext16s, ext16u.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
Since we *might* have user emulation with softmmu,
4
replace the system emulation check by !user emulation one.
5
6
Invert the #ifdef'ry in TCGCPUOps structure for clarity.
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20230613133347.82210-6-philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
12
---
6
tcg/tci.c | 44 ++++++++------------------------------------
13
include/hw/core/cpu.h | 4 +-
7
1 file changed, 8 insertions(+), 36 deletions(-)
14
include/hw/core/tcg-cpu-ops.h | 102 +++++++++++++++++-----------------
15
2 files changed, 53 insertions(+), 53 deletions(-)
8
16
9
diff --git a/tcg/tci.c b/tcg/tci.c
17
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
10
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/tci.c
19
--- a/include/hw/core/cpu.h
12
+++ b/tcg/tci.c
20
+++ b/include/hw/core/cpu.h
13
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
21
@@ -XXX,XX +XXX,XX @@ void page_size_init(void);
14
tci_write_reg64(regs, t1, t0, (uint32_t)t2 * tmp64);
22
15
break;
23
#ifdef NEED_CPU_H
16
#endif /* TCG_TARGET_REG_BITS == 32 */
24
17
-#if TCG_TARGET_HAS_ext8s_i32
25
-#ifdef CONFIG_SOFTMMU
18
- case INDEX_op_ext8s_i32:
26
+#ifndef CONFIG_USER_ONLY
19
+#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
27
20
+ CASE_32_64(ext8s)
28
extern const VMStateDescription vmstate_cpu_common;
21
t0 = *tb_ptr++;
29
22
t1 = tci_read_r(regs, &tb_ptr);
30
@@ -XXX,XX +XXX,XX @@ extern const VMStateDescription vmstate_cpu_common;
23
tci_write_reg(regs, t0, (int8_t)t1);
31
.flags = VMS_STRUCT, \
24
break;
32
.offset = 0, \
25
#endif
33
}
26
-#if TCG_TARGET_HAS_ext16s_i32
34
-#endif /* CONFIG_SOFTMMU */
27
- case INDEX_op_ext16s_i32:
35
+#endif /* !CONFIG_USER_ONLY */
28
+#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
36
29
+ CASE_32_64(ext16s)
37
#endif /* NEED_CPU_H */
30
t0 = *tb_ptr++;
38
31
t1 = tci_read_r(regs, &tb_ptr);
39
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
32
tci_write_reg(regs, t0, (int16_t)t1);
40
index XXXXXXX..XXXXXXX 100644
33
break;
41
--- a/include/hw/core/tcg-cpu-ops.h
34
#endif
42
+++ b/include/hw/core/tcg-cpu-ops.h
35
-#if TCG_TARGET_HAS_ext8u_i32
43
@@ -XXX,XX +XXX,XX @@ struct TCGCPUOps {
36
- case INDEX_op_ext8u_i32:
44
*/
37
+#if TCG_TARGET_HAS_ext8u_i32 || TCG_TARGET_HAS_ext8u_i64
45
void (*do_interrupt)(CPUState *cpu);
38
+ CASE_32_64(ext8u)
46
#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
39
t0 = *tb_ptr++;
47
-#ifdef CONFIG_SOFTMMU
40
t1 = tci_read_r(regs, &tb_ptr);
48
+#ifdef CONFIG_USER_ONLY
41
tci_write_reg(regs, t0, (uint8_t)t1);
49
+ /**
42
break;
50
+ * record_sigsegv:
43
#endif
51
+ * @cpu: cpu context
44
-#if TCG_TARGET_HAS_ext16u_i32
52
+ * @addr: faulting guest address
45
- case INDEX_op_ext16u_i32:
53
+ * @access_type: access was read/write/execute
46
+#if TCG_TARGET_HAS_ext16u_i32 || TCG_TARGET_HAS_ext16u_i64
54
+ * @maperr: true for invalid page, false for permission fault
47
+ CASE_32_64(ext16u)
55
+ * @ra: host pc for unwinding
48
t0 = *tb_ptr++;
56
+ *
49
t1 = tci_read_r(regs, &tb_ptr);
57
+ * We are about to raise SIGSEGV with si_code set for @maperr,
50
tci_write_reg(regs, t0, (uint16_t)t1);
58
+ * and si_addr set for @addr. Record anything further needed
51
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
59
+ * for the signal ucontext_t.
52
continue;
60
+ *
53
}
61
+ * If the emulated kernel does not provide anything to the signal
54
break;
62
+ * handler with anything besides the user context registers, and
55
-#if TCG_TARGET_HAS_ext8u_i64
63
+ * the siginfo_t, then this hook need do nothing and may be omitted.
56
- case INDEX_op_ext8u_i64:
64
+ * Otherwise, record the data and return; the caller will raise
57
- t0 = *tb_ptr++;
65
+ * the signal, unwind the cpu state, and return to the main loop.
58
- t1 = tci_read_r(regs, &tb_ptr);
66
+ *
59
- tci_write_reg(regs, t0, (uint8_t)t1);
67
+ * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
60
- break;
68
+ * so that a "normal" cpu exception can be raised. In this case,
61
-#endif
69
+ * the signal must be raised by the architecture cpu_loop.
62
-#if TCG_TARGET_HAS_ext8s_i64
70
+ */
63
- case INDEX_op_ext8s_i64:
71
+ void (*record_sigsegv)(CPUState *cpu, vaddr addr,
64
- t0 = *tb_ptr++;
72
+ MMUAccessType access_type,
65
- t1 = tci_read_r(regs, &tb_ptr);
73
+ bool maperr, uintptr_t ra);
66
- tci_write_reg(regs, t0, (int8_t)t1);
74
+ /**
67
- break;
75
+ * record_sigbus:
68
-#endif
76
+ * @cpu: cpu context
69
-#if TCG_TARGET_HAS_ext16s_i64
77
+ * @addr: misaligned guest address
70
- case INDEX_op_ext16s_i64:
78
+ * @access_type: access was read/write/execute
71
- t0 = *tb_ptr++;
79
+ * @ra: host pc for unwinding
72
- t1 = tci_read_r(regs, &tb_ptr);
80
+ *
73
- tci_write_reg(regs, t0, (int16_t)t1);
81
+ * We are about to raise SIGBUS with si_code BUS_ADRALN,
74
- break;
82
+ * and si_addr set for @addr. Record anything further needed
75
-#endif
83
+ * for the signal ucontext_t.
76
-#if TCG_TARGET_HAS_ext16u_i64
84
+ *
77
- case INDEX_op_ext16u_i64:
85
+ * If the emulated kernel does not provide the signal handler with
78
- t0 = *tb_ptr++;
86
+ * anything besides the user context registers, and the siginfo_t,
79
- t1 = tci_read_r(regs, &tb_ptr);
87
+ * then this hook need do nothing and may be omitted.
80
- tci_write_reg(regs, t0, (uint16_t)t1);
88
+ * Otherwise, record the data and return; the caller will raise
81
- break;
89
+ * the signal, unwind the cpu state, and return to the main loop.
82
-#endif
90
+ *
83
#if TCG_TARGET_HAS_ext32s_i64
91
+ * If it is simpler to re-use the sysemu do_unaligned_access code,
84
case INDEX_op_ext32s_i64:
92
+ * @ra is provided so that a "normal" cpu exception can be raised.
85
#endif
93
+ * In this case, the signal must be raised by the architecture cpu_loop.
94
+ */
95
+ void (*record_sigbus)(CPUState *cpu, vaddr addr,
96
+ MMUAccessType access_type, uintptr_t ra);
97
+#else
98
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
99
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
100
/**
101
@@ -XXX,XX +XXX,XX @@ struct TCGCPUOps {
102
*/
103
bool (*io_recompile_replay_branch)(CPUState *cpu,
104
const TranslationBlock *tb);
105
-#else
106
- /**
107
- * record_sigsegv:
108
- * @cpu: cpu context
109
- * @addr: faulting guest address
110
- * @access_type: access was read/write/execute
111
- * @maperr: true for invalid page, false for permission fault
112
- * @ra: host pc for unwinding
113
- *
114
- * We are about to raise SIGSEGV with si_code set for @maperr,
115
- * and si_addr set for @addr. Record anything further needed
116
- * for the signal ucontext_t.
117
- *
118
- * If the emulated kernel does not provide anything to the signal
119
- * handler with anything besides the user context registers, and
120
- * the siginfo_t, then this hook need do nothing and may be omitted.
121
- * Otherwise, record the data and return; the caller will raise
122
- * the signal, unwind the cpu state, and return to the main loop.
123
- *
124
- * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
125
- * so that a "normal" cpu exception can be raised. In this case,
126
- * the signal must be raised by the architecture cpu_loop.
127
- */
128
- void (*record_sigsegv)(CPUState *cpu, vaddr addr,
129
- MMUAccessType access_type,
130
- bool maperr, uintptr_t ra);
131
- /**
132
- * record_sigbus:
133
- * @cpu: cpu context
134
- * @addr: misaligned guest address
135
- * @access_type: access was read/write/execute
136
- * @ra: host pc for unwinding
137
- *
138
- * We are about to raise SIGBUS with si_code BUS_ADRALN,
139
- * and si_addr set for @addr. Record anything further needed
140
- * for the signal ucontext_t.
141
- *
142
- * If the emulated kernel does not provide the signal handler with
143
- * anything besides the user context registers, and the siginfo_t,
144
- * then this hook need do nothing and may be omitted.
145
- * Otherwise, record the data and return; the caller will raise
146
- * the signal, unwind the cpu state, and return to the main loop.
147
- *
148
- * If it is simpler to re-use the sysemu do_unaligned_access code,
149
- * @ra is provided so that a "normal" cpu exception can be raised.
150
- * In this case, the signal must be raised by the architecture cpu_loop.
151
- */
152
- void (*record_sigbus)(CPUState *cpu, vaddr addr,
153
- MMUAccessType access_type, uintptr_t ra);
154
-#endif /* CONFIG_SOFTMMU */
155
+#endif /* !CONFIG_USER_ONLY */
156
#endif /* NEED_CPU_H */
157
158
};
86
--
159
--
87
2.25.1
160
2.34.1
88
161
89
162
diff view generated by jsdifflib
[PULL 24/27] accel/tcg: move CF_CLUSTER calculation to curr_cflags
[PULL 09/16] accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one
1
From: Alex Bennée <alex.bennee@linaro.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
There is nothing special about this compile flag that doesn't mean we
3
Since we *might* have user emulation with softmmu,
4
can't just compute it with curr_cflags() which we should be using when
4
replace the system emulation check by !user emulation one.
5
building a new set.
6
5
7
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
6
Invert some if() ladders for clarity.
8
Message-Id: <20210224165811.11567-3-alex.bennee@linaro.org>
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20230613133347.82210-7-philmd@linaro.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
12
---
11
include/exec/exec-all.h | 8 +++++---
13
accel/tcg/internal.h | 6 +++---
12
include/exec/tb-lookup.h | 3 ---
14
accel/tcg/cpu-exec.c | 4 ++--
13
accel/tcg/cpu-exec.c | 9 ++++-----
15
2 files changed, 5 insertions(+), 5 deletions(-)
14
accel/tcg/tcg-runtime.c | 2 +-
15
accel/tcg/translate-all.c | 6 +++---
16
softmmu/physmem.c | 2 +-
17
6 files changed, 14 insertions(+), 16 deletions(-)
18
16
19
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
17
diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h
20
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
21
--- a/include/exec/exec-all.h
19
--- a/accel/tcg/internal.h
22
+++ b/include/exec/exec-all.h
20
+++ b/accel/tcg/internal.h
23
@@ -XXX,XX +XXX,XX @@ static inline uint32_t tb_cflags(const TranslationBlock *tb)
21
@@ -XXX,XX +XXX,XX @@
24
}
22
* memory related structures are protected with mmap_lock.
25
23
* In !user-mode we use per-page locks.
26
/* current cflags for hashing/comparison */
24
*/
27
-static inline uint32_t curr_cflags(void)
25
-#ifdef CONFIG_SOFTMMU
28
+static inline uint32_t curr_cflags(CPUState *cpu)
26
-#define assert_memory_lock()
29
{
27
-#else
30
- return (parallel_cpus ? CF_PARALLEL : 0)
28
+#ifdef CONFIG_USER_ONLY
31
- | (icount_enabled() ? CF_USE_ICOUNT : 0);
29
#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
32
+ uint32_t cflags = deposit32(0, CF_CLUSTER_SHIFT, 8, cpu->cluster_index);
30
+#else
33
+ cflags |= parallel_cpus ? CF_PARALLEL : 0;
31
+#define assert_memory_lock()
34
+ cflags |= icount_enabled() ? CF_USE_ICOUNT : 0;
32
#endif
35
+ return cflags;
33
36
}
34
#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
37
38
/* TranslationBlock invalidate API */
39
diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h
40
index XXXXXXX..XXXXXXX 100644
41
--- a/include/exec/tb-lookup.h
42
+++ b/include/exec/tb-lookup.h
43
@@ -XXX,XX +XXX,XX @@ static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
44
hash = tb_jmp_cache_hash_func(pc);
45
tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]);
46
47
- cf_mask &= ~CF_CLUSTER_MASK;
48
- cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT;
49
-
50
if (likely(tb &&
51
tb->pc == pc &&
52
tb->cs_base == cs_base &&
53
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
35
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
54
index XXXXXXX..XXXXXXX 100644
36
index XXXXXXX..XXXXXXX 100644
55
--- a/accel/tcg/cpu-exec.c
37
--- a/accel/tcg/cpu-exec.c
56
+++ b/accel/tcg/cpu-exec.c
38
+++ b/accel/tcg/cpu-exec.c
57
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
39
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
58
TranslationBlock *tb;
40
cpu_tb_exec(cpu, tb, &tb_exit);
59
target_ulong cs_base, pc;
41
cpu_exec_exit(cpu);
60
uint32_t flags;
42
} else {
61
- uint32_t cflags = 1;
43
-#ifndef CONFIG_SOFTMMU
62
- uint32_t cf_mask = cflags & CF_HASH_MASK;
44
+#ifdef CONFIG_USER_ONLY
63
+ uint32_t cflags = (curr_cflags(cpu) & ~CF_PARALLEL) | 1;
45
clear_helper_retaddr();
64
int tb_exit;
46
if (have_mmap_lock()) {
65
47
mmap_unlock();
66
if (sigsetjmp(cpu->jmp_env, 0) == 0) {
48
@@ -XXX,XX +XXX,XX @@ static int cpu_exec_setjmp(CPUState *cpu, SyncClocks *sc)
67
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
49
/* Non-buggy compilers preserve this; assert the correct value. */
68
cpu->running = true;
50
g_assert(cpu == current_cpu);
69
51
70
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
52
-#ifndef CONFIG_SOFTMMU
71
- tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
53
+#ifdef CONFIG_USER_ONLY
72
+ tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
54
clear_helper_retaddr();
73
55
if (have_mmap_lock()) {
74
if (tb == NULL) {
56
mmap_unlock();
75
mmap_lock();
76
@@ -XXX,XX +XXX,XX @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
77
if (replay_has_exception()
78
&& cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
79
/* Execute just one insn to trigger exception pending in the log */
80
- cpu->cflags_next_tb = (curr_cflags() & ~CF_USE_ICOUNT) | 1;
81
+ cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) | 1;
82
}
83
#endif
84
return false;
85
@@ -XXX,XX +XXX,XX @@ int cpu_exec(CPUState *cpu)
86
have CF_INVALID set, -1 is a convenient invalid value that
87
does not require tcg headers for cpu_common_reset. */
88
if (cflags == -1) {
89
- cflags = curr_cflags();
90
+ cflags = curr_cflags(cpu);
91
} else {
92
cpu->cflags_next_tb = -1;
93
}
94
diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c
95
index XXXXXXX..XXXXXXX 100644
96
--- a/accel/tcg/tcg-runtime.c
97
+++ b/accel/tcg/tcg-runtime.c
98
@@ -XXX,XX +XXX,XX @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
99
100
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
101
102
- tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags());
103
+ tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags(cpu));
104
if (tb == NULL) {
105
return tcg_code_gen_epilogue;
106
}
107
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
108
index XXXXXXX..XXXXXXX 100644
109
--- a/accel/tcg/translate-all.c
110
+++ b/accel/tcg/translate-all.c
111
@@ -XXX,XX +XXX,XX @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
112
if (current_tb_modified) {
113
page_collection_unlock(pages);
114
/* Force execution of one insn next time. */
115
- cpu->cflags_next_tb = 1 | curr_cflags();
116
+ cpu->cflags_next_tb = 1 | curr_cflags(cpu);
117
mmap_unlock();
118
cpu_loop_exit_noexc(cpu);
119
}
120
@@ -XXX,XX +XXX,XX @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
121
#ifdef TARGET_HAS_PRECISE_SMC
122
if (current_tb_modified) {
123
/* Force execution of one insn next time. */
124
- cpu->cflags_next_tb = 1 | curr_cflags();
125
+ cpu->cflags_next_tb = 1 | curr_cflags(cpu);
126
return true;
127
}
128
#endif
129
@@ -XXX,XX +XXX,XX @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
130
* operations only (which execute after completion) so we don't
131
* double instrument the instruction.
132
*/
133
- cpu->cflags_next_tb = curr_cflags() | CF_MEMI_ONLY | CF_LAST_IO | n;
134
+ cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
135
136
qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
137
"cpu_io_recompile: rewound execution of TB to "
138
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
139
index XXXXXXX..XXXXXXX 100644
140
--- a/softmmu/physmem.c
141
+++ b/softmmu/physmem.c
142
@@ -XXX,XX +XXX,XX @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
143
cpu_loop_exit_restore(cpu, ra);
144
} else {
145
/* Force execution of one insn next time. */
146
- cpu->cflags_next_tb = 1 | curr_cflags();
147
+ cpu->cflags_next_tb = 1 | curr_cflags(cpu);
148
mmap_unlock();
149
if (ra) {
150
cpu_restore_state(cpu, ra, true);
151
--
57
--
152
2.25.1
58
2.34.1
153
59
154
60
diff view generated by jsdifflib
[PULL 19/27] tcg/tci: Merge basic arithmetic operations
[PULL 10/16] meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
1
This includes add, sub, mul, and, or, xor.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
We use the CONFIG_USER_ONLY key to describe user emulation,
4
and the CONFIG_SOFTMMU key to describe system emulation. Alias
5
it as 'CONFIG_SYSTEM_ONLY' for parity with user emulation.
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230613133347.82210-8-philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
11
---
6
tcg/tci.c | 83 +++++++++++++++++--------------------------------------
12
meson.build | 1 +
7
1 file changed, 25 insertions(+), 58 deletions(-)
13
1 file changed, 1 insertion(+)
8
14
9
diff --git a/tcg/tci.c b/tcg/tci.c
15
diff --git a/meson.build b/meson.build
10
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/tci.c
17
--- a/meson.build
12
+++ b/tcg/tci.c
18
+++ b/meson.build
13
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
19
@@ -XXX,XX +XXX,XX @@ foreach target : target_dirs
14
*(uint32_t *)(t1 + t2) = t0;
20
endif
15
break;
21
config_target += { 'CONFIG_BSD_USER': 'y' }
16
22
elif target.endswith('softmmu')
17
- /* Arithmetic operations (32 bit). */
23
+ config_target += { 'CONFIG_SYSTEM_ONLY': 'y' }
18
+ /* Arithmetic operations (mixed 32/64 bit). */
24
config_target += { 'CONFIG_SOFTMMU': 'y' }
19
25
endif
20
- case INDEX_op_add_i32:
26
if target.endswith('-user')
21
+ CASE_32_64(add)
22
t0 = *tb_ptr++;
23
t1 = tci_read_r(regs, &tb_ptr);
24
t2 = tci_read_r(regs, &tb_ptr);
25
tci_write_reg(regs, t0, t1 + t2);
26
break;
27
- case INDEX_op_sub_i32:
28
+ CASE_32_64(sub)
29
t0 = *tb_ptr++;
30
t1 = tci_read_r(regs, &tb_ptr);
31
t2 = tci_read_r(regs, &tb_ptr);
32
tci_write_reg(regs, t0, t1 - t2);
33
break;
34
- case INDEX_op_mul_i32:
35
+ CASE_32_64(mul)
36
t0 = *tb_ptr++;
37
t1 = tci_read_r(regs, &tb_ptr);
38
t2 = tci_read_r(regs, &tb_ptr);
39
tci_write_reg(regs, t0, t1 * t2);
40
break;
41
+ CASE_32_64(and)
42
+ t0 = *tb_ptr++;
43
+ t1 = tci_read_r(regs, &tb_ptr);
44
+ t2 = tci_read_r(regs, &tb_ptr);
45
+ tci_write_reg(regs, t0, t1 & t2);
46
+ break;
47
+ CASE_32_64(or)
48
+ t0 = *tb_ptr++;
49
+ t1 = tci_read_r(regs, &tb_ptr);
50
+ t2 = tci_read_r(regs, &tb_ptr);
51
+ tci_write_reg(regs, t0, t1 | t2);
52
+ break;
53
+ CASE_32_64(xor)
54
+ t0 = *tb_ptr++;
55
+ t1 = tci_read_r(regs, &tb_ptr);
56
+ t2 = tci_read_r(regs, &tb_ptr);
57
+ tci_write_reg(regs, t0, t1 ^ t2);
58
+ break;
59
+
60
+ /* Arithmetic operations (32 bit). */
61
+
62
case INDEX_op_div_i32:
63
t0 = *tb_ptr++;
64
t1 = tci_read_r(regs, &tb_ptr);
65
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
66
t2 = tci_read_r(regs, &tb_ptr);
67
tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2);
68
break;
69
- case INDEX_op_and_i32:
70
- t0 = *tb_ptr++;
71
- t1 = tci_read_r(regs, &tb_ptr);
72
- t2 = tci_read_r(regs, &tb_ptr);
73
- tci_write_reg(regs, t0, t1 & t2);
74
- break;
75
- case INDEX_op_or_i32:
76
- t0 = *tb_ptr++;
77
- t1 = tci_read_r(regs, &tb_ptr);
78
- t2 = tci_read_r(regs, &tb_ptr);
79
- tci_write_reg(regs, t0, t1 | t2);
80
- break;
81
- case INDEX_op_xor_i32:
82
- t0 = *tb_ptr++;
83
- t1 = tci_read_r(regs, &tb_ptr);
84
- t2 = tci_read_r(regs, &tb_ptr);
85
- tci_write_reg(regs, t0, t1 ^ t2);
86
- break;
87
88
/* Shift/rotate operations (32 bit). */
89
90
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
91
92
/* Arithmetic operations (64 bit). */
93
94
- case INDEX_op_add_i64:
95
- t0 = *tb_ptr++;
96
- t1 = tci_read_r(regs, &tb_ptr);
97
- t2 = tci_read_r(regs, &tb_ptr);
98
- tci_write_reg(regs, t0, t1 + t2);
99
- break;
100
- case INDEX_op_sub_i64:
101
- t0 = *tb_ptr++;
102
- t1 = tci_read_r(regs, &tb_ptr);
103
- t2 = tci_read_r(regs, &tb_ptr);
104
- tci_write_reg(regs, t0, t1 - t2);
105
- break;
106
- case INDEX_op_mul_i64:
107
- t0 = *tb_ptr++;
108
- t1 = tci_read_r(regs, &tb_ptr);
109
- t2 = tci_read_r(regs, &tb_ptr);
110
- tci_write_reg(regs, t0, t1 * t2);
111
- break;
112
case INDEX_op_div_i64:
113
t0 = *tb_ptr++;
114
t1 = tci_read_r(regs, &tb_ptr);
115
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
116
t2 = tci_read_r(regs, &tb_ptr);
117
tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2);
118
break;
119
- case INDEX_op_and_i64:
120
- t0 = *tb_ptr++;
121
- t1 = tci_read_r(regs, &tb_ptr);
122
- t2 = tci_read_r(regs, &tb_ptr);
123
- tci_write_reg(regs, t0, t1 & t2);
124
- break;
125
- case INDEX_op_or_i64:
126
- t0 = *tb_ptr++;
127
- t1 = tci_read_r(regs, &tb_ptr);
128
- t2 = tci_read_r(regs, &tb_ptr);
129
- tci_write_reg(regs, t0, t1 | t2);
130
- break;
131
- case INDEX_op_xor_i64:
132
- t0 = *tb_ptr++;
133
- t1 = tci_read_r(regs, &tb_ptr);
134
- t2 = tci_read_r(regs, &tb_ptr);
135
- tci_write_reg(regs, t0, t1 ^ t2);
136
- break;
137
138
/* Shift/rotate operations (64 bit). */
139
140
--
27
--
141
2.25.1
28
2.34.1
142
29
143
30
diff view generated by jsdifflib
[PULL 18/27] tcg/tci: Reduce use of tci_read_r64
[PULL 11/16] meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
1
In all cases restricted to 64-bit hosts, tcg_read_r is
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
identical. We retain the 64-bit symbol for the single
2
3
case of INDEX_op_qemu_st_i64.
3
Since we *might* have user emulation with softmmu,
4
4
use the clearer 'CONFIG_SYSTEM_ONLY' key to check
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
5
for system emulation.
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230613133347.82210-9-philmd@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
11
---
8
tcg/tci.c | 93 +++++++++++++++++++++++++------------------------------
12
meson.build | 4 ++--
9
1 file changed, 42 insertions(+), 51 deletions(-)
13
accel/qtest/meson.build | 2 +-
10
14
accel/stubs/meson.build | 2 +-
11
diff --git a/tcg/tci.c b/tcg/tci.c
15
accel/tcg/meson.build | 6 +++---
12
index XXXXXXX..XXXXXXX 100644
16
dump/meson.build | 2 +-
13
--- a/tcg/tci.c
17
hw/i386/kvm/meson.build | 2 +-
14
+++ b/tcg/tci.c
18
migration/meson.build | 2 +-
15
@@ -XXX,XX +XXX,XX @@ static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
19
monitor/meson.build | 2 +-
16
return regs[index];
20
qapi/meson.build | 2 +-
21
semihosting/meson.build | 2 +-
22
softmmu/meson.build | 4 ++--
23
target/i386/tcg/sysemu/meson.build | 2 +-
24
ui/meson.build | 4 ++--
25
13 files changed, 18 insertions(+), 18 deletions(-)
26
27
diff --git a/meson.build b/meson.build
28
index XXXXXXX..XXXXXXX 100644
29
--- a/meson.build
30
+++ b/meson.build
31
@@ -XXX,XX +XXX,XX @@ config_all += config_host
32
config_all += config_all_disas
33
config_all += {
34
'CONFIG_XEN': xen.found(),
35
- 'CONFIG_SOFTMMU': have_system,
36
+ 'CONFIG_SYSTEM_ONLY': have_system,
37
'CONFIG_USER_ONLY': have_user,
38
'CONFIG_ALL': true,
17
}
39
}
18
40
@@ -XXX,XX +XXX,XX @@ endif
19
-#if TCG_TARGET_REG_BITS == 64
41
softmmu_ss.add(authz, blockdev, chardev, crypto, io, qmp)
20
-static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index)
42
common_ss.add(qom, qemuutil)
21
-{
43
22
- return tci_read_reg(regs, index);
44
-common_ss.add_all(when: 'CONFIG_SOFTMMU', if_true: [softmmu_ss])
23
-}
45
+common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [softmmu_ss])
24
-#endif
46
common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
25
-
47
26
static void
48
common_all = common_ss.apply(config_all, strict: false)
27
tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value)
49
diff --git a/accel/qtest/meson.build b/accel/qtest/meson.build
28
{
50
index XXXXXXX..XXXXXXX 100644
29
@@ -XXX,XX +XXX,XX @@ static uint64_t tci_read_r64(const tcg_target_ulong *regs,
51
--- a/accel/qtest/meson.build
30
static uint64_t tci_read_r64(const tcg_target_ulong *regs,
52
+++ b/accel/qtest/meson.build
31
const uint8_t **tb_ptr)
53
@@ -1 +1 @@
32
{
54
-qtest_module_ss.add(when: ['CONFIG_SOFTMMU'], if_true: files('qtest.c'))
33
- uint64_t value = tci_read_reg64(regs, **tb_ptr);
55
+qtest_module_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: files('qtest.c'))
34
- *tb_ptr += 1;
56
diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build
35
- return value;
57
index XXXXXXX..XXXXXXX 100644
36
+ return tci_read_r(regs, tb_ptr);
58
--- a/accel/stubs/meson.build
37
}
59
+++ b/accel/stubs/meson.build
38
#endif
60
@@ -XXX,XX +XXX,XX @@ sysemu_stubs_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c'))
39
61
sysemu_stubs_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c'))
40
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
62
sysemu_stubs_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
41
#elif TCG_TARGET_REG_BITS == 64
63
42
case INDEX_op_setcond_i64:
64
-specific_ss.add_all(when: ['CONFIG_SOFTMMU'], if_true: sysemu_stubs_ss)
43
t0 = *tb_ptr++;
65
+specific_ss.add_all(when: ['CONFIG_SYSTEM_ONLY'], if_true: sysemu_stubs_ss)
44
- t1 = tci_read_r64(regs, &tb_ptr);
66
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
45
- t2 = tci_read_r64(regs, &tb_ptr);
67
index XXXXXXX..XXXXXXX 100644
46
+ t1 = tci_read_r(regs, &tb_ptr);
68
--- a/accel/tcg/meson.build
47
+ t2 = tci_read_r(regs, &tb_ptr);
69
+++ b/accel/tcg/meson.build
48
condition = *tb_ptr++;
70
@@ -XXX,XX +XXX,XX @@ tcg_ss.add(files(
49
tci_write_reg(regs, t0, tci_compare64(t1, t2, condition));
71
'translator.c',
50
break;
72
))
51
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
73
tcg_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
52
#if TCG_TARGET_REG_BITS == 64
74
-tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
53
case INDEX_op_mov_i64:
75
+tcg_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec-stub.c'))
54
t0 = *tb_ptr++;
76
tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c')])
55
- t1 = tci_read_r64(regs, &tb_ptr);
77
tcg_ss.add(when: libdw, if_true: files('debuginfo.c'))
56
+ t1 = tci_read_r(regs, &tb_ptr);
78
tcg_ss.add(when: 'CONFIG_LINUX', if_true: files('perf.c'))
57
tci_write_reg(regs, t0, t1);
79
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
58
break;
80
59
case INDEX_op_tci_movi_i64:
81
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
60
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
82
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
61
tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2));
83
'cputlb.c',
62
break;
84
'monitor.c',
63
case INDEX_op_st_i64:
85
))
64
- t0 = tci_read_r64(regs, &tb_ptr);
86
65
+ t0 = tci_read_r(regs, &tb_ptr);
87
-tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
66
t1 = tci_read_r(regs, &tb_ptr);
88
+tcg_module_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
67
t2 = tci_read_s32(&tb_ptr);
89
'tcg-accel-ops.c',
68
*(uint64_t *)(t1 + t2) = t0;
90
'tcg-accel-ops-mttcg.c',
69
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
91
'tcg-accel-ops-icount.c',
70
92
diff --git a/dump/meson.build b/dump/meson.build
71
case INDEX_op_add_i64:
93
index XXXXXXX..XXXXXXX 100644
72
t0 = *tb_ptr++;
94
--- a/dump/meson.build
73
- t1 = tci_read_r64(regs, &tb_ptr);
95
+++ b/dump/meson.build
74
- t2 = tci_read_r64(regs, &tb_ptr);
96
@@ -XXX,XX +XXX,XX @@
75
+ t1 = tci_read_r(regs, &tb_ptr);
97
softmmu_ss.add([files('dump.c', 'dump-hmp-cmds.c'), snappy, lzo])
76
+ t2 = tci_read_r(regs, &tb_ptr);
98
-specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: files('win_dump.c'))
77
tci_write_reg(regs, t0, t1 + t2);
99
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: files('win_dump.c'))
78
break;
100
diff --git a/hw/i386/kvm/meson.build b/hw/i386/kvm/meson.build
79
case INDEX_op_sub_i64:
101
index XXXXXXX..XXXXXXX 100644
80
t0 = *tb_ptr++;
102
--- a/hw/i386/kvm/meson.build
81
- t1 = tci_read_r64(regs, &tb_ptr);
103
+++ b/hw/i386/kvm/meson.build
82
- t2 = tci_read_r64(regs, &tb_ptr);
104
@@ -XXX,XX +XXX,XX @@ xen_stubs_ss.add(when: 'CONFIG_XEN_EMU', if_false: files(
83
+ t1 = tci_read_r(regs, &tb_ptr);
105
'xen-stubs.c',
84
+ t2 = tci_read_r(regs, &tb_ptr);
106
))
85
tci_write_reg(regs, t0, t1 - t2);
107
86
break;
108
-specific_ss.add_all(when: 'CONFIG_SOFTMMU', if_true: xen_stubs_ss)
87
case INDEX_op_mul_i64:
109
+specific_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: xen_stubs_ss)
88
t0 = *tb_ptr++;
110
diff --git a/migration/meson.build b/migration/meson.build
89
- t1 = tci_read_r64(regs, &tb_ptr);
111
index XXXXXXX..XXXXXXX 100644
90
- t2 = tci_read_r64(regs, &tb_ptr);
112
--- a/migration/meson.build
91
+ t1 = tci_read_r(regs, &tb_ptr);
113
+++ b/migration/meson.build
92
+ t2 = tci_read_r(regs, &tb_ptr);
114
@@ -XXX,XX +XXX,XX @@ if get_option('live_block_migration').allowed()
93
tci_write_reg(regs, t0, t1 * t2);
115
endif
94
break;
116
softmmu_ss.add(when: zstd, if_true: files('multifd-zstd.c'))
95
case INDEX_op_div_i64:
117
96
t0 = *tb_ptr++;
118
-specific_ss.add(when: 'CONFIG_SOFTMMU',
97
- t1 = tci_read_r64(regs, &tb_ptr);
119
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
98
- t2 = tci_read_r64(regs, &tb_ptr);
120
if_true: files('ram.c',
99
+ t1 = tci_read_r(regs, &tb_ptr);
121
'target.c'))
100
+ t2 = tci_read_r(regs, &tb_ptr);
122
diff --git a/monitor/meson.build b/monitor/meson.build
101
tci_write_reg(regs, t0, (int64_t)t1 / (int64_t)t2);
123
index XXXXXXX..XXXXXXX 100644
102
break;
124
--- a/monitor/meson.build
103
case INDEX_op_divu_i64:
125
+++ b/monitor/meson.build
104
t0 = *tb_ptr++;
126
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
105
- t1 = tci_read_r64(regs, &tb_ptr);
127
))
106
- t2 = tci_read_r64(regs, &tb_ptr);
128
softmmu_ss.add([spice_headers, files('qmp-cmds.c')])
107
+ t1 = tci_read_r(regs, &tb_ptr);
129
108
+ t2 = tci_read_r(regs, &tb_ptr);
130
-specific_ss.add(when: 'CONFIG_SOFTMMU',
109
tci_write_reg(regs, t0, (uint64_t)t1 / (uint64_t)t2);
131
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
110
break;
132
        if_true: [files( 'hmp-cmds-target.c', 'hmp-target.c'), spice])
111
case INDEX_op_rem_i64:
133
diff --git a/qapi/meson.build b/qapi/meson.build
112
t0 = *tb_ptr++;
134
index XXXXXXX..XXXXXXX 100644
113
- t1 = tci_read_r64(regs, &tb_ptr);
135
--- a/qapi/meson.build
114
- t2 = tci_read_r64(regs, &tb_ptr);
136
+++ b/qapi/meson.build
115
+ t1 = tci_read_r(regs, &tb_ptr);
137
@@ -XXX,XX +XXX,XX @@ foreach output : qapi_specific_outputs + qapi_nonmodule_outputs
116
+ t2 = tci_read_r(regs, &tb_ptr);
138
if output.endswith('.trace-events')
117
tci_write_reg(regs, t0, (int64_t)t1 % (int64_t)t2);
139
qapi_trace_events += qapi_files[i]
118
break;
140
endif
119
case INDEX_op_remu_i64:
141
- specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: qapi_files[i])
120
t0 = *tb_ptr++;
142
+ specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: qapi_files[i])
121
- t1 = tci_read_r64(regs, &tb_ptr);
143
i = i + 1
122
- t2 = tci_read_r64(regs, &tb_ptr);
144
endforeach
123
+ t1 = tci_read_r(regs, &tb_ptr);
145
diff --git a/semihosting/meson.build b/semihosting/meson.build
124
+ t2 = tci_read_r(regs, &tb_ptr);
146
index XXXXXXX..XXXXXXX 100644
125
tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2);
147
--- a/semihosting/meson.build
126
break;
148
+++ b/semihosting/meson.build
127
case INDEX_op_and_i64:
149
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_SEMIHOSTING', if_true: files(
128
t0 = *tb_ptr++;
150
'syscalls.c',
129
- t1 = tci_read_r64(regs, &tb_ptr);
151
))
130
- t2 = tci_read_r64(regs, &tb_ptr);
152
131
+ t1 = tci_read_r(regs, &tb_ptr);
153
-specific_ss.add(when: ['CONFIG_SEMIHOSTING', 'CONFIG_SOFTMMU'], if_true: files(
132
+ t2 = tci_read_r(regs, &tb_ptr);
154
+specific_ss.add(when: ['CONFIG_SEMIHOSTING', 'CONFIG_SYSTEM_ONLY'], if_true: files(
133
tci_write_reg(regs, t0, t1 & t2);
155
'config.c',
134
break;
156
'console.c',
135
case INDEX_op_or_i64:
157
'uaccess.c',
136
t0 = *tb_ptr++;
158
diff --git a/softmmu/meson.build b/softmmu/meson.build
137
- t1 = tci_read_r64(regs, &tb_ptr);
159
index XXXXXXX..XXXXXXX 100644
138
- t2 = tci_read_r64(regs, &tb_ptr);
160
--- a/softmmu/meson.build
139
+ t1 = tci_read_r(regs, &tb_ptr);
161
+++ b/softmmu/meson.build
140
+ t2 = tci_read_r(regs, &tb_ptr);
162
@@ -XXX,XX +XXX,XX @@
141
tci_write_reg(regs, t0, t1 | t2);
163
-specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files(
142
break;
164
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: [files(
143
case INDEX_op_xor_i64:
165
'arch_init.c',
144
t0 = *tb_ptr++;
166
'ioport.c',
145
- t1 = tci_read_r64(regs, &tb_ptr);
167
'memory.c',
146
- t2 = tci_read_r64(regs, &tb_ptr);
168
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files(
147
+ t1 = tci_read_r(regs, &tb_ptr);
169
'watchpoint.c',
148
+ t2 = tci_read_r(regs, &tb_ptr);
170
)])
149
tci_write_reg(regs, t0, t1 ^ t2);
171
150
break;
172
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: [files(
151
173
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: [files(
152
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
174
'icount.c',
153
175
)])
154
case INDEX_op_shl_i64:
176
155
t0 = *tb_ptr++;
177
diff --git a/target/i386/tcg/sysemu/meson.build b/target/i386/tcg/sysemu/meson.build
156
- t1 = tci_read_r64(regs, &tb_ptr);
178
index XXXXXXX..XXXXXXX 100644
157
- t2 = tci_read_r64(regs, &tb_ptr);
179
--- a/target/i386/tcg/sysemu/meson.build
158
+ t1 = tci_read_r(regs, &tb_ptr);
180
+++ b/target/i386/tcg/sysemu/meson.build
159
+ t2 = tci_read_r(regs, &tb_ptr);
181
@@ -XXX,XX +XXX,XX @@
160
tci_write_reg(regs, t0, t1 << (t2 & 63));
182
-i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
161
break;
183
+i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SYSTEM_ONLY'], if_true: files(
162
case INDEX_op_shr_i64:
184
'tcg-cpu.c',
163
t0 = *tb_ptr++;
185
'smm_helper.c',
164
- t1 = tci_read_r64(regs, &tb_ptr);
186
'excp_helper.c',
165
- t2 = tci_read_r64(regs, &tb_ptr);
187
diff --git a/ui/meson.build b/ui/meson.build
166
+ t1 = tci_read_r(regs, &tb_ptr);
188
index XXXXXXX..XXXXXXX 100644
167
+ t2 = tci_read_r(regs, &tb_ptr);
189
--- a/ui/meson.build
168
tci_write_reg(regs, t0, t1 >> (t2 & 63));
190
+++ b/ui/meson.build
169
break;
191
@@ -XXX,XX +XXX,XX @@
170
case INDEX_op_sar_i64:
192
softmmu_ss.add(pixman)
171
t0 = *tb_ptr++;
193
-specific_ss.add(when: ['CONFIG_SOFTMMU'], if_true: pixman) # for the include path
172
- t1 = tci_read_r64(regs, &tb_ptr);
194
-specific_ss.add(when: ['CONFIG_SOFTMMU'], if_true: opengl) # for the include path
173
- t2 = tci_read_r64(regs, &tb_ptr);
195
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: pixman) # for the include path
174
+ t1 = tci_read_r(regs, &tb_ptr);
196
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: opengl) # for the include path
175
+ t2 = tci_read_r(regs, &tb_ptr);
197
176
tci_write_reg(regs, t0, ((int64_t)t1 >> (t2 & 63)));
198
softmmu_ss.add(png)
177
break;
199
softmmu_ss.add(files(
178
#if TCG_TARGET_HAS_rot_i64
179
case INDEX_op_rotl_i64:
180
t0 = *tb_ptr++;
181
- t1 = tci_read_r64(regs, &tb_ptr);
182
- t2 = tci_read_r64(regs, &tb_ptr);
183
+ t1 = tci_read_r(regs, &tb_ptr);
184
+ t2 = tci_read_r(regs, &tb_ptr);
185
tci_write_reg(regs, t0, rol64(t1, t2 & 63));
186
break;
187
case INDEX_op_rotr_i64:
188
t0 = *tb_ptr++;
189
- t1 = tci_read_r64(regs, &tb_ptr);
190
- t2 = tci_read_r64(regs, &tb_ptr);
191
+ t1 = tci_read_r(regs, &tb_ptr);
192
+ t2 = tci_read_r(regs, &tb_ptr);
193
tci_write_reg(regs, t0, ror64(t1, t2 & 63));
194
break;
195
#endif
196
#if TCG_TARGET_HAS_deposit_i64
197
case INDEX_op_deposit_i64:
198
t0 = *tb_ptr++;
199
- t1 = tci_read_r64(regs, &tb_ptr);
200
- t2 = tci_read_r64(regs, &tb_ptr);
201
+ t1 = tci_read_r(regs, &tb_ptr);
202
+ t2 = tci_read_r(regs, &tb_ptr);
203
tmp16 = *tb_ptr++;
204
tmp8 = *tb_ptr++;
205
tmp64 = (((1ULL << tmp8) - 1) << tmp16);
206
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
207
break;
208
#endif
209
case INDEX_op_brcond_i64:
210
- t0 = tci_read_r64(regs, &tb_ptr);
211
- t1 = tci_read_r64(regs, &tb_ptr);
212
+ t0 = tci_read_r(regs, &tb_ptr);
213
+ t1 = tci_read_r(regs, &tb_ptr);
214
condition = *tb_ptr++;
215
label = tci_read_label(&tb_ptr);
216
if (tci_compare64(t0, t1, condition)) {
217
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
218
#if TCG_TARGET_HAS_bswap64_i64
219
case INDEX_op_bswap64_i64:
220
t0 = *tb_ptr++;
221
- t1 = tci_read_r64(regs, &tb_ptr);
222
+ t1 = tci_read_r(regs, &tb_ptr);
223
tci_write_reg(regs, t0, bswap64(t1));
224
break;
225
#endif
226
#if TCG_TARGET_HAS_not_i64
227
case INDEX_op_not_i64:
228
t0 = *tb_ptr++;
229
- t1 = tci_read_r64(regs, &tb_ptr);
230
+ t1 = tci_read_r(regs, &tb_ptr);
231
tci_write_reg(regs, t0, ~t1);
232
break;
233
#endif
234
#if TCG_TARGET_HAS_neg_i64
235
case INDEX_op_neg_i64:
236
t0 = *tb_ptr++;
237
- t1 = tci_read_r64(regs, &tb_ptr);
238
+ t1 = tci_read_r(regs, &tb_ptr);
239
tci_write_reg(regs, t0, -t1);
240
break;
241
#endif
242
--
200
--
243
2.25.1
201
2.34.1
244
202
245
203
diff view generated by jsdifflib
[PULL 17/27] tcg/tci: Remove tci_read_r32s
[PULL 12/16] meson: Replace softmmu_ss -> system_ss
1
Use explicit casts for ext32s opcodes.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
We use the user_ss[] array to hold the user emulation sources,
4
and the softmmu_ss[] array to hold the system emulation ones.
5
Hold the latter in the 'system_ss[]' array for parity with user
6
emulation.
7
8
Mechanical change doing:
9
10
$ sed -i -e s/softmmu_ss/system_ss/g $(git grep -l softmmu_ss)
11
12
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
13
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
14
Message-Id: <20230613133347.82210-10-philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
15
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
16
---
6
tcg/tci.c | 20 ++------------------
17
docs/devel/build-system.rst | 14 +--
7
1 file changed, 2 insertions(+), 18 deletions(-)
18
meson.build | 12 +--
19
accel/meson.build | 4 +-
20
audio/meson.build | 8 +-
21
backends/meson.build | 20 ++--
22
backends/tpm/meson.build | 8 +-
23
block/meson.build | 6 +-
24
block/monitor/meson.build | 2 +-
25
chardev/meson.build | 2 +-
26
disas/meson.build | 2 +-
27
dump/meson.build | 2 +-
28
ebpf/meson.build | 2 +-
29
fsdev/meson.build | 4 +-
30
gdbstub/meson.build | 10 +-
31
hw/9pfs/meson.build | 2 +-
32
hw/acpi/meson.build | 10 +-
33
hw/adc/meson.build | 10 +-
34
hw/arm/meson.build | 8 +-
35
hw/audio/meson.build | 28 +++---
36
hw/block/meson.build | 28 +++---
37
hw/char/meson.build | 70 +++++++-------
38
hw/core/meson.build | 22 ++---
39
hw/cpu/meson.build | 6 +-
40
hw/cxl/meson.build | 4 +-
41
hw/display/meson.build | 76 +++++++--------
42
hw/dma/meson.build | 32 +++----
43
hw/gpio/meson.build | 26 ++---
44
hw/i2c/meson.build | 2 +-
45
hw/ide/meson.build | 28 +++---
46
hw/input/meson.build | 32 +++----
47
hw/intc/meson.build | 44 ++++-----
48
hw/ipack/meson.build | 2 +-
49
hw/ipmi/meson.build | 2 +-
50
hw/isa/meson.build | 18 ++--
51
hw/mem/meson.build | 8 +-
52
hw/misc/macio/meson.build | 2 +-
53
hw/misc/meson.build | 148 ++++++++++++++---------------
54
hw/net/can/meson.build | 16 ++--
55
hw/net/meson.build | 96 +++++++++----------
56
hw/nubus/meson.build | 2 +-
57
hw/nvme/meson.build | 2 +-
58
hw/nvram/meson.build | 26 ++---
59
hw/pci-bridge/meson.build | 4 +-
60
hw/pci-host/meson.build | 2 +-
61
hw/pci/meson.build | 8 +-
62
hw/pcmcia/meson.build | 4 +-
63
hw/rdma/meson.build | 2 +-
64
hw/remote/meson.build | 2 +-
65
hw/rtc/meson.build | 28 +++---
66
hw/scsi/meson.build | 2 +-
67
hw/sd/meson.build | 24 ++---
68
hw/sensor/meson.build | 18 ++--
69
hw/smbios/meson.build | 6 +-
70
hw/ssi/meson.build | 26 ++---
71
hw/timer/meson.build | 74 +++++++--------
72
hw/tpm/meson.build | 14 +--
73
hw/usb/meson.build | 74 +++++++--------
74
hw/virtio/meson.build | 12 +--
75
hw/watchdog/meson.build | 18 ++--
76
hw/xen/meson.build | 4 +-
77
migration/meson.build | 10 +-
78
monitor/meson.build | 4 +-
79
net/can/meson.build | 2 +-
80
net/meson.build | 38 ++++----
81
qom/meson.build | 2 +-
82
replay/meson.build | 2 +-
83
softmmu/meson.build | 8 +-
84
stats/meson.build | 2 +-
85
target/alpha/meson.build | 6 +-
86
target/arm/hvf/meson.build | 2 +-
87
target/arm/meson.build | 6 +-
88
target/arm/tcg/meson.build | 2 +-
89
target/avr/meson.build | 6 +-
90
target/cris/meson.build | 6 +-
91
target/hppa/meson.build | 6 +-
92
target/i386/hax/meson.build | 6 +-
93
target/i386/hvf/meson.build | 2 +-
94
target/i386/kvm/meson.build | 4 +-
95
target/i386/meson.build | 8 +-
96
target/i386/nvmm/meson.build | 4 +-
97
target/i386/tcg/sysemu/meson.build | 2 +-
98
target/i386/whpx/meson.build | 2 +-
99
target/loongarch/meson.build | 6 +-
100
target/m68k/meson.build | 6 +-
101
target/microblaze/meson.build | 6 +-
102
target/mips/meson.build | 4 +-
103
target/mips/sysemu/meson.build | 2 +-
104
target/mips/tcg/sysemu/meson.build | 2 +-
105
target/nios2/meson.build | 6 +-
106
target/openrisc/meson.build | 6 +-
107
target/ppc/meson.build | 10 +-
108
target/riscv/meson.build | 6 +-
109
target/s390x/kvm/meson.build | 2 +-
110
target/s390x/meson.build | 6 +-
111
target/sh4/meson.build | 6 +-
112
target/sparc/meson.build | 6 +-
113
target/tricore/meson.build | 4 +-
114
target/xtensa/meson.build | 6 +-
115
tcg/meson.build | 2 +-
116
trace/meson.build | 2 +-
117
ui/meson.build | 26 ++---
118
101 files changed, 706 insertions(+), 706 deletions(-)
8
119
9
diff --git a/tcg/tci.c b/tcg/tci.c
120
diff --git a/docs/devel/build-system.rst b/docs/devel/build-system.rst
10
index XXXXXXX..XXXXXXX 100644
121
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/tci.c
122
--- a/docs/devel/build-system.rst
12
+++ b/tcg/tci.c
123
+++ b/docs/devel/build-system.rst
13
@@ -XXX,XX +XXX,XX @@ static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
124
@@ -XXX,XX +XXX,XX @@ Target-independent emulator sourcesets:
14
return regs[index];
125
This includes error handling infrastructure, standard data structures,
15
}
126
platform portability wrapper functions, etc.
16
127
17
-#if TCG_TARGET_REG_BITS == 64
128
- Target-independent code lives in the ``common_ss``, ``softmmu_ss`` and
18
-static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index)
129
+ Target-independent code lives in the ``common_ss``, ``system_ss`` and
19
-{
130
``user_ss`` sourcesets. ``common_ss`` is linked into all emulators,
20
- return (int32_t)tci_read_reg(regs, index);
131
- ``softmmu_ss`` only in system emulators, ``user_ss`` only in user-mode
21
-}
132
+ ``system_ss`` only in system emulators, ``user_ss`` only in user-mode
22
-#endif
133
emulators.
23
-
134
24
#if TCG_TARGET_REG_BITS == 64
135
Target-independent sourcesets must exercise particular care when using
25
static uint64_t tci_read_reg64(const tcg_target_ulong *regs, TCGReg index)
136
@@ -XXX,XX +XXX,XX @@ Target-independent emulator sourcesets:
26
{
137
symbol::
27
@@ -XXX,XX +XXX,XX @@ static uint64_t tci_read_r64(const tcg_target_ulong *regs,
138
28
return tci_uint64(tci_read_r(regs, tb_ptr), low);
139
# Some targets have CONFIG_ACPI, some don't, so this is not enough
29
}
140
- softmmu_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi.c'),
30
#elif TCG_TARGET_REG_BITS == 64
141
+ system_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi.c'),
31
-/* Read indexed register (32 bit signed) from bytecode. */
142
if_false: files('acpi-stub.c'))
32
-static int32_t tci_read_r32s(const tcg_target_ulong *regs,
143
33
- const uint8_t **tb_ptr)
144
# This is required as well:
34
-{
145
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c'))
35
- int32_t value = tci_read_reg32s(regs, **tb_ptr);
146
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c'))
36
- *tb_ptr += 1;
147
37
- return value;
148
Target-dependent emulator sourcesets:
38
-}
149
In the target-dependent set lives CPU emulation, some device emulation and
39
-
150
@@ -XXX,XX +XXX,XX @@ Target-dependent emulator sourcesets:
40
/* Read indexed register (64 bit) from bytecode. */
151
for all emulators and for system emulators only. For example::
41
static uint64_t tci_read_r64(const tcg_target_ulong *regs,
152
42
const uint8_t **tb_ptr)
153
arm_ss = ss.source_set()
43
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
154
- arm_softmmu_ss = ss.source_set()
44
#endif
155
+ arm_system_ss = ss.source_set()
45
case INDEX_op_ext_i32_i64:
156
...
46
t0 = *tb_ptr++;
157
target_arch += {'arm': arm_ss}
47
- t1 = tci_read_r32s(regs, &tb_ptr);
158
- target_softmmu_arch += {'arm': arm_softmmu_ss}
48
- tci_write_reg(regs, t0, t1);
159
+ target_softmmu_arch += {'arm': arm_system_ss}
49
+ t1 = tci_read_r(regs, &tb_ptr);
160
50
+ tci_write_reg(regs, t0, (int32_t)t1);
161
Module sourcesets:
51
break;
162
There are two dictionaries for modules: ``modules`` is used for
52
#if TCG_TARGET_HAS_ext32u_i64
163
target-independent modules and ``target_modules`` is used for
53
case INDEX_op_ext32u_i64:
164
target-dependent modules. When modules are disabled the ``module``
165
- source sets are added to ``softmmu_ss`` and the ``target_modules``
166
+ source sets are added to ``system_ss`` and the ``target_modules``
167
source sets are added to ``specific_ss``.
168
169
Both dictionaries are nested. One dictionary is created per
170
diff --git a/meson.build b/meson.build
171
index XXXXXXX..XXXXXXX 100644
172
--- a/meson.build
173
+++ b/meson.build
174
@@ -XXX,XX +XXX,XX @@ hwcore_ss = ss.source_set()
175
io_ss = ss.source_set()
176
qmp_ss = ss.source_set()
177
qom_ss = ss.source_set()
178
-softmmu_ss = ss.source_set()
179
+system_ss = ss.source_set()
180
specific_fuzz_ss = ss.source_set()
181
specific_ss = ss.source_set()
182
stub_ss = ss.source_set()
183
@@ -XXX,XX +XXX,XX @@ if have_block
184
# os-posix.c contains POSIX-specific functions used by qemu-storage-daemon,
185
# os-win32.c does not
186
blockdev_ss.add(when: 'CONFIG_POSIX', if_true: files('os-posix.c'))
187
- softmmu_ss.add(when: 'CONFIG_WIN32', if_true: [files('os-win32.c')])
188
+ system_ss.add(when: 'CONFIG_WIN32', if_true: [files('os-win32.c')])
189
endif
190
191
common_ss.add(files('cpus-common.c'))
192
@@ -XXX,XX +XXX,XX @@ foreach d, list : modules
193
if d == 'block'
194
block_ss.add_all(module_ss)
195
else
196
- softmmu_ss.add_all(module_ss)
197
+ system_ss.add_all(module_ss)
198
endif
199
endif
200
endforeach
201
@@ -XXX,XX +XXX,XX @@ libmigration = static_library('migration', sources: migration_files + genh,
202
build_by_default: false)
203
migration = declare_dependency(link_with: libmigration,
204
dependencies: [zlib, qom, io])
205
-softmmu_ss.add(migration)
206
+system_ss.add(migration)
207
208
block_ss = block_ss.apply(config_host, strict: false)
209
libblock = static_library('block', block_ss.sources() + genh,
210
@@ -XXX,XX +XXX,XX @@ if emulator_modules.length() > 0
211
alias_target('modules', emulator_modules)
212
endif
213
214
-softmmu_ss.add(authz, blockdev, chardev, crypto, io, qmp)
215
+system_ss.add(authz, blockdev, chardev, crypto, io, qmp)
216
common_ss.add(qom, qemuutil)
217
218
-common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [softmmu_ss])
219
+common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [system_ss])
220
common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
221
222
common_all = common_ss.apply(config_all, strict: false)
223
diff --git a/accel/meson.build b/accel/meson.build
224
index XXXXXXX..XXXXXXX 100644
225
--- a/accel/meson.build
226
+++ b/accel/meson.build
227
@@ -XXX,XX +XXX,XX @@
228
specific_ss.add(files('accel-common.c', 'accel-blocker.c'))
229
-softmmu_ss.add(files('accel-softmmu.c'))
230
+system_ss.add(files('accel-softmmu.c'))
231
user_ss.add(files('accel-user.c'))
232
233
subdir('tcg')
234
@@ -XXX,XX +XXX,XX @@ if have_system
235
endif
236
237
# qtest
238
-softmmu_ss.add(files('dummy-cpus.c'))
239
+system_ss.add(files('dummy-cpus.c'))
240
diff --git a/audio/meson.build b/audio/meson.build
241
index XXXXXXX..XXXXXXX 100644
242
--- a/audio/meson.build
243
+++ b/audio/meson.build
244
@@ -XXX,XX +XXX,XX @@
245
-softmmu_ss.add([spice_headers, files('audio.c')])
246
-softmmu_ss.add(files(
247
+system_ss.add([spice_headers, files('audio.c')])
248
+system_ss.add(files(
249
'audio-hmp-cmds.c',
250
'audio_legacy.c',
251
'mixeng.c',
252
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
253
'wavcapture.c',
254
))
255
256
-softmmu_ss.add(when: coreaudio, if_true: files('coreaudio.m'))
257
-softmmu_ss.add(when: dsound, if_true: files('dsoundaudio.c', 'audio_win_int.c'))
258
+system_ss.add(when: coreaudio, if_true: files('coreaudio.m'))
259
+system_ss.add(when: dsound, if_true: files('dsoundaudio.c', 'audio_win_int.c'))
260
261
audio_modules = {}
262
foreach m : [
263
diff --git a/backends/meson.build b/backends/meson.build
264
index XXXXXXX..XXXXXXX 100644
265
--- a/backends/meson.build
266
+++ b/backends/meson.build
267
@@ -XXX,XX +XXX,XX @@
268
-softmmu_ss.add([files(
269
+system_ss.add([files(
270
'cryptodev-builtin.c',
271
'cryptodev-hmp-cmds.c',
272
'cryptodev.c',
273
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add([files(
274
'confidential-guest-support.c',
275
), numa])
276
277
-softmmu_ss.add(when: 'CONFIG_POSIX', if_true: files('rng-random.c'))
278
-softmmu_ss.add(when: 'CONFIG_POSIX', if_true: files('hostmem-file.c'))
279
-softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-memfd.c'))
280
+system_ss.add(when: 'CONFIG_POSIX', if_true: files('rng-random.c'))
281
+system_ss.add(when: 'CONFIG_POSIX', if_true: files('hostmem-file.c'))
282
+system_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-memfd.c'))
283
if keyutils.found()
284
- softmmu_ss.add(keyutils, files('cryptodev-lkcf.c'))
285
+ system_ss.add(keyutils, files('cryptodev-lkcf.c'))
286
endif
287
if have_vhost_user
288
- softmmu_ss.add(when: 'CONFIG_VIRTIO', if_true: files('vhost-user.c'))
289
+ system_ss.add(when: 'CONFIG_VIRTIO', if_true: files('vhost-user.c'))
290
endif
291
-softmmu_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost.c'))
292
+system_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost.c'))
293
if have_vhost_user_crypto
294
- softmmu_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost-user.c'))
295
+ system_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost-user.c'))
296
endif
297
-softmmu_ss.add(when: gio, if_true: files('dbus-vmstate.c'))
298
-softmmu_ss.add(when: 'CONFIG_SGX', if_true: files('hostmem-epc.c'))
299
+system_ss.add(when: gio, if_true: files('dbus-vmstate.c'))
300
+system_ss.add(when: 'CONFIG_SGX', if_true: files('hostmem-epc.c'))
301
302
subdir('tpm')
303
diff --git a/backends/tpm/meson.build b/backends/tpm/meson.build
304
index XXXXXXX..XXXXXXX 100644
305
--- a/backends/tpm/meson.build
306
+++ b/backends/tpm/meson.build
307
@@ -XXX,XX +XXX,XX @@
308
if have_tpm
309
- softmmu_ss.add(files('tpm_backend.c'))
310
- softmmu_ss.add(files('tpm_util.c'))
311
- softmmu_ss.add(when: 'CONFIG_TPM_PASSTHROUGH', if_true: files('tpm_passthrough.c'))
312
- softmmu_ss.add(when: 'CONFIG_TPM_EMULATOR', if_true: files('tpm_emulator.c'))
313
+ system_ss.add(files('tpm_backend.c'))
314
+ system_ss.add(files('tpm_util.c'))
315
+ system_ss.add(when: 'CONFIG_TPM_PASSTHROUGH', if_true: files('tpm_passthrough.c'))
316
+ system_ss.add(when: 'CONFIG_TPM_EMULATOR', if_true: files('tpm_emulator.c'))
317
endif
318
diff --git a/block/meson.build b/block/meson.build
319
index XXXXXXX..XXXXXXX 100644
320
--- a/block/meson.build
321
+++ b/block/meson.build
322
@@ -XXX,XX +XXX,XX @@ block_ss.add(files(
323
'write-threshold.c',
324
), zstd, zlib, gnutls)
325
326
-softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('blkreplay.c'))
327
-softmmu_ss.add(files('block-ram-registrar.c'))
328
+system_ss.add(when: 'CONFIG_TCG', if_true: files('blkreplay.c'))
329
+system_ss.add(files('block-ram-registrar.c'))
330
331
if get_option('qcow1').allowed()
332
block_ss.add(files('qcow.c'))
333
@@ -XXX,XX +XXX,XX @@ block_ss.add(block_gen_c)
334
335
block_ss.add(files('stream.c'))
336
337
-softmmu_ss.add(files('qapi-sysemu.c'))
338
+system_ss.add(files('qapi-sysemu.c'))
339
340
subdir('export')
341
subdir('monitor')
342
diff --git a/block/monitor/meson.build b/block/monitor/meson.build
343
index XXXXXXX..XXXXXXX 100644
344
--- a/block/monitor/meson.build
345
+++ b/block/monitor/meson.build
346
@@ -XXX,XX +XXX,XX @@
347
-softmmu_ss.add(files('block-hmp-cmds.c'))
348
+system_ss.add(files('block-hmp-cmds.c'))
349
block_ss.add(files('bitmap-qmp-cmds.c'))
350
diff --git a/chardev/meson.build b/chardev/meson.build
351
index XXXXXXX..XXXXXXX 100644
352
--- a/chardev/meson.build
353
+++ b/chardev/meson.build
354
@@ -XXX,XX +XXX,XX @@ chardev_ss.add(when: 'CONFIG_WIN32', if_true: files(
355
356
chardev_ss = chardev_ss.apply(config_host, strict: false)
357
358
-softmmu_ss.add(files(
359
+system_ss.add(files(
360
'char-hmp-cmds.c',
361
'msmouse.c',
362
'wctablet.c',
363
diff --git a/disas/meson.build b/disas/meson.build
364
index XXXXXXX..XXXXXXX 100644
365
--- a/disas/meson.build
366
+++ b/disas/meson.build
367
@@ -XXX,XX +XXX,XX @@ common_ss.add(when: 'CONFIG_XTENSA_DIS', if_true: files('xtensa.c'))
368
common_ss.add(when: capstone, if_true: [files('capstone.c'), capstone])
369
common_ss.add(files('disas.c'))
370
371
-softmmu_ss.add(files('disas-mon.c'))
372
+system_ss.add(files('disas-mon.c'))
373
specific_ss.add(capstone)
374
diff --git a/dump/meson.build b/dump/meson.build
375
index XXXXXXX..XXXXXXX 100644
376
--- a/dump/meson.build
377
+++ b/dump/meson.build
378
@@ -XXX,XX +XXX,XX @@
379
-softmmu_ss.add([files('dump.c', 'dump-hmp-cmds.c'), snappy, lzo])
380
+system_ss.add([files('dump.c', 'dump-hmp-cmds.c'), snappy, lzo])
381
specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: files('win_dump.c'))
382
diff --git a/ebpf/meson.build b/ebpf/meson.build
383
index XXXXXXX..XXXXXXX 100644
384
--- a/ebpf/meson.build
385
+++ b/ebpf/meson.build
386
@@ -1 +1 @@
387
-softmmu_ss.add(when: libbpf, if_true: files('ebpf_rss.c'), if_false: files('ebpf_rss-stub.c'))
388
+system_ss.add(when: libbpf, if_true: files('ebpf_rss.c'), if_false: files('ebpf_rss-stub.c'))
389
diff --git a/fsdev/meson.build b/fsdev/meson.build
390
index XXXXXXX..XXXXXXX 100644
391
--- a/fsdev/meson.build
392
+++ b/fsdev/meson.build
393
@@ -XXX,XX +XXX,XX @@ fsdev_ss.add(when: ['CONFIG_FSDEV_9P'], if_true: files(
394
'9p-marshal.c',
395
'qemu-fsdev.c',
396
), if_false: files('qemu-fsdev-dummy.c'))
397
-softmmu_ss.add_all(when: 'CONFIG_LINUX', if_true: fsdev_ss)
398
-softmmu_ss.add_all(when: 'CONFIG_DARWIN', if_true: fsdev_ss)
399
+system_ss.add_all(when: 'CONFIG_LINUX', if_true: fsdev_ss)
400
+system_ss.add_all(when: 'CONFIG_DARWIN', if_true: fsdev_ss)
401
402
if have_virtfs_proxy_helper
403
executable('virtfs-proxy-helper',
404
diff --git a/gdbstub/meson.build b/gdbstub/meson.build
405
index XXXXXXX..XXXXXXX 100644
406
--- a/gdbstub/meson.build
407
+++ b/gdbstub/meson.build
408
@@ -XXX,XX +XXX,XX @@
409
# cflags so:
410
411
gdb_user_ss = ss.source_set()
412
-gdb_softmmu_ss = ss.source_set()
413
+gdb_system_ss = ss.source_set()
414
415
# We build two versions of gdbstub, one for each mode
416
gdb_user_ss.add(files('gdbstub.c', 'user.c'))
417
-gdb_softmmu_ss.add(files('gdbstub.c', 'softmmu.c'))
418
+gdb_system_ss.add(files('gdbstub.c', 'softmmu.c'))
419
420
gdb_user_ss = gdb_user_ss.apply(config_host, strict: false)
421
-gdb_softmmu_ss = gdb_softmmu_ss.apply(config_host, strict: false)
422
+gdb_system_ss = gdb_system_ss.apply(config_host, strict: false)
423
424
libgdb_user = static_library('gdb_user',
425
gdb_user_ss.sources() + genh,
426
@@ -XXX,XX +XXX,XX @@ libgdb_user = static_library('gdb_user',
427
build_by_default: have_user)
428
429
libgdb_softmmu = static_library('gdb_softmmu',
430
- gdb_softmmu_ss.sources() + genh,
431
+ gdb_system_ss.sources() + genh,
432
name_suffix: 'fa',
433
build_by_default: have_system)
434
435
gdb_user = declare_dependency(link_whole: libgdb_user)
436
user_ss.add(gdb_user)
437
gdb_softmmu = declare_dependency(link_whole: libgdb_softmmu)
438
-softmmu_ss.add(gdb_softmmu)
439
+system_ss.add(gdb_softmmu)
440
441
common_ss.add(files('syscalls.c'))
442
443
diff --git a/hw/9pfs/meson.build b/hw/9pfs/meson.build
444
index XXXXXXX..XXXXXXX 100644
445
--- a/hw/9pfs/meson.build
446
+++ b/hw/9pfs/meson.build
447
@@ -XXX,XX +XXX,XX @@ fs_ss.add(files(
448
fs_ss.add(when: 'CONFIG_LINUX', if_true: files('9p-util-linux.c'))
449
fs_ss.add(when: 'CONFIG_DARWIN', if_true: files('9p-util-darwin.c'))
450
fs_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-9p-backend.c'))
451
-softmmu_ss.add_all(when: 'CONFIG_FSDEV_9P', if_true: fs_ss)
452
+system_ss.add_all(when: 'CONFIG_FSDEV_9P', if_true: fs_ss)
453
454
specific_ss.add(when: 'CONFIG_VIRTIO_9P', if_true: files('virtio-9p-device.c'))
455
diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
456
index XXXXXXX..XXXXXXX 100644
457
--- a/hw/acpi/meson.build
458
+++ b/hw/acpi/meson.build
459
@@ -XXX,XX +XXX,XX @@ acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
460
if have_tpm
461
acpi_ss.add(files('tpm.c'))
462
endif
463
-softmmu_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c'))
464
-softmmu_ss.add(when: 'CONFIG_ACPI_PCI_BRIDGE', if_false: files('pci-bridge-stub.c'))
465
-softmmu_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss)
466
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 'aml-build-stub.c',
467
+system_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c'))
468
+system_ss.add(when: 'CONFIG_ACPI_PCI_BRIDGE', if_false: files('pci-bridge-stub.c'))
469
+system_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss)
470
+system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 'aml-build-stub.c',
471
'acpi-x86-stub.c', 'ipmi-stub.c', 'ghes-stub.c',
472
'acpi-mem-hotplug-stub.c', 'acpi-cpu-hotplug-stub.c',
473
'acpi-pci-hotplug-stub.c', 'acpi-nvdimm-stub.c',
474
'cxl-stub.c', 'pci-bridge-stub.c'))
475
-softmmu_ss.add(files('acpi-qmp-cmds.c'))
476
+system_ss.add(files('acpi-qmp-cmds.c'))
477
diff --git a/hw/adc/meson.build b/hw/adc/meson.build
478
index XXXXXXX..XXXXXXX 100644
479
--- a/hw/adc/meson.build
480
+++ b/hw/adc/meson.build
481
@@ -XXX,XX +XXX,XX @@
482
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_ADC', if_true: files('stm32f2xx_adc.c'))
483
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_adc.c'))
484
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_adc.c'))
485
-softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq-xadc.c'))
486
-softmmu_ss.add(when: 'CONFIG_MAX111X', if_true: files('max111x.c'))
487
+system_ss.add(when: 'CONFIG_STM32F2XX_ADC', if_true: files('stm32f2xx_adc.c'))
488
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_adc.c'))
489
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_adc.c'))
490
+system_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq-xadc.c'))
491
+system_ss.add(when: 'CONFIG_MAX111X', if_true: files('max111x.c'))
492
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
493
index XXXXXXX..XXXXXXX 100644
494
--- a/hw/arm/meson.build
495
+++ b/hw/arm/meson.build
496
@@ -XXX,XX +XXX,XX @@ arm_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
497
arm_ss.add(when: 'CONFIG_XEN', if_true: files('xen_arm.c'))
498
arm_ss.add_all(xen_ss)
499
500
-softmmu_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
501
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
502
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
503
-softmmu_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
504
+system_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
505
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
506
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
507
+system_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
508
509
hw_arch += {'arm': arm_ss}
510
diff --git a/hw/audio/meson.build b/hw/audio/meson.build
511
index XXXXXXX..XXXXXXX 100644
512
--- a/hw/audio/meson.build
513
+++ b/hw/audio/meson.build
514
@@ -XXX,XX +XXX,XX @@
515
-softmmu_ss.add(files('soundhw.c'))
516
-softmmu_ss.add(when: 'CONFIG_AC97', if_true: files('ac97.c'))
517
-softmmu_ss.add(when: 'CONFIG_ADLIB', if_true: files('fmopl.c', 'adlib.c'))
518
-softmmu_ss.add(when: 'CONFIG_CS4231', if_true: files('cs4231.c'))
519
-softmmu_ss.add(when: 'CONFIG_CS4231A', if_true: files('cs4231a.c'))
520
-softmmu_ss.add(when: 'CONFIG_ES1370', if_true: files('es1370.c'))
521
-softmmu_ss.add(when: 'CONFIG_GUS', if_true: files('gus.c', 'gusemu_hal.c', 'gusemu_mixer.c'))
522
-softmmu_ss.add(when: 'CONFIG_HDA', if_true: files('intel-hda.c', 'hda-codec.c'))
523
-softmmu_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('marvell_88w8618.c'))
524
-softmmu_ss.add(when: 'CONFIG_PCSPK', if_true: files('pcspk.c'))
525
-softmmu_ss.add(when: 'CONFIG_PL041', if_true: files('pl041.c', 'lm4549.c'))
526
-softmmu_ss.add(when: 'CONFIG_SB16', if_true: files('sb16.c'))
527
-softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('via-ac97.c'))
528
-softmmu_ss.add(when: 'CONFIG_WM8750', if_true: files('wm8750.c'))
529
+system_ss.add(files('soundhw.c'))
530
+system_ss.add(when: 'CONFIG_AC97', if_true: files('ac97.c'))
531
+system_ss.add(when: 'CONFIG_ADLIB', if_true: files('fmopl.c', 'adlib.c'))
532
+system_ss.add(when: 'CONFIG_CS4231', if_true: files('cs4231.c'))
533
+system_ss.add(when: 'CONFIG_CS4231A', if_true: files('cs4231a.c'))
534
+system_ss.add(when: 'CONFIG_ES1370', if_true: files('es1370.c'))
535
+system_ss.add(when: 'CONFIG_GUS', if_true: files('gus.c', 'gusemu_hal.c', 'gusemu_mixer.c'))
536
+system_ss.add(when: 'CONFIG_HDA', if_true: files('intel-hda.c', 'hda-codec.c'))
537
+system_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('marvell_88w8618.c'))
538
+system_ss.add(when: 'CONFIG_PCSPK', if_true: files('pcspk.c'))
539
+system_ss.add(when: 'CONFIG_PL041', if_true: files('pl041.c', 'lm4549.c'))
540
+system_ss.add(when: 'CONFIG_SB16', if_true: files('sb16.c'))
541
+system_ss.add(when: 'CONFIG_VT82C686', if_true: files('via-ac97.c'))
542
+system_ss.add(when: 'CONFIG_WM8750', if_true: files('wm8750.c'))
543
diff --git a/hw/block/meson.build b/hw/block/meson.build
544
index XXXXXXX..XXXXXXX 100644
545
--- a/hw/block/meson.build
546
+++ b/hw/block/meson.build
547
@@ -XXX,XX +XXX,XX @@
548
-softmmu_ss.add(files(
549
+system_ss.add(files(
550
'block.c',
551
'cdrom.c',
552
'hd-geometry.c'
553
))
554
-softmmu_ss.add(when: 'CONFIG_ECC', if_true: files('ecc.c'))
555
-softmmu_ss.add(when: 'CONFIG_FDC', if_true: files('fdc.c'))
556
-softmmu_ss.add(when: 'CONFIG_FDC_ISA', if_true: files('fdc-isa.c'))
557
-softmmu_ss.add(when: 'CONFIG_FDC_SYSBUS', if_true: files('fdc-sysbus.c'))
558
-softmmu_ss.add(when: 'CONFIG_NAND', if_true: files('nand.c'))
559
-softmmu_ss.add(when: 'CONFIG_ONENAND', if_true: files('onenand.c'))
560
-softmmu_ss.add(when: 'CONFIG_PFLASH_CFI01', if_true: files('pflash_cfi01.c'))
561
-softmmu_ss.add(when: 'CONFIG_PFLASH_CFI02', if_true: files('pflash_cfi02.c'))
562
-softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
563
-softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80_sfdp.c'))
564
-softmmu_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
565
-softmmu_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-block.c'))
566
-softmmu_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
567
+system_ss.add(when: 'CONFIG_ECC', if_true: files('ecc.c'))
568
+system_ss.add(when: 'CONFIG_FDC', if_true: files('fdc.c'))
569
+system_ss.add(when: 'CONFIG_FDC_ISA', if_true: files('fdc-isa.c'))
570
+system_ss.add(when: 'CONFIG_FDC_SYSBUS', if_true: files('fdc-sysbus.c'))
571
+system_ss.add(when: 'CONFIG_NAND', if_true: files('nand.c'))
572
+system_ss.add(when: 'CONFIG_ONENAND', if_true: files('onenand.c'))
573
+system_ss.add(when: 'CONFIG_PFLASH_CFI01', if_true: files('pflash_cfi01.c'))
574
+system_ss.add(when: 'CONFIG_PFLASH_CFI02', if_true: files('pflash_cfi02.c'))
575
+system_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
576
+system_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80_sfdp.c'))
577
+system_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
578
+system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-block.c'))
579
+system_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
580
581
specific_ss.add(when: 'CONFIG_VIRTIO_BLK', if_true: files('virtio-blk.c', 'virtio-blk-common.c'))
582
specific_ss.add(when: 'CONFIG_VHOST_USER_BLK', if_true: files('vhost-user-blk.c', 'virtio-blk-common.c'))
583
diff --git a/hw/char/meson.build b/hw/char/meson.build
584
index XXXXXXX..XXXXXXX 100644
585
--- a/hw/char/meson.build
586
+++ b/hw/char/meson.build
587
@@ -XXX,XX +XXX,XX @@
588
-softmmu_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_uart.c'))
589
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_UART', if_true: files('cmsdk-apb-uart.c'))
590
-softmmu_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c'))
591
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_ser.c'))
592
-softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c'))
593
-softmmu_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c'))
594
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c'))
595
-softmmu_ss.add(when: 'CONFIG_IPACK', if_true: files('ipoctal232.c'))
596
-softmmu_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c'))
597
-softmmu_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c'))
598
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_uart.c'))
599
-softmmu_ss.add(when: 'CONFIG_PARALLEL', if_true: files('parallel.c'))
600
-softmmu_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c'))
601
-softmmu_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c'))
602
-softmmu_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c'))
603
-softmmu_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c'))
604
-softmmu_ss.add(when: 'CONFIG_SERIAL_PCI', if_true: files('serial-pci.c'))
605
-softmmu_ss.add(when: 'CONFIG_SERIAL_PCI_MULTI', if_true: files('serial-pci-multi.c'))
606
-softmmu_ss.add(when: 'CONFIG_SHAKTI_UART', if_true: files('shakti_uart.c'))
607
-softmmu_ss.add(when: 'CONFIG_VIRTIO_SERIAL', if_true: files('virtio-console.c'))
608
-softmmu_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen_console.c'))
609
-softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_uartlite.c'))
610
+system_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_uart.c'))
611
+system_ss.add(when: 'CONFIG_CMSDK_APB_UART', if_true: files('cmsdk-apb-uart.c'))
612
+system_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c'))
613
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_ser.c'))
614
+system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c'))
615
+system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c'))
616
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c'))
617
+system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipoctal232.c'))
618
+system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c'))
619
+system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c'))
620
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_uart.c'))
621
+system_ss.add(when: 'CONFIG_PARALLEL', if_true: files('parallel.c'))
622
+system_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c'))
623
+system_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c'))
624
+system_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c'))
625
+system_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c'))
626
+system_ss.add(when: 'CONFIG_SERIAL_PCI', if_true: files('serial-pci.c'))
627
+system_ss.add(when: 'CONFIG_SERIAL_PCI_MULTI', if_true: files('serial-pci-multi.c'))
628
+system_ss.add(when: 'CONFIG_SHAKTI_UART', if_true: files('shakti_uart.c'))
629
+system_ss.add(when: 'CONFIG_VIRTIO_SERIAL', if_true: files('virtio-console.c'))
630
+system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen_console.c'))
631
+system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_uartlite.c'))
632
633
-softmmu_ss.add(when: 'CONFIG_AVR_USART', if_true: files('avr_usart.c'))
634
-softmmu_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_uart.c'))
635
-softmmu_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-uart.c'))
636
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_uart.c'))
637
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_uart.c'))
638
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_aux.c'))
639
-softmmu_ss.add(when: 'CONFIG_RENESAS_SCI', if_true: files('renesas_sci.c'))
640
-softmmu_ss.add(when: 'CONFIG_SIFIVE_UART', if_true: files('sifive_uart.c'))
641
-softmmu_ss.add(when: 'CONFIG_SH_SCI', if_true: files('sh_serial.c'))
642
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true: files('stm32f2xx_usart.c'))
643
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true: files('mchp_pfsoc_mmuart.c'))
644
-softmmu_ss.add(when: 'CONFIG_HTIF', if_true: files('riscv_htif.c'))
645
-softmmu_ss.add(when: 'CONFIG_GOLDFISH_TTY', if_true: files('goldfish_tty.c'))
646
+system_ss.add(when: 'CONFIG_AVR_USART', if_true: files('avr_usart.c'))
647
+system_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_uart.c'))
648
+system_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-uart.c'))
649
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_uart.c'))
650
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_uart.c'))
651
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_aux.c'))
652
+system_ss.add(when: 'CONFIG_RENESAS_SCI', if_true: files('renesas_sci.c'))
653
+system_ss.add(when: 'CONFIG_SIFIVE_UART', if_true: files('sifive_uart.c'))
654
+system_ss.add(when: 'CONFIG_SH_SCI', if_true: files('sh_serial.c'))
655
+system_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true: files('stm32f2xx_usart.c'))
656
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true: files('mchp_pfsoc_mmuart.c'))
657
+system_ss.add(when: 'CONFIG_HTIF', if_true: files('riscv_htif.c'))
658
+system_ss.add(when: 'CONFIG_GOLDFISH_TTY', if_true: files('goldfish_tty.c'))
659
660
specific_ss.add(when: 'CONFIG_TERMINAL3270', if_true: files('terminal3270.c'))
661
specific_ss.add(when: 'CONFIG_VIRTIO', if_true: files('virtio-serial-bus.c'))
662
diff --git a/hw/core/meson.build b/hw/core/meson.build
663
index XXXXXXX..XXXXXXX 100644
664
--- a/hw/core/meson.build
665
+++ b/hw/core/meson.build
666
@@ -XXX,XX +XXX,XX @@ endif
667
668
common_ss.add(files('cpu-common.c'))
669
common_ss.add(files('machine-smp.c'))
670
-softmmu_ss.add(when: 'CONFIG_FITLOADER', if_true: files('loader-fit.c'))
671
-softmmu_ss.add(when: 'CONFIG_GENERIC_LOADER', if_true: files('generic-loader.c'))
672
-softmmu_ss.add(when: ['CONFIG_GUEST_LOADER', fdt], if_true: files('guest-loader.c'))
673
-softmmu_ss.add(when: 'CONFIG_OR_IRQ', if_true: files('or-irq.c'))
674
-softmmu_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('platform-bus.c'))
675
-softmmu_ss.add(when: 'CONFIG_PTIMER', if_true: files('ptimer.c'))
676
-softmmu_ss.add(when: 'CONFIG_REGISTER', if_true: files('register.c'))
677
-softmmu_ss.add(when: 'CONFIG_SPLIT_IRQ', if_true: files('split-irq.c'))
678
-softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('stream.c'))
679
-softmmu_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c'))
680
+system_ss.add(when: 'CONFIG_FITLOADER', if_true: files('loader-fit.c'))
681
+system_ss.add(when: 'CONFIG_GENERIC_LOADER', if_true: files('generic-loader.c'))
682
+system_ss.add(when: ['CONFIG_GUEST_LOADER', fdt], if_true: files('guest-loader.c'))
683
+system_ss.add(when: 'CONFIG_OR_IRQ', if_true: files('or-irq.c'))
684
+system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('platform-bus.c'))
685
+system_ss.add(when: 'CONFIG_PTIMER', if_true: files('ptimer.c'))
686
+system_ss.add(when: 'CONFIG_REGISTER', if_true: files('register.c'))
687
+system_ss.add(when: 'CONFIG_SPLIT_IRQ', if_true: files('split-irq.c'))
688
+system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('stream.c'))
689
+system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c'))
690
691
-softmmu_ss.add(files(
692
+system_ss.add(files(
693
'cpu-sysemu.c',
694
'fw-path-provider.c',
695
'gpio.c',
696
diff --git a/hw/cpu/meson.build b/hw/cpu/meson.build
697
index XXXXXXX..XXXXXXX 100644
698
--- a/hw/cpu/meson.build
699
+++ b/hw/cpu/meson.build
700
@@ -XXX,XX +XXX,XX @@
701
-softmmu_ss.add(files('core.c', 'cluster.c'))
702
+system_ss.add(files('core.c', 'cluster.c'))
703
704
-softmmu_ss.add(when: 'CONFIG_ARM11MPCORE', if_true: files('arm11mpcore.c'))
705
-softmmu_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_mpcore.c'))
706
+system_ss.add(when: 'CONFIG_ARM11MPCORE', if_true: files('arm11mpcore.c'))
707
+system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_mpcore.c'))
708
specific_ss.add(when: 'CONFIG_A9MPCORE', if_true: files('a9mpcore.c'))
709
specific_ss.add(when: 'CONFIG_A15MPCORE', if_true: files('a15mpcore.c'))
710
diff --git a/hw/cxl/meson.build b/hw/cxl/meson.build
711
index XXXXXXX..XXXXXXX 100644
712
--- a/hw/cxl/meson.build
713
+++ b/hw/cxl/meson.build
714
@@ -XXX,XX +XXX,XX @@
715
-softmmu_ss.add(when: 'CONFIG_CXL',
716
+system_ss.add(when: 'CONFIG_CXL',
717
if_true: files(
718
'cxl-component-utils.c',
719
'cxl-device-utils.c',
720
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_CXL',
721
'cxl-host-stubs.c',
722
))
723
724
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c'))
725
+system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c'))
726
diff --git a/hw/display/meson.build b/hw/display/meson.build
727
index XXXXXXX..XXXXXXX 100644
728
--- a/hw/display/meson.build
729
+++ b/hw/display/meson.build
730
@@ -XXX,XX +XXX,XX @@
731
hw_display_modules = {}
732
733
-softmmu_ss.add(when: 'CONFIG_DDC', if_true: files('i2c-ddc.c'))
734
-softmmu_ss.add(when: 'CONFIG_EDID', if_true: files('edid-generate.c', 'edid-region.c'))
735
+system_ss.add(when: 'CONFIG_DDC', if_true: files('i2c-ddc.c'))
736
+system_ss.add(when: 'CONFIG_EDID', if_true: files('edid-generate.c', 'edid-region.c'))
737
738
-softmmu_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb.c'))
739
-softmmu_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb-standalone.c'))
740
+system_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb.c'))
741
+system_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb-standalone.c'))
742
743
-softmmu_ss.add(when: 'CONFIG_VGA_CIRRUS', if_true: files('cirrus_vga.c'))
744
-softmmu_ss.add(when: ['CONFIG_VGA_CIRRUS', 'CONFIG_VGA_ISA'], if_true: files('cirrus_vga_isa.c'))
745
-softmmu_ss.add(when: 'CONFIG_G364FB', if_true: files('g364fb.c'))
746
-softmmu_ss.add(when: 'CONFIG_JAZZ_LED', if_true: files('jazz_led.c'))
747
-softmmu_ss.add(when: 'CONFIG_PL110', if_true: files('pl110.c'))
748
-softmmu_ss.add(when: 'CONFIG_SII9022', if_true: files('sii9022.c'))
749
-softmmu_ss.add(when: 'CONFIG_SSD0303', if_true: files('ssd0303.c'))
750
-softmmu_ss.add(when: 'CONFIG_SSD0323', if_true: files('ssd0323.c'))
751
-softmmu_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xenfb.c'))
752
+system_ss.add(when: 'CONFIG_VGA_CIRRUS', if_true: files('cirrus_vga.c'))
753
+system_ss.add(when: ['CONFIG_VGA_CIRRUS', 'CONFIG_VGA_ISA'], if_true: files('cirrus_vga_isa.c'))
754
+system_ss.add(when: 'CONFIG_G364FB', if_true: files('g364fb.c'))
755
+system_ss.add(when: 'CONFIG_JAZZ_LED', if_true: files('jazz_led.c'))
756
+system_ss.add(when: 'CONFIG_PL110', if_true: files('pl110.c'))
757
+system_ss.add(when: 'CONFIG_SII9022', if_true: files('sii9022.c'))
758
+system_ss.add(when: 'CONFIG_SSD0303', if_true: files('ssd0303.c'))
759
+system_ss.add(when: 'CONFIG_SSD0323', if_true: files('ssd0323.c'))
760
+system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xenfb.c'))
761
762
-softmmu_ss.add(when: 'CONFIG_VGA_PCI', if_true: files('vga-pci.c'))
763
-softmmu_ss.add(when: 'CONFIG_VGA_ISA', if_true: files('vga-isa.c'))
764
-softmmu_ss.add(when: 'CONFIG_VGA_MMIO', if_true: files('vga-mmio.c'))
765
-softmmu_ss.add(when: 'CONFIG_VMWARE_VGA', if_true: files('vmware_vga.c'))
766
-softmmu_ss.add(when: 'CONFIG_BOCHS_DISPLAY', if_true: files('bochs-display.c'))
767
+system_ss.add(when: 'CONFIG_VGA_PCI', if_true: files('vga-pci.c'))
768
+system_ss.add(when: 'CONFIG_VGA_ISA', if_true: files('vga-isa.c'))
769
+system_ss.add(when: 'CONFIG_VGA_MMIO', if_true: files('vga-mmio.c'))
770
+system_ss.add(when: 'CONFIG_VMWARE_VGA', if_true: files('vmware_vga.c'))
771
+system_ss.add(when: 'CONFIG_BOCHS_DISPLAY', if_true: files('bochs-display.c'))
772
773
-softmmu_ss.add(when: 'CONFIG_BLIZZARD', if_true: files('blizzard.c'))
774
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_fimd.c'))
775
-softmmu_ss.add(when: 'CONFIG_FRAMEBUFFER', if_true: files('framebuffer.c'))
776
-softmmu_ss.add(when: 'CONFIG_ZAURUS', if_true: files('tc6393xb.c'))
777
+system_ss.add(when: 'CONFIG_BLIZZARD', if_true: files('blizzard.c'))
778
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_fimd.c'))
779
+system_ss.add(when: 'CONFIG_FRAMEBUFFER', if_true: files('framebuffer.c'))
780
+system_ss.add(when: 'CONFIG_ZAURUS', if_true: files('tc6393xb.c'))
781
782
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dss.c'))
783
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_lcd.c'))
784
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_fb.c'))
785
-softmmu_ss.add(when: 'CONFIG_SM501', if_true: files('sm501.c'))
786
-softmmu_ss.add(when: 'CONFIG_TCX', if_true: files('tcx.c'))
787
-softmmu_ss.add(when: 'CONFIG_CG3', if_true: files('cg3.c'))
788
-softmmu_ss.add(when: 'CONFIG_MACFB', if_true: files('macfb.c'))
789
-softmmu_ss.add(when: 'CONFIG_NEXTCUBE', if_true: files('next-fb.c'))
790
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dss.c'))
791
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_lcd.c'))
792
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_fb.c'))
793
+system_ss.add(when: 'CONFIG_SM501', if_true: files('sm501.c'))
794
+system_ss.add(when: 'CONFIG_TCX', if_true: files('tcx.c'))
795
+system_ss.add(when: 'CONFIG_CG3', if_true: files('cg3.c'))
796
+system_ss.add(when: 'CONFIG_MACFB', if_true: files('macfb.c'))
797
+system_ss.add(when: 'CONFIG_NEXTCUBE', if_true: files('next-fb.c'))
798
799
-softmmu_ss.add(when: 'CONFIG_VGA', if_true: files('vga.c'))
800
+system_ss.add(when: 'CONFIG_VGA', if_true: files('vga.c'))
801
802
if (config_all_devices.has_key('CONFIG_VGA_CIRRUS') or
803
config_all_devices.has_key('CONFIG_VGA_PCI') or
804
config_all_devices.has_key('CONFIG_VMWARE_VGA') or
805
config_all_devices.has_key('CONFIG_ATI_VGA')
806
)
807
- softmmu_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
808
+ system_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
809
if_false: files('acpi-vga-stub.c'))
810
endif
811
812
@@ -XXX,XX +XXX,XX @@ if config_all_devices.has_key('CONFIG_QXL')
813
hw_display_modules += {'qxl': qxl_ss}
814
endif
815
816
-softmmu_ss.add(when: 'CONFIG_DPCD', if_true: files('dpcd.c'))
817
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dp.c'))
818
+system_ss.add(when: 'CONFIG_DPCD', if_true: files('dpcd.c'))
819
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dp.c'))
820
821
-softmmu_ss.add(when: 'CONFIG_ARTIST', if_true: files('artist.c'))
822
+system_ss.add(when: 'CONFIG_ARTIST', if_true: files('artist.c'))
823
824
-softmmu_ss.add(when: [pixman, 'CONFIG_ATI_VGA'], if_true: files('ati.c', 'ati_2d.c', 'ati_dbg.c'))
825
+system_ss.add(when: [pixman, 'CONFIG_ATI_VGA'], if_true: files('ati.c', 'ati_2d.c', 'ati_dbg.c'))
826
827
828
if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
829
@@ -XXX,XX +XXX,XX @@ if config_all_devices.has_key('CONFIG_VIRTIO_VGA')
830
hw_display_modules += {'virtio-vga-gl': virtio_vga_gl_ss}
831
endif
832
833
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c'))
834
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c'))
835
836
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-vga-stub.c'))
837
+system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-vga-stub.c'))
838
modules += { 'hw-display': hw_display_modules }
839
diff --git a/hw/dma/meson.build b/hw/dma/meson.build
840
index XXXXXXX..XXXXXXX 100644
841
--- a/hw/dma/meson.build
842
+++ b/hw/dma/meson.build
843
@@ -XXX,XX +XXX,XX @@
844
-softmmu_ss.add(when: 'CONFIG_RC4030', if_true: files('rc4030.c'))
845
-softmmu_ss.add(when: 'CONFIG_PL080', if_true: files('pl080.c'))
846
-softmmu_ss.add(when: 'CONFIG_PL330', if_true: files('pl330.c'))
847
-softmmu_ss.add(when: 'CONFIG_I82374', if_true: files('i82374.c'))
848
-softmmu_ss.add(when: 'CONFIG_I8257', if_true: files('i8257.c'))
849
-softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axidma.c'))
850
-softmmu_ss.add(when: 'CONFIG_ZYNQ_DEVCFG', if_true: files('xlnx-zynq-devcfg.c'))
851
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
852
-softmmu_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
853
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
854
-softmmu_ss.add(when: 'CONFIG_XLNX_ZDMA', if_true: files('xlnx-zdma.c'))
855
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
856
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
857
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
858
-softmmu_ss.add(when: 'CONFIG_SIFIVE_PDMA', if_true: files('sifive_pdma.c'))
859
-softmmu_ss.add(when: 'CONFIG_XLNX_CSU_DMA', if_true: files('xlnx_csu_dma.c'))
860
+system_ss.add(when: 'CONFIG_RC4030', if_true: files('rc4030.c'))
861
+system_ss.add(when: 'CONFIG_PL080', if_true: files('pl080.c'))
862
+system_ss.add(when: 'CONFIG_PL330', if_true: files('pl330.c'))
863
+system_ss.add(when: 'CONFIG_I82374', if_true: files('i82374.c'))
864
+system_ss.add(when: 'CONFIG_I8257', if_true: files('i8257.c'))
865
+system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axidma.c'))
866
+system_ss.add(when: 'CONFIG_ZYNQ_DEVCFG', if_true: files('xlnx-zynq-devcfg.c'))
867
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
868
+system_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
869
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
870
+system_ss.add(when: 'CONFIG_XLNX_ZDMA', if_true: files('xlnx-zdma.c'))
871
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
872
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
873
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
874
+system_ss.add(when: 'CONFIG_SIFIVE_PDMA', if_true: files('sifive_pdma.c'))
875
+system_ss.add(when: 'CONFIG_XLNX_CSU_DMA', if_true: files('xlnx_csu_dma.c'))
876
diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build
877
index XXXXXXX..XXXXXXX 100644
878
--- a/hw/gpio/meson.build
879
+++ b/hw/gpio/meson.build
880
@@ -XXX,XX +XXX,XX @@
881
-softmmu_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c'))
882
-softmmu_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c'))
883
-softmmu_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c'))
884
-softmmu_ss.add(when: 'CONFIG_MAX7310', if_true: files('max7310.c'))
885
-softmmu_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c'))
886
-softmmu_ss.add(when: 'CONFIG_ZAURUS', if_true: files('zaurus.c'))
887
+system_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c'))
888
+system_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c'))
889
+system_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c'))
890
+system_ss.add(when: 'CONFIG_MAX7310', if_true: files('max7310.c'))
891
+system_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c'))
892
+system_ss.add(when: 'CONFIG_ZAURUS', if_true: files('zaurus.c'))
893
894
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
895
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
896
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
897
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
898
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c'))
899
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c'))
900
-softmmu_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c'))
901
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
902
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
903
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
904
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
905
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c'))
906
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c'))
907
+system_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c'))
908
diff --git a/hw/i2c/meson.build b/hw/i2c/meson.build
909
index XXXXXXX..XXXXXXX 100644
910
--- a/hw/i2c/meson.build
911
+++ b/hw/i2c/meson.build
912
@@ -XXX,XX +XXX,XX @@ i2c_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_i2c.c'))
913
i2c_ss.add(when: 'CONFIG_PPC4XX', if_true: files('ppc4xx_i2c.c'))
914
i2c_ss.add(when: 'CONFIG_PCA954X', if_true: files('i2c_mux_pca954x.c'))
915
i2c_ss.add(when: 'CONFIG_PMBUS', if_true: files('pmbus_device.c'))
916
-softmmu_ss.add_all(when: 'CONFIG_I2C', if_true: i2c_ss)
917
+system_ss.add_all(when: 'CONFIG_I2C', if_true: i2c_ss)
918
diff --git a/hw/ide/meson.build b/hw/ide/meson.build
919
index XXXXXXX..XXXXXXX 100644
920
--- a/hw/ide/meson.build
921
+++ b/hw/ide/meson.build
922
@@ -XXX,XX +XXX,XX @@
923
-softmmu_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
924
-softmmu_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
925
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
926
-softmmu_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c'))
927
-softmmu_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c'))
928
-softmmu_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c'))
929
-softmmu_ss.add(when: 'CONFIG_IDE_MACIO', if_true: files('macio.c'))
930
-softmmu_ss.add(when: 'CONFIG_IDE_MMIO', if_true: files('mmio.c'))
931
-softmmu_ss.add(when: 'CONFIG_IDE_PCI', if_true: files('pci.c'))
932
-softmmu_ss.add(when: 'CONFIG_IDE_PIIX', if_true: files('piix.c', 'ioport.c'))
933
-softmmu_ss.add(when: 'CONFIG_IDE_QDEV', if_true: files('qdev.c'))
934
-softmmu_ss.add(when: 'CONFIG_IDE_SII3112', if_true: files('sii3112.c'))
935
-softmmu_ss.add(when: 'CONFIG_IDE_VIA', if_true: files('via.c'))
936
-softmmu_ss.add(when: 'CONFIG_MICRODRIVE', if_true: files('microdrive.c'))
937
+system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
938
+system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
939
+system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
940
+system_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c'))
941
+system_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c'))
942
+system_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c'))
943
+system_ss.add(when: 'CONFIG_IDE_MACIO', if_true: files('macio.c'))
944
+system_ss.add(when: 'CONFIG_IDE_MMIO', if_true: files('mmio.c'))
945
+system_ss.add(when: 'CONFIG_IDE_PCI', if_true: files('pci.c'))
946
+system_ss.add(when: 'CONFIG_IDE_PIIX', if_true: files('piix.c', 'ioport.c'))
947
+system_ss.add(when: 'CONFIG_IDE_QDEV', if_true: files('qdev.c'))
948
+system_ss.add(when: 'CONFIG_IDE_SII3112', if_true: files('sii3112.c'))
949
+system_ss.add(when: 'CONFIG_IDE_VIA', if_true: files('via.c'))
950
+system_ss.add(when: 'CONFIG_MICRODRIVE', if_true: files('microdrive.c'))
951
diff --git a/hw/input/meson.build b/hw/input/meson.build
952
index XXXXXXX..XXXXXXX 100644
953
--- a/hw/input/meson.build
954
+++ b/hw/input/meson.build
955
@@ -XXX,XX +XXX,XX @@
956
-softmmu_ss.add(files('hid.c'))
957
-softmmu_ss.add(when: 'CONFIG_ADB', if_true: files('adb.c', 'adb-mouse.c', 'adb-kbd.c'))
958
-softmmu_ss.add(when: 'CONFIG_ADS7846', if_true: files('ads7846.c'))
959
-softmmu_ss.add(when: 'CONFIG_LM832X', if_true: files('lm832x.c'))
960
-softmmu_ss.add(when: 'CONFIG_PCKBD', if_true: files('pckbd.c'))
961
-softmmu_ss.add(when: 'CONFIG_PL050', if_true: files('pl050.c'))
962
-softmmu_ss.add(when: 'CONFIG_PS2', if_true: files('ps2.c'))
963
-softmmu_ss.add(when: 'CONFIG_STELLARIS_INPUT', if_true: files('stellaris_input.c'))
964
-softmmu_ss.add(when: 'CONFIG_TSC2005', if_true: files('tsc2005.c'))
965
+system_ss.add(files('hid.c'))
966
+system_ss.add(when: 'CONFIG_ADB', if_true: files('adb.c', 'adb-mouse.c', 'adb-kbd.c'))
967
+system_ss.add(when: 'CONFIG_ADS7846', if_true: files('ads7846.c'))
968
+system_ss.add(when: 'CONFIG_LM832X', if_true: files('lm832x.c'))
969
+system_ss.add(when: 'CONFIG_PCKBD', if_true: files('pckbd.c'))
970
+system_ss.add(when: 'CONFIG_PL050', if_true: files('pl050.c'))
971
+system_ss.add(when: 'CONFIG_PS2', if_true: files('ps2.c'))
972
+system_ss.add(when: 'CONFIG_STELLARIS_INPUT', if_true: files('stellaris_input.c'))
973
+system_ss.add(when: 'CONFIG_TSC2005', if_true: files('tsc2005.c'))
974
975
-softmmu_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input.c'))
976
-softmmu_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input-hid.c'))
977
-softmmu_ss.add(when: 'CONFIG_VIRTIO_INPUT_HOST', if_true: files('virtio-input-host.c'))
978
-softmmu_ss.add(when: 'CONFIG_VHOST_USER_INPUT', if_true: files('vhost-user-input.c'))
979
+system_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input.c'))
980
+system_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input-hid.c'))
981
+system_ss.add(when: 'CONFIG_VIRTIO_INPUT_HOST', if_true: files('virtio-input-host.c'))
982
+system_ss.add(when: 'CONFIG_VHOST_USER_INPUT', if_true: files('vhost-user-input.c'))
983
984
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_keypad.c'))
985
-softmmu_ss.add(when: 'CONFIG_TSC210X', if_true: files('tsc210x.c'))
986
-softmmu_ss.add(when: 'CONFIG_LASIPS2', if_true: files('lasips2.c'))
987
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_keypad.c'))
988
+system_ss.add(when: 'CONFIG_TSC210X', if_true: files('tsc210x.c'))
989
+system_ss.add(when: 'CONFIG_LASIPS2', if_true: files('lasips2.c'))
990
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
991
index XXXXXXX..XXXXXXX 100644
992
--- a/hw/intc/meson.build
993
+++ b/hw/intc/meson.build
994
@@ -XXX,XX +XXX,XX @@
995
-softmmu_ss.add(files('intc.c'))
996
-softmmu_ss.add(when: 'CONFIG_ARM_GIC', if_true: files(
997
+system_ss.add(files('intc.c'))
998
+system_ss.add(when: 'CONFIG_ARM_GIC', if_true: files(
999
'arm_gic.c',
1000
'arm_gic_common.c',
1001
'arm_gicv2m.c',
1002
'arm_gicv3_common.c',
1003
'arm_gicv3_its_common.c',
1004
))
1005
-softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files(
1006
+system_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files(
1007
'arm_gicv3.c',
1008
'arm_gicv3_dist.c',
1009
'arm_gicv3_its.c',
1010
'arm_gicv3_redist.c',
1011
))
1012
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_PIC', if_true: files('allwinner-a10-pic.c'))
1013
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c'))
1014
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c'))
1015
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c'))
1016
-softmmu_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
1017
-softmmu_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
1018
-softmmu_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
1019
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
1020
-softmmu_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'))
1021
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
1022
-softmmu_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
1023
-softmmu_ss.add(when: 'CONFIG_PL190', if_true: files('pl190.c'))
1024
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_ic.c', 'bcm2836_control.c'))
1025
-softmmu_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_gic.c'))
1026
-softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_intctl.c'))
1027
-softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_intc.c'))
1028
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-ipi.c'))
1029
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_PMU', if_true: files('xlnx-pmu-iomod-intc.c'))
1030
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_PIC', if_true: files('allwinner-a10-pic.c'))
1031
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c'))
1032
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c'))
1033
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c'))
1034
+system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
1035
+system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
1036
+system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
1037
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
1038
+system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'))
1039
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
1040
+system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
1041
+system_ss.add(when: 'CONFIG_PL190', if_true: files('pl190.c'))
1042
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_ic.c', 'bcm2836_control.c'))
1043
+system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_gic.c'))
1044
+system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_intctl.c'))
1045
+system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_intc.c'))
1046
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-ipi.c'))
1047
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_PMU', if_true: files('xlnx-pmu-iomod-intc.c'))
1048
1049
if config_all_devices.has_key('CONFIG_APIC') or \
1050
config_all_devices.has_key('CONFIG_I8259') or \
1051
config_all_devices.has_key('CONFIG_MC146818RTC')
1052
- softmmu_ss.add(files('kvm_irqcount.c'))
1053
+ system_ss.add(files('kvm_irqcount.c'))
1054
endif
1055
1056
specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic.c', 'apic_common.c'))
1057
diff --git a/hw/ipack/meson.build b/hw/ipack/meson.build
1058
index XXXXXXX..XXXXXXX 100644
1059
--- a/hw/ipack/meson.build
1060
+++ b/hw/ipack/meson.build
1061
@@ -1 +1 @@
1062
-softmmu_ss.add(when: 'CONFIG_IPACK', if_true: files('ipack.c', 'tpci200.c'))
1063
+system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipack.c', 'tpci200.c'))
1064
diff --git a/hw/ipmi/meson.build b/hw/ipmi/meson.build
1065
index XXXXXXX..XXXXXXX 100644
1066
--- a/hw/ipmi/meson.build
1067
+++ b/hw/ipmi/meson.build
1068
@@ -XXX,XX +XXX,XX @@ ipmi_ss.add(when: 'CONFIG_ISA_IPMI_BT', if_true: files('isa_ipmi_bt.c'))
1069
ipmi_ss.add(when: 'CONFIG_PCI_IPMI_BT', if_true: files('pci_ipmi_bt.c'))
1070
ipmi_ss.add(when: 'CONFIG_IPMI_SSIF', if_true: files('smbus_ipmi.c'))
1071
1072
-softmmu_ss.add_all(when: 'CONFIG_IPMI', if_true: ipmi_ss)
1073
+system_ss.add_all(when: 'CONFIG_IPMI', if_true: ipmi_ss)
1074
diff --git a/hw/isa/meson.build b/hw/isa/meson.build
1075
index XXXXXXX..XXXXXXX 100644
1076
--- a/hw/isa/meson.build
1077
+++ b/hw/isa/meson.build
1078
@@ -XXX,XX +XXX,XX @@
1079
-softmmu_ss.add(when: 'CONFIG_APM', if_true: files('apm.c'))
1080
-softmmu_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c'))
1081
-softmmu_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c'))
1082
-softmmu_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c'))
1083
-softmmu_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c'))
1084
-softmmu_ss.add(when: 'CONFIG_PIIX3', if_true: files('piix3.c'))
1085
-softmmu_ss.add(when: 'CONFIG_PIIX4', if_true: files('piix4.c'))
1086
-softmmu_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c'))
1087
-softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c'))
1088
+system_ss.add(when: 'CONFIG_APM', if_true: files('apm.c'))
1089
+system_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c'))
1090
+system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c'))
1091
+system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c'))
1092
+system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c'))
1093
+system_ss.add(when: 'CONFIG_PIIX3', if_true: files('piix3.c'))
1094
+system_ss.add(when: 'CONFIG_PIIX4', if_true: files('piix4.c'))
1095
+system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c'))
1096
+system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c'))
1097
1098
specific_ss.add(when: 'CONFIG_LPC_ICH9', if_true: files('lpc_ich9.c'))
1099
diff --git a/hw/mem/meson.build b/hw/mem/meson.build
1100
index XXXXXXX..XXXXXXX 100644
1101
--- a/hw/mem/meson.build
1102
+++ b/hw/mem/meson.build
1103
@@ -XXX,XX +XXX,XX @@ mem_ss.add(when: 'CONFIG_DIMM', if_true: files('pc-dimm.c'))
1104
mem_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_mc.c'))
1105
mem_ss.add(when: 'CONFIG_NVDIMM', if_true: files('nvdimm.c'))
1106
mem_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_true: files('cxl_type3.c'))
1107
-softmmu_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_false: files('cxl_type3_stubs.c'))
1108
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('cxl_type3_stubs.c'))
1109
+system_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_false: files('cxl_type3_stubs.c'))
1110
+system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl_type3_stubs.c'))
1111
1112
-softmmu_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)
1113
+system_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)
1114
1115
-softmmu_ss.add(when: 'CONFIG_SPARSE_MEM', if_true: files('sparse-mem.c'))
1116
+system_ss.add(when: 'CONFIG_SPARSE_MEM', if_true: files('sparse-mem.c'))
1117
diff --git a/hw/misc/macio/meson.build b/hw/misc/macio/meson.build
1118
index XXXXXXX..XXXXXXX 100644
1119
--- a/hw/misc/macio/meson.build
1120
+++ b/hw/misc/macio/meson.build
1121
@@ -XXX,XX +XXX,XX @@ macio_ss.add(when: 'CONFIG_MACIO_GPIO', if_true: files('gpio.c'))
1122
macio_ss.add(when: 'CONFIG_MAC_DBDMA', if_true: files('mac_dbdma.c'))
1123
macio_ss.add(when: 'CONFIG_MAC_PMU', if_true: files('pmu.c'))
1124
1125
-softmmu_ss.add_all(when: 'CONFIG_MACIO', if_true: macio_ss)
1126
+system_ss.add_all(when: 'CONFIG_MACIO', if_true: macio_ss)
1127
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
1128
index XXXXXXX..XXXXXXX 100644
1129
--- a/hw/misc/meson.build
1130
+++ b/hw/misc/meson.build
1131
@@ -XXX,XX +XXX,XX @@
1132
-softmmu_ss.add(when: 'CONFIG_APPLESMC', if_true: files('applesmc.c'))
1133
-softmmu_ss.add(when: 'CONFIG_EDU', if_true: files('edu.c'))
1134
-softmmu_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('vmcoreinfo.c'))
1135
-softmmu_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugexit.c'))
1136
-softmmu_ss.add(when: 'CONFIG_ISA_TESTDEV', if_true: files('pc-testdev.c'))
1137
-softmmu_ss.add(when: 'CONFIG_PCA9552', if_true: files('pca9552.c'))
1138
-softmmu_ss.add(when: 'CONFIG_PCI_TESTDEV', if_true: files('pci-testdev.c'))
1139
-softmmu_ss.add(when: 'CONFIG_UNIMP', if_true: files('unimp.c'))
1140
-softmmu_ss.add(when: 'CONFIG_EMPTY_SLOT', if_true: files('empty_slot.c'))
1141
-softmmu_ss.add(when: 'CONFIG_LED', if_true: files('led.c'))
1142
-softmmu_ss.add(when: 'CONFIG_PVPANIC_COMMON', if_true: files('pvpanic.c'))
1143
+system_ss.add(when: 'CONFIG_APPLESMC', if_true: files('applesmc.c'))
1144
+system_ss.add(when: 'CONFIG_EDU', if_true: files('edu.c'))
1145
+system_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('vmcoreinfo.c'))
1146
+system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugexit.c'))
1147
+system_ss.add(when: 'CONFIG_ISA_TESTDEV', if_true: files('pc-testdev.c'))
1148
+system_ss.add(when: 'CONFIG_PCA9552', if_true: files('pca9552.c'))
1149
+system_ss.add(when: 'CONFIG_PCI_TESTDEV', if_true: files('pci-testdev.c'))
1150
+system_ss.add(when: 'CONFIG_UNIMP', if_true: files('unimp.c'))
1151
+system_ss.add(when: 'CONFIG_EMPTY_SLOT', if_true: files('empty_slot.c'))
1152
+system_ss.add(when: 'CONFIG_LED', if_true: files('led.c'))
1153
+system_ss.add(when: 'CONFIG_PVPANIC_COMMON', if_true: files('pvpanic.c'))
1154
1155
# ARM devices
1156
-softmmu_ss.add(when: 'CONFIG_PL310', if_true: files('arm_l2x0.c'))
1157
-softmmu_ss.add(when: 'CONFIG_INTEGRATOR_DEBUG', if_true: files('arm_integrator_debug.c'))
1158
-softmmu_ss.add(when: 'CONFIG_A9SCU', if_true: files('a9scu.c'))
1159
-softmmu_ss.add(when: 'CONFIG_ARM11SCU', if_true: files('arm11scu.c'))
1160
+system_ss.add(when: 'CONFIG_PL310', if_true: files('arm_l2x0.c'))
1161
+system_ss.add(when: 'CONFIG_INTEGRATOR_DEBUG', if_true: files('arm_integrator_debug.c'))
1162
+system_ss.add(when: 'CONFIG_A9SCU', if_true: files('a9scu.c'))
1163
+system_ss.add(when: 'CONFIG_ARM11SCU', if_true: files('arm11scu.c'))
1164
1165
-softmmu_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_ras.c'))
1166
+system_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_ras.c'))
1167
1168
# Mac devices
1169
-softmmu_ss.add(when: 'CONFIG_MOS6522', if_true: files('mos6522.c'))
1170
+system_ss.add(when: 'CONFIG_MOS6522', if_true: files('mos6522.c'))
1171
1172
# virt devices
1173
-softmmu_ss.add(when: 'CONFIG_VIRT_CTRL', if_true: files('virt_ctrl.c'))
1174
+system_ss.add(when: 'CONFIG_VIRT_CTRL', if_true: files('virt_ctrl.c'))
1175
1176
# RISC-V devices
1177
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_DMC', if_true: files('mchp_pfsoc_dmc.c'))
1178
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_IOSCB', if_true: files('mchp_pfsoc_ioscb.c'))
1179
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_SYSREG', if_true: files('mchp_pfsoc_sysreg.c'))
1180
-softmmu_ss.add(when: 'CONFIG_SIFIVE_TEST', if_true: files('sifive_test.c'))
1181
-softmmu_ss.add(when: 'CONFIG_SIFIVE_E_PRCI', if_true: files('sifive_e_prci.c'))
1182
-softmmu_ss.add(when: 'CONFIG_SIFIVE_U_OTP', if_true: files('sifive_u_otp.c'))
1183
-softmmu_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.c'))
1184
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_DMC', if_true: files('mchp_pfsoc_dmc.c'))
1185
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_IOSCB', if_true: files('mchp_pfsoc_ioscb.c'))
1186
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_SYSREG', if_true: files('mchp_pfsoc_sysreg.c'))
1187
+system_ss.add(when: 'CONFIG_SIFIVE_TEST', if_true: files('sifive_test.c'))
1188
+system_ss.add(when: 'CONFIG_SIFIVE_E_PRCI', if_true: files('sifive_e_prci.c'))
1189
+system_ss.add(when: 'CONFIG_SIFIVE_U_OTP', if_true: files('sifive_u_otp.c'))
1190
+system_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.c'))
1191
1192
subdir('macio')
1193
1194
-softmmu_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem.c'))
1195
+system_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem.c'))
1196
1197
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c'))
1198
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_CCM', if_true: files('allwinner-a10-ccm.c'))
1199
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_DRAMC', if_true: files('allwinner-a10-dramc.c'))
1200
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-ccu.c'))
1201
+system_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c'))
1202
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_CCM', if_true: files('allwinner-a10-ccm.c'))
1203
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_DRAMC', if_true: files('allwinner-a10-dramc.c'))
1204
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-ccu.c'))
1205
specific_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-cpucfg.c'))
1206
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-dramc.c'))
1207
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-sysctrl.c'))
1208
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sid.c'))
1209
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-ccu.c'))
1210
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-dramc.c'))
1211
-softmmu_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
1212
-softmmu_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
1213
-softmmu_ss.add(when: 'CONFIG_NSERIES', if_true: files('cbus.c'))
1214
-softmmu_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
1215
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
1216
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files(
1217
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-dramc.c'))
1218
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-sysctrl.c'))
1219
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sid.c'))
1220
+system_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-ccu.c'))
1221
+system_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-dramc.c'))
1222
+system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
1223
+system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
1224
+system_ss.add(when: 'CONFIG_NSERIES', if_true: files('cbus.c'))
1225
+system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
1226
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
1227
+system_ss.add(when: 'CONFIG_IMX', if_true: files(
1228
'imx25_ccm.c',
1229
'imx31_ccm.c',
1230
'imx6_ccm.c',
1231
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_IMX', if_true: files(
1232
'imx_ccm.c',
1233
'imx_rngc.c',
1234
))
1235
-softmmu_ss.add(when: 'CONFIG_MAINSTONE', if_true: files('mst_fpga.c'))
1236
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files(
1237
+system_ss.add(when: 'CONFIG_MAINSTONE', if_true: files('mst_fpga.c'))
1238
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files(
1239
'npcm7xx_clk.c',
1240
'npcm7xx_gcr.c',
1241
'npcm7xx_mft.c',
1242
'npcm7xx_pwm.c',
1243
'npcm7xx_rng.c',
1244
))
1245
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files(
1246
+system_ss.add(when: 'CONFIG_OMAP', if_true: files(
1247
'omap_clk.c',
1248
'omap_gpmc.c',
1249
'omap_l4.c',
1250
'omap_sdrc.c',
1251
'omap_tap.c',
1252
))
1253
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
1254
+system_ss.add(when: 'CONFIG_RASPI', if_true: files(
1255
'bcm2835_mbox.c',
1256
'bcm2835_mphi.c',
1257
'bcm2835_property.c',
1258
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
1259
'bcm2835_cprman.c',
1260
'bcm2835_powermgt.c',
1261
))
1262
-softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
1263
-softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c'))
1264
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
1265
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
1266
+system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
1267
+system_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c'))
1268
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
1269
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
1270
specific_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-crl.c'))
1271
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
1272
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
1273
'xlnx-versal-xramc.c',
1274
'xlnx-versal-pmc-iou-slcr.c',
1275
))
1276
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_SYSCFG', if_true: files('stm32f2xx_syscfg.c'))
1277
-softmmu_ss.add(when: 'CONFIG_STM32F4XX_SYSCFG', if_true: files('stm32f4xx_syscfg.c'))
1278
-softmmu_ss.add(when: 'CONFIG_STM32F4XX_EXTI', if_true: files('stm32f4xx_exti.c'))
1279
-softmmu_ss.add(when: 'CONFIG_MPS2_FPGAIO', if_true: files('mps2-fpgaio.c'))
1280
-softmmu_ss.add(when: 'CONFIG_MPS2_SCC', if_true: files('mps2-scc.c'))
1281
+system_ss.add(when: 'CONFIG_STM32F2XX_SYSCFG', if_true: files('stm32f2xx_syscfg.c'))
1282
+system_ss.add(when: 'CONFIG_STM32F4XX_SYSCFG', if_true: files('stm32f4xx_syscfg.c'))
1283
+system_ss.add(when: 'CONFIG_STM32F4XX_EXTI', if_true: files('stm32f4xx_exti.c'))
1284
+system_ss.add(when: 'CONFIG_MPS2_FPGAIO', if_true: files('mps2-fpgaio.c'))
1285
+system_ss.add(when: 'CONFIG_MPS2_SCC', if_true: files('mps2-scc.c'))
1286
1287
-softmmu_ss.add(when: 'CONFIG_TZ_MPC', if_true: files('tz-mpc.c'))
1288
-softmmu_ss.add(when: 'CONFIG_TZ_MSC', if_true: files('tz-msc.c'))
1289
-softmmu_ss.add(when: 'CONFIG_TZ_PPC', if_true: files('tz-ppc.c'))
1290
-softmmu_ss.add(when: 'CONFIG_IOTKIT_SECCTL', if_true: files('iotkit-secctl.c'))
1291
-softmmu_ss.add(when: 'CONFIG_IOTKIT_SYSCTL', if_true: files('iotkit-sysctl.c'))
1292
-softmmu_ss.add(when: 'CONFIG_IOTKIT_SYSINFO', if_true: files('iotkit-sysinfo.c'))
1293
-softmmu_ss.add(when: 'CONFIG_ARMSSE_CPU_PWRCTRL', if_true: files('armsse-cpu-pwrctrl.c'))
1294
-softmmu_ss.add(when: 'CONFIG_ARMSSE_CPUID', if_true: files('armsse-cpuid.c'))
1295
-softmmu_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c'))
1296
+system_ss.add(when: 'CONFIG_TZ_MPC', if_true: files('tz-mpc.c'))
1297
+system_ss.add(when: 'CONFIG_TZ_MSC', if_true: files('tz-msc.c'))
1298
+system_ss.add(when: 'CONFIG_TZ_PPC', if_true: files('tz-ppc.c'))
1299
+system_ss.add(when: 'CONFIG_IOTKIT_SECCTL', if_true: files('iotkit-secctl.c'))
1300
+system_ss.add(when: 'CONFIG_IOTKIT_SYSCTL', if_true: files('iotkit-sysctl.c'))
1301
+system_ss.add(when: 'CONFIG_IOTKIT_SYSINFO', if_true: files('iotkit-sysinfo.c'))
1302
+system_ss.add(when: 'CONFIG_ARMSSE_CPU_PWRCTRL', if_true: files('armsse-cpu-pwrctrl.c'))
1303
+system_ss.add(when: 'CONFIG_ARMSSE_CPUID', if_true: files('armsse-cpuid.c'))
1304
+system_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c'))
1305
1306
-softmmu_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c'))
1307
-softmmu_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c'))
1308
-softmmu_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
1309
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
1310
+system_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c'))
1311
+system_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c'))
1312
+system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
1313
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
1314
'aspeed_hace.c',
1315
'aspeed_i3c.c',
1316
'aspeed_lpc.c',
1317
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
1318
'aspeed_xdma.c',
1319
'aspeed_peci.c'))
1320
1321
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c'))
1322
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c'))
1323
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c'))
1324
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c'))
1325
1326
-softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
1327
+system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
1328
1329
-softmmu_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-echo.c'))
1330
+system_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-echo.c'))
1331
1332
specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
1333
1334
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c'))
1335
specific_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_cmgcr.c', 'mips_cpc.c'))
1336
specific_ss.add(when: 'CONFIG_MIPS_ITU', if_true: files('mips_itu.c'))
1337
1338
-softmmu_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
1339
+system_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
1340
1341
# HPPA devices
1342
-softmmu_ss.add(when: 'CONFIG_LASI', if_true: files('lasi.c'))
1343
+system_ss.add(when: 'CONFIG_LASI', if_true: files('lasi.c'))
1344
diff --git a/hw/net/can/meson.build b/hw/net/can/meson.build
1345
index XXXXXXX..XXXXXXX 100644
1346
--- a/hw/net/can/meson.build
1347
+++ b/hw/net/can/meson.build
1348
@@ -XXX,XX +XXX,XX @@
1349
-softmmu_ss.add(when: 'CONFIG_CAN_SJA1000', if_true: files('can_sja1000.c'))
1350
-softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_kvaser_pci.c'))
1351
-softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_pcm3680_pci.c'))
1352
-softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_mioe3680_pci.c'))
1353
-softmmu_ss.add(when: 'CONFIG_CAN_CTUCANFD', if_true: files('ctucan_core.c'))
1354
-softmmu_ss.add(when: 'CONFIG_CAN_CTUCANFD_PCI', if_true: files('ctucan_pci.c'))
1355
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-can.c'))
1356
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-canfd.c'))
1357
+system_ss.add(when: 'CONFIG_CAN_SJA1000', if_true: files('can_sja1000.c'))
1358
+system_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_kvaser_pci.c'))
1359
+system_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_pcm3680_pci.c'))
1360
+system_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_mioe3680_pci.c'))
1361
+system_ss.add(when: 'CONFIG_CAN_CTUCANFD', if_true: files('ctucan_core.c'))
1362
+system_ss.add(when: 'CONFIG_CAN_CTUCANFD_PCI', if_true: files('ctucan_pci.c'))
1363
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-can.c'))
1364
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-canfd.c'))
1365
diff --git a/hw/net/meson.build b/hw/net/meson.build
1366
index XXXXXXX..XXXXXXX 100644
1367
--- a/hw/net/meson.build
1368
+++ b/hw/net/meson.build
1369
@@ -XXX,XX +XXX,XX @@
1370
-softmmu_ss.add(when: 'CONFIG_DP8393X', if_true: files('dp8393x.c'))
1371
-softmmu_ss.add(when: 'CONFIG_XEN', if_true: files('xen_nic.c'))
1372
-softmmu_ss.add(when: 'CONFIG_NE2000_COMMON', if_true: files('ne2000.c'))
1373
+system_ss.add(when: 'CONFIG_DP8393X', if_true: files('dp8393x.c'))
1374
+system_ss.add(when: 'CONFIG_XEN', if_true: files('xen_nic.c'))
1375
+system_ss.add(when: 'CONFIG_NE2000_COMMON', if_true: files('ne2000.c'))
1376
1377
# PCI network cards
1378
-softmmu_ss.add(when: 'CONFIG_NE2000_PCI', if_true: files('ne2000-pci.c'))
1379
-softmmu_ss.add(when: 'CONFIG_EEPRO100_PCI', if_true: files('eepro100.c'))
1380
-softmmu_ss.add(when: 'CONFIG_PCNET_PCI', if_true: files('pcnet-pci.c'))
1381
-softmmu_ss.add(when: 'CONFIG_PCNET_COMMON', if_true: files('pcnet.c'))
1382
-softmmu_ss.add(when: 'CONFIG_E1000_PCI', if_true: files('e1000.c', 'e1000x_common.c'))
1383
-softmmu_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1384
-softmmu_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('e1000e.c', 'e1000e_core.c', 'e1000x_common.c'))
1385
-softmmu_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1386
-softmmu_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('igb.c', 'igbvf.c', 'igb_core.c'))
1387
-softmmu_ss.add(when: 'CONFIG_RTL8139_PCI', if_true: files('rtl8139.c'))
1388
-softmmu_ss.add(when: 'CONFIG_TULIP', if_true: files('tulip.c'))
1389
-softmmu_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1390
-softmmu_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('vmxnet3.c'))
1391
+system_ss.add(when: 'CONFIG_NE2000_PCI', if_true: files('ne2000-pci.c'))
1392
+system_ss.add(when: 'CONFIG_EEPRO100_PCI', if_true: files('eepro100.c'))
1393
+system_ss.add(when: 'CONFIG_PCNET_PCI', if_true: files('pcnet-pci.c'))
1394
+system_ss.add(when: 'CONFIG_PCNET_COMMON', if_true: files('pcnet.c'))
1395
+system_ss.add(when: 'CONFIG_E1000_PCI', if_true: files('e1000.c', 'e1000x_common.c'))
1396
+system_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1397
+system_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('e1000e.c', 'e1000e_core.c', 'e1000x_common.c'))
1398
+system_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1399
+system_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('igb.c', 'igbvf.c', 'igb_core.c'))
1400
+system_ss.add(when: 'CONFIG_RTL8139_PCI', if_true: files('rtl8139.c'))
1401
+system_ss.add(when: 'CONFIG_TULIP', if_true: files('tulip.c'))
1402
+system_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1403
+system_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('vmxnet3.c'))
1404
1405
-softmmu_ss.add(when: 'CONFIG_SMC91C111', if_true: files('smc91c111.c'))
1406
-softmmu_ss.add(when: 'CONFIG_LAN9118', if_true: files('lan9118.c'))
1407
-softmmu_ss.add(when: 'CONFIG_NE2000_ISA', if_true: files('ne2000-isa.c'))
1408
-softmmu_ss.add(when: 'CONFIG_OPENCORES_ETH', if_true: files('opencores_eth.c'))
1409
-softmmu_ss.add(when: 'CONFIG_XGMAC', if_true: files('xgmac.c'))
1410
-softmmu_ss.add(when: 'CONFIG_MIPSNET', if_true: files('mipsnet.c'))
1411
-softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axienet.c'))
1412
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_EMAC', if_true: files('allwinner_emac.c'))
1413
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_SUN8I_EMAC', if_true: files('allwinner-sun8i-emac.c'))
1414
-softmmu_ss.add(when: 'CONFIG_IMX_FEC', if_true: files('imx_fec.c'))
1415
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-emac.c'))
1416
-softmmu_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('mv88w8618_eth.c'))
1417
+system_ss.add(when: 'CONFIG_SMC91C111', if_true: files('smc91c111.c'))
1418
+system_ss.add(when: 'CONFIG_LAN9118', if_true: files('lan9118.c'))
1419
+system_ss.add(when: 'CONFIG_NE2000_ISA', if_true: files('ne2000-isa.c'))
1420
+system_ss.add(when: 'CONFIG_OPENCORES_ETH', if_true: files('opencores_eth.c'))
1421
+system_ss.add(when: 'CONFIG_XGMAC', if_true: files('xgmac.c'))
1422
+system_ss.add(when: 'CONFIG_MIPSNET', if_true: files('mipsnet.c'))
1423
+system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axienet.c'))
1424
+system_ss.add(when: 'CONFIG_ALLWINNER_EMAC', if_true: files('allwinner_emac.c'))
1425
+system_ss.add(when: 'CONFIG_ALLWINNER_SUN8I_EMAC', if_true: files('allwinner-sun8i-emac.c'))
1426
+system_ss.add(when: 'CONFIG_IMX_FEC', if_true: files('imx_fec.c'))
1427
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-emac.c'))
1428
+system_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('mv88w8618_eth.c'))
1429
1430
-softmmu_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_gem.c'))
1431
-softmmu_ss.add(when: 'CONFIG_STELLARIS_ENET', if_true: files('stellaris_enet.c'))
1432
-softmmu_ss.add(when: 'CONFIG_LANCE', if_true: files('lance.c'))
1433
-softmmu_ss.add(when: 'CONFIG_LASI_I82596', if_true: files('lasi_i82596.c'))
1434
-softmmu_ss.add(when: 'CONFIG_I82596_COMMON', if_true: files('i82596.c'))
1435
-softmmu_ss.add(when: 'CONFIG_SUNHME', if_true: files('sunhme.c'))
1436
-softmmu_ss.add(when: 'CONFIG_FTGMAC100', if_true: files('ftgmac100.c'))
1437
-softmmu_ss.add(when: 'CONFIG_SUNGEM', if_true: files('sungem.c'))
1438
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_emc.c'))
1439
+system_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_gem.c'))
1440
+system_ss.add(when: 'CONFIG_STELLARIS_ENET', if_true: files('stellaris_enet.c'))
1441
+system_ss.add(when: 'CONFIG_LANCE', if_true: files('lance.c'))
1442
+system_ss.add(when: 'CONFIG_LASI_I82596', if_true: files('lasi_i82596.c'))
1443
+system_ss.add(when: 'CONFIG_I82596_COMMON', if_true: files('i82596.c'))
1444
+system_ss.add(when: 'CONFIG_SUNHME', if_true: files('sunhme.c'))
1445
+system_ss.add(when: 'CONFIG_FTGMAC100', if_true: files('ftgmac100.c'))
1446
+system_ss.add(when: 'CONFIG_SUNGEM', if_true: files('sungem.c'))
1447
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_emc.c'))
1448
1449
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_eth.c'))
1450
-softmmu_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_fec.c'))
1451
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_eth.c'))
1452
+system_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_fec.c'))
1453
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_llan.c'))
1454
-softmmu_ss.add(when: 'CONFIG_XILINX_ETHLITE', if_true: files('xilinx_ethlite.c'))
1455
+system_ss.add(when: 'CONFIG_XILINX_ETHLITE', if_true: files('xilinx_ethlite.c'))
1456
1457
-softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('net_rx_pkt.c'))
1458
+system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('net_rx_pkt.c'))
1459
specific_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('virtio-net.c'))
1460
1461
if have_vhost_net
1462
- softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost_net.c'), if_false: files('vhost_net-stub.c'))
1463
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost_net-stub.c'))
1464
+ system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost_net.c'), if_false: files('vhost_net-stub.c'))
1465
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost_net-stub.c'))
1466
else
1467
- softmmu_ss.add(files('vhost_net-stub.c'))
1468
+ system_ss.add(files('vhost_net-stub.c'))
1469
endif
1470
1471
-softmmu_ss.add(when: 'CONFIG_ETSEC', if_true: files(
1472
+system_ss.add(when: 'CONFIG_ETSEC', if_true: files(
1473
'fsl_etsec/etsec.c',
1474
'fsl_etsec/miim.c',
1475
'fsl_etsec/registers.c',
1476
'fsl_etsec/rings.c',
1477
))
1478
1479
-softmmu_ss.add(when: 'CONFIG_ROCKER', if_true: files(
1480
+system_ss.add(when: 'CONFIG_ROCKER', if_true: files(
1481
'rocker/rocker.c',
1482
'rocker/rocker_desc.c',
1483
'rocker/rocker_fp.c',
1484
'rocker/rocker_of_dpa.c',
1485
'rocker/rocker_world.c',
1486
), if_false: files('rocker/qmp-norocker.c'))
1487
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('rocker/qmp-norocker.c'))
1488
-softmmu_ss.add(files('rocker/rocker-hmp-cmds.c'))
1489
+system_ss.add(when: 'CONFIG_ALL', if_true: files('rocker/qmp-norocker.c'))
1490
+system_ss.add(files('rocker/rocker-hmp-cmds.c'))
1491
1492
subdir('can')
1493
diff --git a/hw/nubus/meson.build b/hw/nubus/meson.build
1494
index XXXXXXX..XXXXXXX 100644
1495
--- a/hw/nubus/meson.build
1496
+++ b/hw/nubus/meson.build
1497
@@ -XXX,XX +XXX,XX @@ nubus_ss.add(files('nubus-bus.c'))
1498
nubus_ss.add(files('nubus-bridge.c'))
1499
nubus_ss.add(when: 'CONFIG_Q800', if_true: files('mac-nubus-bridge.c'))
1500
1501
-softmmu_ss.add_all(when: 'CONFIG_NUBUS', if_true: nubus_ss)
1502
+system_ss.add_all(when: 'CONFIG_NUBUS', if_true: nubus_ss)
1503
diff --git a/hw/nvme/meson.build b/hw/nvme/meson.build
1504
index XXXXXXX..XXXXXXX 100644
1505
--- a/hw/nvme/meson.build
1506
+++ b/hw/nvme/meson.build
1507
@@ -1 +1 @@
1508
-softmmu_ss.add(when: 'CONFIG_NVME_PCI', if_true: files('ctrl.c', 'dif.c', 'ns.c', 'subsys.c'))
1509
+system_ss.add(when: 'CONFIG_NVME_PCI', if_true: files('ctrl.c', 'dif.c', 'ns.c', 'subsys.c'))
1510
diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build
1511
index XXXXXXX..XXXXXXX 100644
1512
--- a/hw/nvram/meson.build
1513
+++ b/hw/nvram/meson.build
1514
@@ -XXX,XX +XXX,XX @@ if have_system or have_tools
1515
qom_ss.add(files('fw_cfg-interface.c'))
1516
endif
1517
1518
-softmmu_ss.add(files('fw_cfg.c'))
1519
-softmmu_ss.add(when: 'CONFIG_CHRP_NVRAM', if_true: files('chrp_nvram.c'))
1520
-softmmu_ss.add(when: 'CONFIG_DS1225Y', if_true: files('ds1225y.c'))
1521
-softmmu_ss.add(when: 'CONFIG_NMC93XX_EEPROM', if_true: files('eeprom93xx.c'))
1522
-softmmu_ss.add(when: 'CONFIG_AT24C', if_true: files('eeprom_at24c.c'))
1523
-softmmu_ss.add(when: 'CONFIG_MAC_NVRAM', if_true: files('mac_nvram.c'))
1524
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_otp.c'))
1525
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_nvm.c'))
1526
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE_CRC', if_true: files('xlnx-efuse-crc.c'))
1527
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE', if_true: files('xlnx-efuse.c'))
1528
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE_VERSAL', if_true: files(
1529
+system_ss.add(files('fw_cfg.c'))
1530
+system_ss.add(when: 'CONFIG_CHRP_NVRAM', if_true: files('chrp_nvram.c'))
1531
+system_ss.add(when: 'CONFIG_DS1225Y', if_true: files('ds1225y.c'))
1532
+system_ss.add(when: 'CONFIG_NMC93XX_EEPROM', if_true: files('eeprom93xx.c'))
1533
+system_ss.add(when: 'CONFIG_AT24C', if_true: files('eeprom_at24c.c'))
1534
+system_ss.add(when: 'CONFIG_MAC_NVRAM', if_true: files('mac_nvram.c'))
1535
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_otp.c'))
1536
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_nvm.c'))
1537
+system_ss.add(when: 'CONFIG_XLNX_EFUSE_CRC', if_true: files('xlnx-efuse-crc.c'))
1538
+system_ss.add(when: 'CONFIG_XLNX_EFUSE', if_true: files('xlnx-efuse.c'))
1539
+system_ss.add(when: 'CONFIG_XLNX_EFUSE_VERSAL', if_true: files(
1540
'xlnx-versal-efuse-cache.c',
1541
'xlnx-versal-efuse-ctrl.c'))
1542
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files(
1543
+system_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files(
1544
'xlnx-zynqmp-efuse.c'))
1545
-softmmu_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c'))
1546
+system_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c'))
1547
1548
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_nvram.c'))
1549
diff --git a/hw/pci-bridge/meson.build b/hw/pci-bridge/meson.build
1550
index XXXXXXX..XXXXXXX 100644
1551
--- a/hw/pci-bridge/meson.build
1552
+++ b/hw/pci-bridge/meson.build
1553
@@ -XXX,XX +XXX,XX @@ pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c
1554
# Sun4u
1555
pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c'))
1556
1557
-softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1558
+system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1559
1560
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c'))
1561
+system_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c'))
1562
diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build
1563
index XXXXXXX..XXXXXXX 100644
1564
--- a/hw/pci-host/meson.build
1565
+++ b/hw/pci-host/meson.build
1566
@@ -XXX,XX +XXX,XX @@ pci_ss.add(when: 'CONFIG_VERSATILE_PCI', if_true: files('versatile.c'))
1567
# HPPA devices
1568
pci_ss.add(when: 'CONFIG_DINO', if_true: files('dino.c'))
1569
1570
-softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1571
+system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1572
1573
specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files(
1574
'pnv_phb3.c',
1575
diff --git a/hw/pci/meson.build b/hw/pci/meson.build
1576
index XXXXXXX..XXXXXXX 100644
1577
--- a/hw/pci/meson.build
1578
+++ b/hw/pci/meson.build
1579
@@ -XXX,XX +XXX,XX @@ pci_ss.add(files(
1580
# CONFIG_PCI_EXPRESS=n.
1581
pci_ss.add(files('pcie.c', 'pcie_aer.c'))
1582
pci_ss.add(files('pcie_doe.c'))
1583
-softmmu_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_host.c'))
1584
-softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1585
+system_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_host.c'))
1586
+system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1587
1588
-softmmu_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
1589
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))
1590
+system_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
1591
+system_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))
1592
diff --git a/hw/pcmcia/meson.build b/hw/pcmcia/meson.build
1593
index XXXXXXX..XXXXXXX 100644
1594
--- a/hw/pcmcia/meson.build
1595
+++ b/hw/pcmcia/meson.build
1596
@@ -XXX,XX +XXX,XX @@
1597
-softmmu_ss.add(when: 'CONFIG_PCMCIA', if_true: files('pcmcia.c'))
1598
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx.c'))
1599
+system_ss.add(when: 'CONFIG_PCMCIA', if_true: files('pcmcia.c'))
1600
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx.c'))
1601
diff --git a/hw/rdma/meson.build b/hw/rdma/meson.build
1602
index XXXXXXX..XXXXXXX 100644
1603
--- a/hw/rdma/meson.build
1604
+++ b/hw/rdma/meson.build
1605
@@ -XXX,XX +XXX,XX @@
1606
-softmmu_ss.add(when: 'CONFIG_VMW_PVRDMA', if_true: files(
1607
+system_ss.add(when: 'CONFIG_VMW_PVRDMA', if_true: files(
1608
'rdma.c',
1609
'rdma_backend.c',
1610
'rdma_utils.c',
1611
diff --git a/hw/remote/meson.build b/hw/remote/meson.build
1612
index XXXXXXX..XXXXXXX 100644
1613
--- a/hw/remote/meson.build
1614
+++ b/hw/remote/meson.build
1615
@@ -XXX,XX +XXX,XX @@ remote_ss.add(when: 'CONFIG_VFIO_USER_SERVER', if_true: libvfio_user_dep)
1616
specific_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('memory.c'))
1617
specific_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('proxy-memory-listener.c'))
1618
1619
-softmmu_ss.add_all(when: 'CONFIG_MULTIPROCESS', if_true: remote_ss)
1620
+system_ss.add_all(when: 'CONFIG_MULTIPROCESS', if_true: remote_ss)
1621
diff --git a/hw/rtc/meson.build b/hw/rtc/meson.build
1622
index XXXXXXX..XXXXXXX 100644
1623
--- a/hw/rtc/meson.build
1624
+++ b/hw/rtc/meson.build
1625
@@ -XXX,XX +XXX,XX @@
1626
1627
-softmmu_ss.add(when: 'CONFIG_DS1338', if_true: files('ds1338.c'))
1628
-softmmu_ss.add(when: 'CONFIG_M41T80', if_true: files('m41t80.c'))
1629
-softmmu_ss.add(when: 'CONFIG_M48T59', if_true: files('m48t59.c'))
1630
-softmmu_ss.add(when: 'CONFIG_PL031', if_true: files('pl031.c'))
1631
-softmmu_ss.add(when: 'CONFIG_TWL92230', if_true: files('twl92230.c'))
1632
-softmmu_ss.add(when: ['CONFIG_ISA_BUS', 'CONFIG_M48T59'], if_true: files('m48t59-isa.c'))
1633
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-rtc.c'))
1634
+system_ss.add(when: 'CONFIG_DS1338', if_true: files('ds1338.c'))
1635
+system_ss.add(when: 'CONFIG_M41T80', if_true: files('m41t80.c'))
1636
+system_ss.add(when: 'CONFIG_M48T59', if_true: files('m48t59.c'))
1637
+system_ss.add(when: 'CONFIG_PL031', if_true: files('pl031.c'))
1638
+system_ss.add(when: 'CONFIG_TWL92230', if_true: files('twl92230.c'))
1639
+system_ss.add(when: ['CONFIG_ISA_BUS', 'CONFIG_M48T59'], if_true: files('m48t59-isa.c'))
1640
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-rtc.c'))
1641
1642
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_rtc.c'))
1643
-softmmu_ss.add(when: 'CONFIG_SUN4V_RTC', if_true: files('sun4v-rtc.c'))
1644
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_rtc.c'))
1645
-softmmu_ss.add(when: 'CONFIG_GOLDFISH_RTC', if_true: files('goldfish_rtc.c'))
1646
-softmmu_ss.add(when: 'CONFIG_LS7A_RTC', if_true: files('ls7a_rtc.c'))
1647
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-rtc.c'))
1648
-softmmu_ss.add(when: 'CONFIG_MC146818RTC', if_true: files('mc146818rtc.c'))
1649
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_rtc.c'))
1650
+system_ss.add(when: 'CONFIG_SUN4V_RTC', if_true: files('sun4v-rtc.c'))
1651
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_rtc.c'))
1652
+system_ss.add(when: 'CONFIG_GOLDFISH_RTC', if_true: files('goldfish_rtc.c'))
1653
+system_ss.add(when: 'CONFIG_LS7A_RTC', if_true: files('ls7a_rtc.c'))
1654
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-rtc.c'))
1655
+system_ss.add(when: 'CONFIG_MC146818RTC', if_true: files('mc146818rtc.c'))
1656
diff --git a/hw/scsi/meson.build b/hw/scsi/meson.build
1657
index XXXXXXX..XXXXXXX 100644
1658
--- a/hw/scsi/meson.build
1659
+++ b/hw/scsi/meson.build
1660
@@ -XXX,XX +XXX,XX @@ scsi_ss.add(when: 'CONFIG_LSI_SCSI_PCI', if_true: files('lsi53c895a.c'))
1661
scsi_ss.add(when: 'CONFIG_MEGASAS_SCSI_PCI', if_true: files('megasas.c'))
1662
scsi_ss.add(when: 'CONFIG_MPTSAS_SCSI_PCI', if_true: files('mptsas.c', 'mptconfig.c', 'mptendian.c'))
1663
scsi_ss.add(when: 'CONFIG_VMW_PVSCSI_SCSI_PCI', if_true: files('vmw_pvscsi.c'))
1664
-softmmu_ss.add_all(when: 'CONFIG_SCSI', if_true: scsi_ss)
1665
+system_ss.add_all(when: 'CONFIG_SCSI', if_true: scsi_ss)
1666
1667
specific_scsi_ss = ss.source_set()
1668
1669
diff --git a/hw/sd/meson.build b/hw/sd/meson.build
1670
index XXXXXXX..XXXXXXX 100644
1671
--- a/hw/sd/meson.build
1672
+++ b/hw/sd/meson.build
1673
@@ -XXX,XX +XXX,XX @@
1674
-softmmu_ss.add(when: 'CONFIG_PL181', if_true: files('pl181.c'))
1675
-softmmu_ss.add(when: 'CONFIG_SD', if_true: files('sd.c', 'core.c', 'sdmmc-internal.c'))
1676
-softmmu_ss.add(when: 'CONFIG_SDHCI', if_true: files('sdhci.c'))
1677
-softmmu_ss.add(when: 'CONFIG_SDHCI_PCI', if_true: files('sdhci-pci.c'))
1678
-softmmu_ss.add(when: 'CONFIG_SSI_SD', if_true: files('ssi-sd.c'))
1679
+system_ss.add(when: 'CONFIG_PL181', if_true: files('pl181.c'))
1680
+system_ss.add(when: 'CONFIG_SD', if_true: files('sd.c', 'core.c', 'sdmmc-internal.c'))
1681
+system_ss.add(when: 'CONFIG_SDHCI', if_true: files('sdhci.c'))
1682
+system_ss.add(when: 'CONFIG_SDHCI_PCI', if_true: files('sdhci-pci.c'))
1683
+system_ss.add(when: 'CONFIG_SSI_SD', if_true: files('ssi-sd.c'))
1684
1685
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_mmc.c'))
1686
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_mmci.c'))
1687
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_sdhost.c'))
1688
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_sdhci.c'))
1689
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sdhost.c'))
1690
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_sdhci.c'))
1691
-softmmu_ss.add(when: 'CONFIG_CADENCE_SDHCI', if_true: files('cadence_sdhci.c'))
1692
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_mmc.c'))
1693
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_mmci.c'))
1694
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_sdhost.c'))
1695
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_sdhci.c'))
1696
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sdhost.c'))
1697
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_sdhci.c'))
1698
+system_ss.add(when: 'CONFIG_CADENCE_SDHCI', if_true: files('cadence_sdhci.c'))
1699
diff --git a/hw/sensor/meson.build b/hw/sensor/meson.build
1700
index XXXXXXX..XXXXXXX 100644
1701
--- a/hw/sensor/meson.build
1702
+++ b/hw/sensor/meson.build
1703
@@ -XXX,XX +XXX,XX @@
1704
-softmmu_ss.add(when: 'CONFIG_TMP105', if_true: files('tmp105.c'))
1705
-softmmu_ss.add(when: 'CONFIG_TMP421', if_true: files('tmp421.c'))
1706
-softmmu_ss.add(when: 'CONFIG_DPS310', if_true: files('dps310.c'))
1707
-softmmu_ss.add(when: 'CONFIG_EMC141X', if_true: files('emc141x.c'))
1708
-softmmu_ss.add(when: 'CONFIG_ADM1272', if_true: files('adm1272.c'))
1709
-softmmu_ss.add(when: 'CONFIG_MAX34451', if_true: files('max34451.c'))
1710
-softmmu_ss.add(when: 'CONFIG_LSM303DLHC_MAG', if_true: files('lsm303dlhc_mag.c'))
1711
-softmmu_ss.add(when: 'CONFIG_ISL_PMBUS_VR', if_true: files('isl_pmbus_vr.c'))
1712
-softmmu_ss.add(when: 'CONFIG_MAX31785', if_true: files('max31785.c'))
1713
+system_ss.add(when: 'CONFIG_TMP105', if_true: files('tmp105.c'))
1714
+system_ss.add(when: 'CONFIG_TMP421', if_true: files('tmp421.c'))
1715
+system_ss.add(when: 'CONFIG_DPS310', if_true: files('dps310.c'))
1716
+system_ss.add(when: 'CONFIG_EMC141X', if_true: files('emc141x.c'))
1717
+system_ss.add(when: 'CONFIG_ADM1272', if_true: files('adm1272.c'))
1718
+system_ss.add(when: 'CONFIG_MAX34451', if_true: files('max34451.c'))
1719
+system_ss.add(when: 'CONFIG_LSM303DLHC_MAG', if_true: files('lsm303dlhc_mag.c'))
1720
+system_ss.add(when: 'CONFIG_ISL_PMBUS_VR', if_true: files('isl_pmbus_vr.c'))
1721
+system_ss.add(when: 'CONFIG_MAX31785', if_true: files('max31785.c'))
1722
diff --git a/hw/smbios/meson.build b/hw/smbios/meson.build
1723
index XXXXXXX..XXXXXXX 100644
1724
--- a/hw/smbios/meson.build
1725
+++ b/hw/smbios/meson.build
1726
@@ -XXX,XX +XXX,XX @@ smbios_ss.add(when: 'CONFIG_IPMI',
1727
if_true: files('smbios_type_38.c'),
1728
if_false: files('smbios_type_38-stub.c'))
1729
1730
-softmmu_ss.add_all(when: 'CONFIG_SMBIOS', if_true: smbios_ss)
1731
-softmmu_ss.add(when: 'CONFIG_SMBIOS', if_false: files('smbios-stub.c'))
1732
+system_ss.add_all(when: 'CONFIG_SMBIOS', if_true: smbios_ss)
1733
+system_ss.add(when: 'CONFIG_SMBIOS', if_false: files('smbios-stub.c'))
1734
1735
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files(
1736
+system_ss.add(when: 'CONFIG_ALL', if_true: files(
1737
'smbios-stub.c',
1738
'smbios_type_38-stub.c',
1739
))
1740
diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build
1741
index XXXXXXX..XXXXXXX 100644
1742
--- a/hw/ssi/meson.build
1743
+++ b/hw/ssi/meson.build
1744
@@ -XXX,XX +XXX,XX @@
1745
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c'))
1746
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c'))
1747
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c', 'npcm_pspi.c'))
1748
-softmmu_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c'))
1749
-softmmu_ss.add(when: 'CONFIG_SIFIVE_SPI', if_true: files('sifive_spi.c'))
1750
-softmmu_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c'))
1751
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c'))
1752
-softmmu_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c'))
1753
-softmmu_ss.add(when: 'CONFIG_XILINX_SPIPS', if_true: files('xilinx_spips.c'))
1754
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-ospi.c'))
1755
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_spi.c'))
1756
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_spi.c'))
1757
-softmmu_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_spi_host.c'))
1758
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c'))
1759
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c'))
1760
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c', 'npcm_pspi.c'))
1761
+system_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c'))
1762
+system_ss.add(when: 'CONFIG_SIFIVE_SPI', if_true: files('sifive_spi.c'))
1763
+system_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c'))
1764
+system_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c'))
1765
+system_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c'))
1766
+system_ss.add(when: 'CONFIG_XILINX_SPIPS', if_true: files('xilinx_spips.c'))
1767
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-ospi.c'))
1768
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_spi.c'))
1769
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_spi.c'))
1770
+system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_spi_host.c'))
1771
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
1772
index XXXXXXX..XXXXXXX 100644
1773
--- a/hw/timer/meson.build
1774
+++ b/hw/timer/meson.build
1775
@@ -XXX,XX +XXX,XX @@
1776
-softmmu_ss.add(when: 'CONFIG_A9_GTIMER', if_true: files('a9gtimer.c'))
1777
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_PIT', if_true: files('allwinner-a10-pit.c'))
1778
-softmmu_ss.add(when: 'CONFIG_ALTERA_TIMER', if_true: files('altera_timer.c'))
1779
-softmmu_ss.add(when: 'CONFIG_ARM_MPTIMER', if_true: files('arm_mptimer.c'))
1780
-softmmu_ss.add(when: 'CONFIG_ARM_TIMER', if_true: files('arm_timer.c'))
1781
-softmmu_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_systick.c'))
1782
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_timer.c'))
1783
-softmmu_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_ttc.c'))
1784
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_DUALTIMER', if_true: files('cmsdk-apb-dualtimer.c'))
1785
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_TIMER', if_true: files('cmsdk-apb-timer.c'))
1786
-softmmu_ss.add(when: 'CONFIG_RENESAS_TMR', if_true: files('renesas_tmr.c'))
1787
-softmmu_ss.add(when: 'CONFIG_RENESAS_CMT', if_true: files('renesas_cmt.c'))
1788
-softmmu_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-timer.c'))
1789
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_timer.c'))
1790
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_mct.c'))
1791
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c'))
1792
-softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
1793
-softmmu_ss.add(when: 'CONFIG_HPET', if_true: files('hpet.c'))
1794
-softmmu_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
1795
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
1796
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c'))
1797
-softmmu_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
1798
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
1799
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
1800
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_timer.c'))
1801
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gptimer.c'))
1802
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_synctimer.c'))
1803
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c'))
1804
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c'))
1805
-softmmu_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c'))
1806
-softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c'))
1807
-softmmu_ss.add(when: 'CONFIG_SSE_COUNTER', if_true: files('sse-counter.c'))
1808
-softmmu_ss.add(when: 'CONFIG_SSE_TIMER', if_true: files('sse-timer.c'))
1809
-softmmu_ss.add(when: 'CONFIG_STELLARIS_GPTM', if_true: files('stellaris-gptm.c'))
1810
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c'))
1811
-softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))
1812
+system_ss.add(when: 'CONFIG_A9_GTIMER', if_true: files('a9gtimer.c'))
1813
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_PIT', if_true: files('allwinner-a10-pit.c'))
1814
+system_ss.add(when: 'CONFIG_ALTERA_TIMER', if_true: files('altera_timer.c'))
1815
+system_ss.add(when: 'CONFIG_ARM_MPTIMER', if_true: files('arm_mptimer.c'))
1816
+system_ss.add(when: 'CONFIG_ARM_TIMER', if_true: files('arm_timer.c'))
1817
+system_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_systick.c'))
1818
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_timer.c'))
1819
+system_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_ttc.c'))
1820
+system_ss.add(when: 'CONFIG_CMSDK_APB_DUALTIMER', if_true: files('cmsdk-apb-dualtimer.c'))
1821
+system_ss.add(when: 'CONFIG_CMSDK_APB_TIMER', if_true: files('cmsdk-apb-timer.c'))
1822
+system_ss.add(when: 'CONFIG_RENESAS_TMR', if_true: files('renesas_tmr.c'))
1823
+system_ss.add(when: 'CONFIG_RENESAS_CMT', if_true: files('renesas_cmt.c'))
1824
+system_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-timer.c'))
1825
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_timer.c'))
1826
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_mct.c'))
1827
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c'))
1828
+system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
1829
+system_ss.add(when: 'CONFIG_HPET', if_true: files('hpet.c'))
1830
+system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
1831
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
1832
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c'))
1833
+system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
1834
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
1835
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
1836
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_timer.c'))
1837
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gptimer.c'))
1838
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_synctimer.c'))
1839
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c'))
1840
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c'))
1841
+system_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c'))
1842
+system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c'))
1843
+system_ss.add(when: 'CONFIG_SSE_COUNTER', if_true: files('sse-counter.c'))
1844
+system_ss.add(when: 'CONFIG_SSE_TIMER', if_true: files('sse-timer.c'))
1845
+system_ss.add(when: 'CONFIG_STELLARIS_GPTM', if_true: files('stellaris-gptm.c'))
1846
+system_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c'))
1847
+system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))
1848
specific_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_timer.c'))
1849
-softmmu_ss.add(when: 'CONFIG_SIFIVE_PWM', if_true: files('sifive_pwm.c'))
1850
+system_ss.add(when: 'CONFIG_SIFIVE_PWM', if_true: files('sifive_pwm.c'))
1851
1852
specific_ss.add(when: 'CONFIG_AVR_TIMER16', if_true: files('avr_timer16.c'))
1853
diff --git a/hw/tpm/meson.build b/hw/tpm/meson.build
1854
index XXXXXXX..XXXXXXX 100644
1855
--- a/hw/tpm/meson.build
1856
+++ b/hw/tpm/meson.build
1857
@@ -XXX,XX +XXX,XX @@
1858
-softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_tis_common.c'))
1859
-softmmu_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true: files('tpm_tis_isa.c'))
1860
-softmmu_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true: files('tpm_tis_sysbus.c'))
1861
-softmmu_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true: files('tpm_tis_i2c.c'))
1862
-softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
1863
-softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
1864
-softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
1865
+system_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_tis_common.c'))
1866
+system_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true: files('tpm_tis_isa.c'))
1867
+system_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true: files('tpm_tis_sysbus.c'))
1868
+system_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true: files('tpm_tis_i2c.c'))
1869
+system_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
1870
+system_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
1871
+system_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
1872
1873
specific_ss.add(when: 'CONFIG_TPM_SPAPR', if_true: files('tpm_spapr.c'))
1874
diff --git a/hw/usb/meson.build b/hw/usb/meson.build
1875
index XXXXXXX..XXXXXXX 100644
1876
--- a/hw/usb/meson.build
1877
+++ b/hw/usb/meson.build
1878
@@ -XXX,XX +XXX,XX @@
1879
hw_usb_modules = {}
1880
1881
# usb subsystem core
1882
-softmmu_ss.add(when: 'CONFIG_USB', if_true: files(
1883
+system_ss.add(when: 'CONFIG_USB', if_true: files(
1884
'bus.c',
1885
'combined-packet.c',
1886
'core.c',
1887
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_USB', if_true: files(
1888
))
1889
1890
# usb host adapters
1891
-softmmu_ss.add(when: 'CONFIG_USB_UHCI', if_true: files('hcd-uhci.c'))
1892
-softmmu_ss.add(when: 'CONFIG_USB_OHCI', if_true: files('hcd-ohci.c'))
1893
-softmmu_ss.add(when: 'CONFIG_USB_OHCI_PCI', if_true: files('hcd-ohci-pci.c'))
1894
-softmmu_ss.add(when: 'CONFIG_USB_EHCI', if_true: files('hcd-ehci.c'))
1895
-softmmu_ss.add(when: 'CONFIG_USB_EHCI_PCI', if_true: files('hcd-ehci-pci.c'))
1896
-softmmu_ss.add(when: 'CONFIG_USB_EHCI_SYSBUS', if_true: files('hcd-ehci.c', 'hcd-ehci-sysbus.c'))
1897
-softmmu_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c'))
1898
-softmmu_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c'))
1899
-softmmu_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sysbus.c'))
1900
-softmmu_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c'))
1901
-softmmu_ss.add(when: 'CONFIG_USB_MUSB', if_true: files('hcd-musb.c'))
1902
-softmmu_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c'))
1903
-softmmu_ss.add(when: 'CONFIG_USB_DWC3', if_true: files('hcd-dwc3.c'))
1904
+system_ss.add(when: 'CONFIG_USB_UHCI', if_true: files('hcd-uhci.c'))
1905
+system_ss.add(when: 'CONFIG_USB_OHCI', if_true: files('hcd-ohci.c'))
1906
+system_ss.add(when: 'CONFIG_USB_OHCI_PCI', if_true: files('hcd-ohci-pci.c'))
1907
+system_ss.add(when: 'CONFIG_USB_EHCI', if_true: files('hcd-ehci.c'))
1908
+system_ss.add(when: 'CONFIG_USB_EHCI_PCI', if_true: files('hcd-ehci-pci.c'))
1909
+system_ss.add(when: 'CONFIG_USB_EHCI_SYSBUS', if_true: files('hcd-ehci.c', 'hcd-ehci-sysbus.c'))
1910
+system_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c'))
1911
+system_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c'))
1912
+system_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sysbus.c'))
1913
+system_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c'))
1914
+system_ss.add(when: 'CONFIG_USB_MUSB', if_true: files('hcd-musb.c'))
1915
+system_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c'))
1916
+system_ss.add(when: 'CONFIG_USB_DWC3', if_true: files('hcd-dwc3.c'))
1917
1918
-softmmu_ss.add(when: 'CONFIG_TUSB6010', if_true: files('tusb6010.c'))
1919
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('chipidea.c'))
1920
-softmmu_ss.add(when: 'CONFIG_IMX_USBPHY', if_true: files('imx-usb-phy.c'))
1921
-softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686-uhci-pci.c'))
1922
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-usb2-ctrl-regs.c'))
1923
-softmmu_ss.add(when: 'CONFIG_XLNX_USB_SUBSYS', if_true: files('xlnx-usb-subsystem.c'))
1924
+system_ss.add(when: 'CONFIG_TUSB6010', if_true: files('tusb6010.c'))
1925
+system_ss.add(when: 'CONFIG_IMX', if_true: files('chipidea.c'))
1926
+system_ss.add(when: 'CONFIG_IMX_USBPHY', if_true: files('imx-usb-phy.c'))
1927
+system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686-uhci-pci.c'))
1928
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-usb2-ctrl-regs.c'))
1929
+system_ss.add(when: 'CONFIG_XLNX_USB_SUBSYS', if_true: files('xlnx-usb-subsystem.c'))
1930
1931
# emulated usb devices
1932
-softmmu_ss.add(when: 'CONFIG_USB', if_true: files('dev-hub.c'))
1933
-softmmu_ss.add(when: 'CONFIG_USB', if_true: files('dev-hid.c'))
1934
-softmmu_ss.add(when: 'CONFIG_USB_TABLET_WACOM', if_true: files('dev-wacom.c'))
1935
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_CORE', if_true: files('dev-storage.c'))
1936
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_BOT', if_true: files('dev-storage-bot.c'))
1937
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_CLASSIC', if_true: files('dev-storage-classic.c'))
1938
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_UAS', if_true: files('dev-uas.c'))
1939
-softmmu_ss.add(when: 'CONFIG_USB_AUDIO', if_true: files('dev-audio.c'))
1940
-softmmu_ss.add(when: 'CONFIG_USB_SERIAL', if_true: files('dev-serial.c'))
1941
-softmmu_ss.add(when: 'CONFIG_USB_NETWORK', if_true: files('dev-network.c'))
1942
-softmmu_ss.add(when: ['CONFIG_POSIX', 'CONFIG_USB_STORAGE_MTP'], if_true: files('dev-mtp.c'))
1943
+system_ss.add(when: 'CONFIG_USB', if_true: files('dev-hub.c'))
1944
+system_ss.add(when: 'CONFIG_USB', if_true: files('dev-hid.c'))
1945
+system_ss.add(when: 'CONFIG_USB_TABLET_WACOM', if_true: files('dev-wacom.c'))
1946
+system_ss.add(when: 'CONFIG_USB_STORAGE_CORE', if_true: files('dev-storage.c'))
1947
+system_ss.add(when: 'CONFIG_USB_STORAGE_BOT', if_true: files('dev-storage-bot.c'))
1948
+system_ss.add(when: 'CONFIG_USB_STORAGE_CLASSIC', if_true: files('dev-storage-classic.c'))
1949
+system_ss.add(when: 'CONFIG_USB_STORAGE_UAS', if_true: files('dev-uas.c'))
1950
+system_ss.add(when: 'CONFIG_USB_AUDIO', if_true: files('dev-audio.c'))
1951
+system_ss.add(when: 'CONFIG_USB_SERIAL', if_true: files('dev-serial.c'))
1952
+system_ss.add(when: 'CONFIG_USB_NETWORK', if_true: files('dev-network.c'))
1953
+system_ss.add(when: ['CONFIG_POSIX', 'CONFIG_USB_STORAGE_MTP'], if_true: files('dev-mtp.c'))
1954
1955
# smartcard
1956
-softmmu_ss.add(when: 'CONFIG_USB_SMARTCARD', if_true: files('dev-smartcard-reader.c'))
1957
+system_ss.add(when: 'CONFIG_USB_SMARTCARD', if_true: files('dev-smartcard-reader.c'))
1958
1959
if cacard.found()
1960
usbsmartcard_ss = ss.source_set()
1961
@@ -XXX,XX +XXX,XX @@ if cacard.found()
1962
endif
1963
1964
# U2F
1965
-softmmu_ss.add(when: 'CONFIG_USB_U2F', if_true: files('u2f.c'))
1966
-softmmu_ss.add(when: ['CONFIG_LINUX', 'CONFIG_USB_U2F'], if_true: [libudev, files('u2f-passthru.c')])
1967
+system_ss.add(when: 'CONFIG_USB_U2F', if_true: files('u2f.c'))
1968
+system_ss.add(when: ['CONFIG_LINUX', 'CONFIG_USB_U2F'], if_true: [libudev, files('u2f-passthru.c')])
1969
if u2f.found()
1970
- softmmu_ss.add(when: 'CONFIG_USB_U2F', if_true: [u2f, files('u2f-emulated.c')])
1971
+ system_ss.add(when: 'CONFIG_USB_U2F', if_true: [u2f, files('u2f-emulated.c')])
1972
endif
1973
1974
# CanoKey
1975
if canokey.found()
1976
- softmmu_ss.add(when: 'CONFIG_USB_CANOKEY', if_true: [canokey, files('canokey.c')])
1977
+ system_ss.add(when: 'CONFIG_USB_CANOKEY', if_true: [canokey, files('canokey.c')])
1978
endif
1979
1980
# usb redirect
1981
@@ -XXX,XX +XXX,XX @@ if libusb.found()
1982
hw_usb_modules += {'host': usbhost_ss}
1983
endif
1984
1985
-softmmu_ss.add(when: ['CONFIG_USB', 'CONFIG_XEN_BUS', libusb], if_true: files('xen-usb.c'))
1986
+system_ss.add(when: ['CONFIG_USB', 'CONFIG_XEN_BUS', libusb], if_true: files('xen-usb.c'))
1987
1988
modules += { 'hw-usb': hw_usb_modules }
1989
diff --git a/hw/virtio/meson.build b/hw/virtio/meson.build
1990
index XXXXXXX..XXXXXXX 100644
1991
--- a/hw/virtio/meson.build
1992
+++ b/hw/virtio/meson.build
1993
@@ -XXX,XX +XXX,XX @@ virtio_pci_ss.add(when: 'CONFIG_VHOST_VDPA_DEV', if_true: files('vdpa-dev-pci.c'
1994
1995
specific_virtio_ss.add_all(when: 'CONFIG_VIRTIO_PCI', if_true: virtio_pci_ss)
1996
1997
-softmmu_ss.add_all(when: 'CONFIG_VIRTIO', if_true: softmmu_virtio_ss)
1998
-softmmu_ss.add(when: 'CONFIG_VIRTIO', if_false: files('vhost-stub.c'))
1999
-softmmu_ss.add(when: 'CONFIG_VIRTIO', if_false: files('virtio-stub.c'))
2000
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-stub.c'))
2001
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('virtio-stub.c'))
2002
-softmmu_ss.add(files('virtio-hmp-cmds.c'))
2003
+system_ss.add_all(when: 'CONFIG_VIRTIO', if_true: softmmu_virtio_ss)
2004
+system_ss.add(when: 'CONFIG_VIRTIO', if_false: files('vhost-stub.c'))
2005
+system_ss.add(when: 'CONFIG_VIRTIO', if_false: files('virtio-stub.c'))
2006
+system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-stub.c'))
2007
+system_ss.add(when: 'CONFIG_ALL', if_true: files('virtio-stub.c'))
2008
+system_ss.add(files('virtio-hmp-cmds.c'))
2009
2010
specific_ss.add_all(when: 'CONFIG_VIRTIO', if_true: specific_virtio_ss)
2011
diff --git a/hw/watchdog/meson.build b/hw/watchdog/meson.build
2012
index XXXXXXX..XXXXXXX 100644
2013
--- a/hw/watchdog/meson.build
2014
+++ b/hw/watchdog/meson.build
2015
@@ -XXX,XX +XXX,XX @@
2016
-softmmu_ss.add(files('watchdog.c'))
2017
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_WDT', if_true: files('allwinner-wdt.c'))
2018
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_WATCHDOG', if_true: files('cmsdk-apb-watchdog.c'))
2019
-softmmu_ss.add(when: 'CONFIG_WDT_IB6300ESB', if_true: files('wdt_i6300esb.c'))
2020
-softmmu_ss.add(when: 'CONFIG_WDT_IB700', if_true: files('wdt_ib700.c'))
2021
-softmmu_ss.add(when: 'CONFIG_WDT_DIAG288', if_true: files('wdt_diag288.c'))
2022
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('wdt_aspeed.c'))
2023
-softmmu_ss.add(when: 'CONFIG_WDT_IMX2', if_true: files('wdt_imx2.c'))
2024
-softmmu_ss.add(when: 'CONFIG_WDT_SBSA', if_true: files('sbsa_gwdt.c'))
2025
+system_ss.add(files('watchdog.c'))
2026
+system_ss.add(when: 'CONFIG_ALLWINNER_WDT', if_true: files('allwinner-wdt.c'))
2027
+system_ss.add(when: 'CONFIG_CMSDK_APB_WATCHDOG', if_true: files('cmsdk-apb-watchdog.c'))
2028
+system_ss.add(when: 'CONFIG_WDT_IB6300ESB', if_true: files('wdt_i6300esb.c'))
2029
+system_ss.add(when: 'CONFIG_WDT_IB700', if_true: files('wdt_ib700.c'))
2030
+system_ss.add(when: 'CONFIG_WDT_DIAG288', if_true: files('wdt_diag288.c'))
2031
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('wdt_aspeed.c'))
2032
+system_ss.add(when: 'CONFIG_WDT_IMX2', if_true: files('wdt_imx2.c'))
2033
+system_ss.add(when: 'CONFIG_WDT_SBSA', if_true: files('sbsa_gwdt.c'))
2034
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_watchdog.c'))
2035
diff --git a/hw/xen/meson.build b/hw/xen/meson.build
2036
index XXXXXXX..XXXXXXX 100644
2037
--- a/hw/xen/meson.build
2038
+++ b/hw/xen/meson.build
2039
@@ -XXX,XX +XXX,XX @@
2040
-softmmu_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
2041
+system_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
2042
'xen-backend.c',
2043
'xen-bus-helper.c',
2044
'xen-bus.c',
2045
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
2046
'xen_pvdev.c',
2047
))
2048
2049
-softmmu_ss.add(when: ['CONFIG_XEN', xen], if_true: files(
2050
+system_ss.add(when: ['CONFIG_XEN', xen], if_true: files(
2051
'xen-operations.c',
2052
))
2053
2054
diff --git a/migration/meson.build b/migration/meson.build
2055
index XXXXXXX..XXXXXXX 100644
2056
--- a/migration/meson.build
2057
+++ b/migration/meson.build
2058
@@ -XXX,XX +XXX,XX @@ migration_files = files(
2059
'yank_functions.c',
2060
)
2061
2062
-softmmu_ss.add(files(
2063
+system_ss.add(files(
2064
'block-dirty-bitmap.c',
2065
'channel.c',
2066
'channel-block.c',
2067
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2068
), gnutls)
2069
2070
if get_option('replication').allowed()
2071
- softmmu_ss.add(files('colo-failover.c', 'colo.c'))
2072
+ system_ss.add(files('colo-failover.c', 'colo.c'))
2073
endif
2074
2075
-softmmu_ss.add(when: rdma, if_true: files('rdma.c'))
2076
+system_ss.add(when: rdma, if_true: files('rdma.c'))
2077
if get_option('live_block_migration').allowed()
2078
- softmmu_ss.add(files('block.c'))
2079
+ system_ss.add(files('block.c'))
2080
endif
2081
-softmmu_ss.add(when: zstd, if_true: files('multifd-zstd.c'))
2082
+system_ss.add(when: zstd, if_true: files('multifd-zstd.c'))
2083
2084
specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
2085
if_true: files('ram.c',
2086
diff --git a/monitor/meson.build b/monitor/meson.build
2087
index XXXXXXX..XXXXXXX 100644
2088
--- a/monitor/meson.build
2089
+++ b/monitor/meson.build
2090
@@ -XXX,XX +XXX,XX @@
2091
qmp_ss.add(files('monitor.c', 'qmp.c', 'qmp-cmds-control.c'))
2092
2093
-softmmu_ss.add(files(
2094
+system_ss.add(files(
2095
'fds.c',
2096
'hmp-cmds.c',
2097
'hmp.c',
2098
))
2099
-softmmu_ss.add([spice_headers, files('qmp-cmds.c')])
2100
+system_ss.add([spice_headers, files('qmp-cmds.c')])
2101
2102
specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
2103
        if_true: [files( 'hmp-cmds-target.c', 'hmp-target.c'), spice])
2104
diff --git a/net/can/meson.build b/net/can/meson.build
2105
index XXXXXXX..XXXXXXX 100644
2106
--- a/net/can/meson.build
2107
+++ b/net/can/meson.build
2108
@@ -XXX,XX +XXX,XX @@ can_ss = ss.source_set()
2109
can_ss.add(files('can_core.c', 'can_host.c'))
2110
can_ss.add(when: 'CONFIG_LINUX', if_true: files('can_socketcan.c'))
2111
2112
-softmmu_ss.add_all(when: 'CONFIG_CAN_BUS', if_true: can_ss)
2113
+system_ss.add_all(when: 'CONFIG_CAN_BUS', if_true: can_ss)
2114
diff --git a/net/meson.build b/net/meson.build
2115
index XXXXXXX..XXXXXXX 100644
2116
--- a/net/meson.build
2117
+++ b/net/meson.build
2118
@@ -XXX,XX +XXX,XX @@
2119
-softmmu_ss.add(files(
2120
+system_ss.add(files(
2121
'announce.c',
2122
'checksum.c',
2123
'dump.c',
2124
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2125
2126
if get_option('replication').allowed() or \
2127
get_option('colo_proxy').allowed()
2128
- softmmu_ss.add(files('colo-compare.c'))
2129
- softmmu_ss.add(files('colo.c'))
2130
+ system_ss.add(files('colo-compare.c'))
2131
+ system_ss.add(files('colo.c'))
2132
endif
2133
2134
if get_option('colo_proxy').allowed()
2135
- softmmu_ss.add(files('filter-rewriter.c'))
2136
+ system_ss.add(files('filter-rewriter.c'))
2137
endif
2138
2139
-softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('filter-replay.c'))
2140
+system_ss.add(when: 'CONFIG_TCG', if_true: files('filter-replay.c'))
2141
2142
if have_l2tpv3
2143
- softmmu_ss.add(files('l2tpv3.c'))
2144
+ system_ss.add(files('l2tpv3.c'))
2145
endif
2146
-softmmu_ss.add(when: slirp, if_true: files('slirp.c'))
2147
-softmmu_ss.add(when: vde, if_true: files('vde.c'))
2148
+system_ss.add(when: slirp, if_true: files('slirp.c'))
2149
+system_ss.add(when: vde, if_true: files('vde.c'))
2150
if have_netmap
2151
- softmmu_ss.add(files('netmap.c'))
2152
+ system_ss.add(files('netmap.c'))
2153
endif
2154
if have_vhost_net_user
2155
- softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-user.c'), if_false: files('vhost-user-stub.c'))
2156
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-user-stub.c'))
2157
+ system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-user.c'), if_false: files('vhost-user-stub.c'))
2158
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-user-stub.c'))
2159
endif
2160
2161
-softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files('tap-linux.c'))
2162
-softmmu_ss.add(when: 'CONFIG_BSD', if_true: files('tap-bsd.c'))
2163
-softmmu_ss.add(when: 'CONFIG_SOLARIS', if_true: files('tap-solaris.c'))
2164
+system_ss.add(when: 'CONFIG_LINUX', if_true: files('tap-linux.c'))
2165
+system_ss.add(when: 'CONFIG_BSD', if_true: files('tap-bsd.c'))
2166
+system_ss.add(when: 'CONFIG_SOLARIS', if_true: files('tap-solaris.c'))
2167
tap_posix = ['tap.c']
2168
if not config_host.has_key('CONFIG_LINUX') and not config_host.has_key('CONFIG_BSD') and not config_host.has_key('CONFIG_SOLARIS')
2169
tap_posix += 'tap-stub.c'
2170
endif
2171
-softmmu_ss.add(when: 'CONFIG_POSIX', if_true: files(tap_posix))
2172
-softmmu_ss.add(when: 'CONFIG_WIN32', if_true: files('tap-win32.c'))
2173
+system_ss.add(when: 'CONFIG_POSIX', if_true: files(tap_posix))
2174
+system_ss.add(when: 'CONFIG_WIN32', if_true: files('tap-win32.c'))
2175
if have_vhost_net_vdpa
2176
- softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-vdpa.c'), if_false: files('vhost-vdpa-stub.c'))
2177
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-vdpa-stub.c'))
2178
+ system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-vdpa.c'), if_false: files('vhost-vdpa-stub.c'))
2179
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-vdpa-stub.c'))
2180
endif
2181
2182
vmnet_files = files(
2183
@@ -XXX,XX +XXX,XX @@ vmnet_files = files(
2184
'vmnet-host.c',
2185
'vmnet-shared.c'
2186
)
2187
-softmmu_ss.add(when: vmnet, if_true: vmnet_files)
2188
+system_ss.add(when: vmnet, if_true: vmnet_files)
2189
subdir('can')
2190
diff --git a/qom/meson.build b/qom/meson.build
2191
index XXXXXXX..XXXXXXX 100644
2192
--- a/qom/meson.build
2193
+++ b/qom/meson.build
2194
@@ -XXX,XX +XXX,XX @@ qom_ss.add(files(
2195
))
2196
2197
qmp_ss.add(files('qom-qmp-cmds.c'))
2198
-softmmu_ss.add(files('qom-hmp-cmds.c'))
2199
+system_ss.add(files('qom-hmp-cmds.c'))
2200
diff --git a/replay/meson.build b/replay/meson.build
2201
index XXXXXXX..XXXXXXX 100644
2202
--- a/replay/meson.build
2203
+++ b/replay/meson.build
2204
@@ -XXX,XX +XXX,XX @@
2205
-softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
2206
+system_ss.add(when: 'CONFIG_TCG', if_true: files(
2207
'replay.c',
2208
'replay-internal.c',
2209
'replay-events.c',
2210
diff --git a/softmmu/meson.build b/softmmu/meson.build
2211
index XXXXXXX..XXXXXXX 100644
2212
--- a/softmmu/meson.build
2213
+++ b/softmmu/meson.build
2214
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: [files(
2215
'icount.c',
2216
)])
2217
2218
-softmmu_ss.add(files(
2219
+system_ss.add(files(
2220
'balloon.c',
2221
'bootdevice.c',
2222
'cpus.c',
2223
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2224
), sdl, libpmem, libdaxctl)
2225
2226
if have_tpm
2227
- softmmu_ss.add(files('tpm.c'))
2228
+ system_ss.add(files('tpm.c'))
2229
endif
2230
2231
-softmmu_ss.add(when: seccomp, if_true: files('qemu-seccomp.c'))
2232
-softmmu_ss.add(when: fdt, if_true: files('device_tree.c'))
2233
+system_ss.add(when: seccomp, if_true: files('qemu-seccomp.c'))
2234
+system_ss.add(when: fdt, if_true: files('device_tree.c'))
2235
diff --git a/stats/meson.build b/stats/meson.build
2236
index XXXXXXX..XXXXXXX 100644
2237
--- a/stats/meson.build
2238
+++ b/stats/meson.build
2239
@@ -1 +1 @@
2240
-softmmu_ss.add(files('stats-hmp-cmds.c', 'stats-qmp-cmds.c'))
2241
+system_ss.add(files('stats-hmp-cmds.c', 'stats-qmp-cmds.c'))
2242
diff --git a/target/alpha/meson.build b/target/alpha/meson.build
2243
index XXXXXXX..XXXXXXX 100644
2244
--- a/target/alpha/meson.build
2245
+++ b/target/alpha/meson.build
2246
@@ -XXX,XX +XXX,XX @@ alpha_ss.add(files(
2247
'vax_helper.c',
2248
))
2249
2250
-alpha_softmmu_ss = ss.source_set()
2251
-alpha_softmmu_ss.add(files('machine.c'))
2252
+alpha_system_ss = ss.source_set()
2253
+alpha_system_ss.add(files('machine.c'))
2254
2255
target_arch += {'alpha': alpha_ss}
2256
-target_softmmu_arch += {'alpha': alpha_softmmu_ss}
2257
+target_softmmu_arch += {'alpha': alpha_system_ss}
2258
diff --git a/target/arm/hvf/meson.build b/target/arm/hvf/meson.build
2259
index XXXXXXX..XXXXXXX 100644
2260
--- a/target/arm/hvf/meson.build
2261
+++ b/target/arm/hvf/meson.build
2262
@@ -XXX,XX +XXX,XX @@
2263
-arm_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2264
+arm_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2265
'hvf.c',
2266
))
2267
diff --git a/target/arm/meson.build b/target/arm/meson.build
2268
index XXXXXXX..XXXXXXX 100644
2269
--- a/target/arm/meson.build
2270
+++ b/target/arm/meson.build
2271
@@ -XXX,XX +XXX,XX @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
2272
'gdbstub64.c',
2273
))
2274
2275
-arm_softmmu_ss = ss.source_set()
2276
-arm_softmmu_ss.add(files(
2277
+arm_system_ss = ss.source_set()
2278
+arm_system_ss.add(files(
2279
'arch_dump.c',
2280
'arm-powerctl.c',
2281
'arm-qmp-cmds.c',
2282
@@ -XXX,XX +XXX,XX @@ else
2283
endif
2284
2285
target_arch += {'arm': arm_ss}
2286
-target_softmmu_arch += {'arm': arm_softmmu_ss}
2287
+target_softmmu_arch += {'arm': arm_system_ss}
2288
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
2289
index XXXXXXX..XXXXXXX 100644
2290
--- a/target/arm/tcg/meson.build
2291
+++ b/target/arm/tcg/meson.build
2292
@@ -XXX,XX +XXX,XX @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
2293
'sve_helper.c',
2294
))
2295
2296
-arm_softmmu_ss.add(files(
2297
+arm_system_ss.add(files(
2298
'psci.c',
2299
))
2300
diff --git a/target/avr/meson.build b/target/avr/meson.build
2301
index XXXXXXX..XXXXXXX 100644
2302
--- a/target/avr/meson.build
2303
+++ b/target/avr/meson.build
2304
@@ -XXX,XX +XXX,XX @@ gen = [
2305
]
2306
2307
avr_ss = ss.source_set()
2308
-avr_softmmu_ss = ss.source_set()
2309
+avr_system_ss = ss.source_set()
2310
2311
avr_ss.add(gen)
2312
avr_ss.add(files(
2313
@@ -XXX,XX +XXX,XX @@ avr_ss.add(files(
2314
'gdbstub.c',
2315
'disas.c'))
2316
2317
-avr_softmmu_ss.add(files('machine.c'))
2318
+avr_system_ss.add(files('machine.c'))
2319
2320
target_arch += {'avr': avr_ss}
2321
-target_softmmu_arch += {'avr': avr_softmmu_ss}
2322
+target_softmmu_arch += {'avr': avr_system_ss}
2323
diff --git a/target/cris/meson.build b/target/cris/meson.build
2324
index XXXXXXX..XXXXXXX 100644
2325
--- a/target/cris/meson.build
2326
+++ b/target/cris/meson.build
2327
@@ -XXX,XX +XXX,XX @@ cris_ss.add(files(
2328
'translate.c',
2329
))
2330
2331
-cris_softmmu_ss = ss.source_set()
2332
-cris_softmmu_ss.add(files(
2333
+cris_system_ss = ss.source_set()
2334
+cris_system_ss.add(files(
2335
'helper.c',
2336
'machine.c',
2337
'mmu.c',
2338
))
2339
2340
target_arch += {'cris': cris_ss}
2341
-target_softmmu_arch += {'cris': cris_softmmu_ss}
2342
+target_softmmu_arch += {'cris': cris_system_ss}
2343
diff --git a/target/hppa/meson.build b/target/hppa/meson.build
2344
index XXXXXXX..XXXXXXX 100644
2345
--- a/target/hppa/meson.build
2346
+++ b/target/hppa/meson.build
2347
@@ -XXX,XX +XXX,XX @@ hppa_ss.add(files(
2348
'translate.c',
2349
))
2350
2351
-hppa_softmmu_ss = ss.source_set()
2352
-hppa_softmmu_ss.add(files(
2353
+hppa_system_ss = ss.source_set()
2354
+hppa_system_ss.add(files(
2355
'int_helper.c',
2356
'machine.c',
2357
'mem_helper.c',
2358
@@ -XXX,XX +XXX,XX @@ hppa_softmmu_ss.add(files(
2359
))
2360
2361
target_arch += {'hppa': hppa_ss}
2362
-target_softmmu_arch += {'hppa': hppa_softmmu_ss}
2363
+target_softmmu_arch += {'hppa': hppa_system_ss}
2364
diff --git a/target/i386/hax/meson.build b/target/i386/hax/meson.build
2365
index XXXXXXX..XXXXXXX 100644
2366
--- a/target/i386/hax/meson.build
2367
+++ b/target/i386/hax/meson.build
2368
@@ -XXX,XX +XXX,XX @@
2369
-i386_softmmu_ss.add(when: 'CONFIG_HAX', if_true: files(
2370
+i386_system_ss.add(when: 'CONFIG_HAX', if_true: files(
2371
'hax-all.c',
2372
'hax-mem.c',
2373
'hax-accel-ops.c',
2374
))
2375
-i386_softmmu_ss.add(when: ['CONFIG_HAX', 'CONFIG_POSIX'], if_true: files('hax-posix.c'))
2376
-i386_softmmu_ss.add(when: ['CONFIG_HAX', 'CONFIG_WIN32'], if_true: files('hax-windows.c'))
2377
+i386_system_ss.add(when: ['CONFIG_HAX', 'CONFIG_POSIX'], if_true: files('hax-posix.c'))
2378
+i386_system_ss.add(when: ['CONFIG_HAX', 'CONFIG_WIN32'], if_true: files('hax-windows.c'))
2379
diff --git a/target/i386/hvf/meson.build b/target/i386/hvf/meson.build
2380
index XXXXXXX..XXXXXXX 100644
2381
--- a/target/i386/hvf/meson.build
2382
+++ b/target/i386/hvf/meson.build
2383
@@ -XXX,XX +XXX,XX @@
2384
-i386_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2385
+i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2386
'hvf.c',
2387
'x86.c',
2388
'x86_cpuid.c',
2389
diff --git a/target/i386/kvm/meson.build b/target/i386/kvm/meson.build
2390
index XXXXXXX..XXXXXXX 100644
2391
--- a/target/i386/kvm/meson.build
2392
+++ b/target/i386/kvm/meson.build
2393
@@ -XXX,XX +XXX,XX @@ i386_softmmu_kvm_ss.add(when: 'CONFIG_XEN_EMU', if_true: files('xen-emu.c'))
2394
2395
i386_softmmu_kvm_ss.add(when: 'CONFIG_SEV', if_false: files('sev-stub.c'))
2396
2397
-i386_softmmu_ss.add(when: 'CONFIG_HYPERV', if_true: files('hyperv.c'), if_false: files('hyperv-stub.c'))
2398
+i386_system_ss.add(when: 'CONFIG_HYPERV', if_true: files('hyperv.c'), if_false: files('hyperv-stub.c'))
2399
2400
-i386_softmmu_ss.add_all(when: 'CONFIG_KVM', if_true: i386_softmmu_kvm_ss)
2401
+i386_system_ss.add_all(when: 'CONFIG_KVM', if_true: i386_softmmu_kvm_ss)
2402
diff --git a/target/i386/meson.build b/target/i386/meson.build
2403
index XXXXXXX..XXXXXXX 100644
2404
--- a/target/i386/meson.build
2405
+++ b/target/i386/meson.build
2406
@@ -XXX,XX +XXX,XX @@ i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.c'))
2407
i386_ss.add(when: 'CONFIG_KVM', if_true: files('host-cpu.c'))
2408
i386_ss.add(when: 'CONFIG_HVF', if_true: files('host-cpu.c'))
2409
2410
-i386_softmmu_ss = ss.source_set()
2411
-i386_softmmu_ss.add(files(
2412
+i386_system_ss = ss.source_set()
2413
+i386_system_ss.add(files(
2414
'arch_dump.c',
2415
'arch_memory_mapping.c',
2416
'machine.c',
2417
'monitor.c',
2418
'cpu-sysemu.c',
2419
))
2420
-i386_softmmu_ss.add(when: 'CONFIG_SEV', if_true: files('sev.c'), if_false: files('sev-sysemu-stub.c'))
2421
+i386_system_ss.add(when: 'CONFIG_SEV', if_true: files('sev.c'), if_false: files('sev-sysemu-stub.c'))
2422
2423
i386_user_ss = ss.source_set()
2424
2425
@@ -XXX,XX +XXX,XX @@ subdir('hvf')
2426
subdir('tcg')
2427
2428
target_arch += {'i386': i386_ss}
2429
-target_softmmu_arch += {'i386': i386_softmmu_ss}
2430
+target_softmmu_arch += {'i386': i386_system_ss}
2431
target_user_arch += {'i386': i386_user_ss}
2432
diff --git a/target/i386/nvmm/meson.build b/target/i386/nvmm/meson.build
2433
index XXXXXXX..XXXXXXX 100644
2434
--- a/target/i386/nvmm/meson.build
2435
+++ b/target/i386/nvmm/meson.build
2436
@@ -XXX,XX +XXX,XX @@
2437
-i386_softmmu_ss.add(when: 'CONFIG_NVMM', if_true:
2438
+i386_system_ss.add(when: 'CONFIG_NVMM', if_true:
2439
files(
2440
'nvmm-all.c',
2441
'nvmm-accel-ops.c',
2442
)
2443
)
2444
2445
-i386_softmmu_ss.add(when: 'CONFIG_NVMM', if_true: nvmm)
2446
+i386_system_ss.add(when: 'CONFIG_NVMM', if_true: nvmm)
2447
diff --git a/target/i386/tcg/sysemu/meson.build b/target/i386/tcg/sysemu/meson.build
2448
index XXXXXXX..XXXXXXX 100644
2449
--- a/target/i386/tcg/sysemu/meson.build
2450
+++ b/target/i386/tcg/sysemu/meson.build
2451
@@ -XXX,XX +XXX,XX @@
2452
-i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SYSTEM_ONLY'], if_true: files(
2453
+i386_system_ss.add(when: ['CONFIG_TCG', 'CONFIG_SYSTEM_ONLY'], if_true: files(
2454
'tcg-cpu.c',
2455
'smm_helper.c',
2456
'excp_helper.c',
2457
diff --git a/target/i386/whpx/meson.build b/target/i386/whpx/meson.build
2458
index XXXXXXX..XXXXXXX 100644
2459
--- a/target/i386/whpx/meson.build
2460
+++ b/target/i386/whpx/meson.build
2461
@@ -XXX,XX +XXX,XX @@
2462
-i386_softmmu_ss.add(when: 'CONFIG_WHPX', if_true: files(
2463
+i386_system_ss.add(when: 'CONFIG_WHPX', if_true: files(
2464
'whpx-all.c',
2465
'whpx-apic.c',
2466
'whpx-accel-ops.c',
2467
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
2468
index XXXXXXX..XXXXXXX 100644
2469
--- a/target/loongarch/meson.build
2470
+++ b/target/loongarch/meson.build
2471
@@ -XXX,XX +XXX,XX @@ loongarch_tcg_ss.add(files(
2472
))
2473
loongarch_tcg_ss.add(zlib)
2474
2475
-loongarch_softmmu_ss = ss.source_set()
2476
-loongarch_softmmu_ss.add(files(
2477
+loongarch_system_ss = ss.source_set()
2478
+loongarch_system_ss.add(files(
2479
'loongarch-qmp-cmds.c',
2480
'machine.c',
2481
'tlb_helper.c',
2482
@@ -XXX,XX +XXX,XX @@ common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
2483
loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
2484
2485
target_arch += {'loongarch': loongarch_ss}
2486
-target_softmmu_arch += {'loongarch': loongarch_softmmu_ss}
2487
+target_softmmu_arch += {'loongarch': loongarch_system_ss}
2488
diff --git a/target/m68k/meson.build b/target/m68k/meson.build
2489
index XXXXXXX..XXXXXXX 100644
2490
--- a/target/m68k/meson.build
2491
+++ b/target/m68k/meson.build
2492
@@ -XXX,XX +XXX,XX @@ m68k_ss.add(files(
2493
'translate.c',
2494
))
2495
2496
-m68k_softmmu_ss = ss.source_set()
2497
-m68k_softmmu_ss.add(files(
2498
+m68k_system_ss = ss.source_set()
2499
+m68k_system_ss.add(files(
2500
'm68k-semi.c',
2501
'monitor.c'
2502
))
2503
2504
target_arch += {'m68k': m68k_ss}
2505
-target_softmmu_arch += {'m68k': m68k_softmmu_ss}
2506
+target_softmmu_arch += {'m68k': m68k_system_ss}
2507
diff --git a/target/microblaze/meson.build b/target/microblaze/meson.build
2508
index XXXXXXX..XXXXXXX 100644
2509
--- a/target/microblaze/meson.build
2510
+++ b/target/microblaze/meson.build
2511
@@ -XXX,XX +XXX,XX @@ microblaze_ss.add(files(
2512
'translate.c',
2513
))
2514
2515
-microblaze_softmmu_ss = ss.source_set()
2516
-microblaze_softmmu_ss.add(files(
2517
+microblaze_system_ss = ss.source_set()
2518
+microblaze_system_ss.add(files(
2519
'mmu.c',
2520
'machine.c',
2521
))
2522
2523
target_arch += {'microblaze': microblaze_ss}
2524
-target_softmmu_arch += {'microblaze': microblaze_softmmu_ss}
2525
+target_softmmu_arch += {'microblaze': microblaze_system_ss}
2526
diff --git a/target/mips/meson.build b/target/mips/meson.build
2527
index XXXXXXX..XXXXXXX 100644
2528
--- a/target/mips/meson.build
2529
+++ b/target/mips/meson.build
2530
@@ -XXX,XX +XXX,XX @@
2531
mips_user_ss = ss.source_set()
2532
-mips_softmmu_ss = ss.source_set()
2533
+mips_system_ss = ss.source_set()
2534
mips_ss = ss.source_set()
2535
mips_ss.add(files(
2536
'cpu.c',
2537
@@ -XXX,XX +XXX,XX @@ endif
2538
mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
2539
2540
target_arch += {'mips': mips_ss}
2541
-target_softmmu_arch += {'mips': mips_softmmu_ss}
2542
+target_softmmu_arch += {'mips': mips_system_ss}
2543
target_user_arch += {'mips': mips_user_ss}
2544
diff --git a/target/mips/sysemu/meson.build b/target/mips/sysemu/meson.build
2545
index XXXXXXX..XXXXXXX 100644
2546
--- a/target/mips/sysemu/meson.build
2547
+++ b/target/mips/sysemu/meson.build
2548
@@ -XXX,XX +XXX,XX @@
2549
-mips_softmmu_ss.add(files(
2550
+mips_system_ss.add(files(
2551
'addr.c',
2552
'cp0.c',
2553
'cp0_timer.c',
2554
diff --git a/target/mips/tcg/sysemu/meson.build b/target/mips/tcg/sysemu/meson.build
2555
index XXXXXXX..XXXXXXX 100644
2556
--- a/target/mips/tcg/sysemu/meson.build
2557
+++ b/target/mips/tcg/sysemu/meson.build
2558
@@ -XXX,XX +XXX,XX @@
2559
-mips_softmmu_ss.add(files(
2560
+mips_system_ss.add(files(
2561
'cp0_helper.c',
2562
'mips-semi.c',
2563
'special_helper.c',
2564
diff --git a/target/nios2/meson.build b/target/nios2/meson.build
2565
index XXXXXXX..XXXXXXX 100644
2566
--- a/target/nios2/meson.build
2567
+++ b/target/nios2/meson.build
2568
@@ -XXX,XX +XXX,XX @@ nios2_ss.add(files(
2569
'translate.c',
2570
))
2571
2572
-nios2_softmmu_ss = ss.source_set()
2573
-nios2_softmmu_ss.add(files(
2574
+nios2_system_ss = ss.source_set()
2575
+nios2_system_ss.add(files(
2576
'helper.c',
2577
'monitor.c',
2578
'mmu.c',
2579
@@ -XXX,XX +XXX,XX @@ nios2_softmmu_ss.add(files(
2580
))
2581
2582
target_arch += {'nios2': nios2_ss}
2583
-target_softmmu_arch += {'nios2': nios2_softmmu_ss}
2584
+target_softmmu_arch += {'nios2': nios2_system_ss}
2585
diff --git a/target/openrisc/meson.build b/target/openrisc/meson.build
2586
index XXXXXXX..XXXXXXX 100644
2587
--- a/target/openrisc/meson.build
2588
+++ b/target/openrisc/meson.build
2589
@@ -XXX,XX +XXX,XX @@ openrisc_ss.add(files(
2590
'translate.c',
2591
))
2592
2593
-openrisc_softmmu_ss = ss.source_set()
2594
-openrisc_softmmu_ss.add(files(
2595
+openrisc_system_ss = ss.source_set()
2596
+openrisc_system_ss.add(files(
2597
'interrupt.c',
2598
'machine.c',
2599
'mmu.c',
2600
))
2601
2602
target_arch += {'openrisc': openrisc_ss}
2603
-target_softmmu_arch += {'openrisc': openrisc_softmmu_ss}
2604
+target_softmmu_arch += {'openrisc': openrisc_system_ss}
2605
diff --git a/target/ppc/meson.build b/target/ppc/meson.build
2606
index XXXXXXX..XXXXXXX 100644
2607
--- a/target/ppc/meson.build
2608
+++ b/target/ppc/meson.build
2609
@@ -XXX,XX +XXX,XX @@ ppc_ss.add(gen)
2610
ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
2611
ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c'))
2612
2613
-ppc_softmmu_ss = ss.source_set()
2614
-ppc_softmmu_ss.add(files(
2615
+ppc_system_ss = ss.source_set()
2616
+ppc_system_ss.add(files(
2617
'arch_dump.c',
2618
'machine.c',
2619
'mmu-hash32.c',
2620
'mmu_common.c',
2621
'ppc-qmp-cmds.c',
2622
))
2623
-ppc_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
2624
+ppc_system_ss.add(when: 'CONFIG_TCG', if_true: files(
2625
'mmu_helper.c',
2626
), if_false: files(
2627
'tcg-stub.c',
2628
))
2629
2630
-ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
2631
+ppc_system_ss.add(when: 'TARGET_PPC64', if_true: files(
2632
'compat.c',
2633
'mmu-book3s-v3.c',
2634
'mmu-hash64.c',
2635
@@ -XXX,XX +XXX,XX @@ ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
2636
))
2637
2638
target_arch += {'ppc': ppc_ss}
2639
-target_softmmu_arch += {'ppc': ppc_softmmu_ss}
2640
+target_softmmu_arch += {'ppc': ppc_system_ss}
2641
diff --git a/target/riscv/meson.build b/target/riscv/meson.build
2642
index XXXXXXX..XXXXXXX 100644
2643
--- a/target/riscv/meson.build
2644
+++ b/target/riscv/meson.build
2645
@@ -XXX,XX +XXX,XX @@ riscv_ss.add(files(
2646
))
2647
riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
2648
2649
-riscv_softmmu_ss = ss.source_set()
2650
-riscv_softmmu_ss.add(files(
2651
+riscv_system_ss = ss.source_set()
2652
+riscv_system_ss.add(files(
2653
'arch_dump.c',
2654
'pmp.c',
2655
'debug.c',
2656
@@ -XXX,XX +XXX,XX @@ riscv_softmmu_ss.add(files(
2657
))
2658
2659
target_arch += {'riscv': riscv_ss}
2660
-target_softmmu_arch += {'riscv': riscv_softmmu_ss}
2661
+target_softmmu_arch += {'riscv': riscv_system_ss}
2662
diff --git a/target/s390x/kvm/meson.build b/target/s390x/kvm/meson.build
2663
index XXXXXXX..XXXXXXX 100644
2664
--- a/target/s390x/kvm/meson.build
2665
+++ b/target/s390x/kvm/meson.build
2666
@@ -XXX,XX +XXX,XX @@ s390x_ss.add(when: 'CONFIG_KVM', if_true: files(
2667
# - KVM is enabled
2668
# - the linker supports --s390-pgste
2669
if host_machine.cpu_family() == 's390x' and cc.has_link_argument('-Wl,--s390-pgste')
2670
- s390x_softmmu_ss.add(when: 'CONFIG_KVM',
2671
+ s390x_system_ss.add(when: 'CONFIG_KVM',
2672
if_true: declare_dependency(link_args: ['-Wl,--s390-pgste']))
2673
endif
2674
diff --git a/target/s390x/meson.build b/target/s390x/meson.build
2675
index XXXXXXX..XXXXXXX 100644
2676
--- a/target/s390x/meson.build
2677
+++ b/target/s390x/meson.build
2678
@@ -XXX,XX +XXX,XX @@ gen_features_h = custom_target('gen-features.h',
2679
2680
s390x_ss.add(gen_features_h)
2681
2682
-s390x_softmmu_ss = ss.source_set()
2683
-s390x_softmmu_ss.add(files(
2684
+s390x_system_ss = ss.source_set()
2685
+s390x_system_ss.add(files(
2686
'helper.c',
2687
'arch_dump.c',
2688
'diag.c',
2689
@@ -XXX,XX +XXX,XX @@ subdir('tcg')
2690
subdir('kvm')
2691
2692
target_arch += {'s390x': s390x_ss}
2693
-target_softmmu_arch += {'s390x': s390x_softmmu_ss}
2694
+target_softmmu_arch += {'s390x': s390x_system_ss}
2695
target_user_arch += {'s390x': s390x_user_ss}
2696
diff --git a/target/sh4/meson.build b/target/sh4/meson.build
2697
index XXXXXXX..XXXXXXX 100644
2698
--- a/target/sh4/meson.build
2699
+++ b/target/sh4/meson.build
2700
@@ -XXX,XX +XXX,XX @@ sh4_ss.add(files(
2701
'translate.c',
2702
))
2703
2704
-sh4_softmmu_ss = ss.source_set()
2705
-sh4_softmmu_ss.add(files('monitor.c'))
2706
+sh4_system_ss = ss.source_set()
2707
+sh4_system_ss.add(files('monitor.c'))
2708
2709
target_arch += {'sh4': sh4_ss}
2710
-target_softmmu_arch += {'sh4': sh4_softmmu_ss}
2711
+target_softmmu_arch += {'sh4': sh4_system_ss}
2712
diff --git a/target/sparc/meson.build b/target/sparc/meson.build
2713
index XXXXXXX..XXXXXXX 100644
2714
--- a/target/sparc/meson.build
2715
+++ b/target/sparc/meson.build
2716
@@ -XXX,XX +XXX,XX @@ sparc_ss.add(files(
2717
sparc_ss.add(when: 'TARGET_SPARC', if_true: files('int32_helper.c'))
2718
sparc_ss.add(when: 'TARGET_SPARC64', if_true: files('int64_helper.c', 'vis_helper.c'))
2719
2720
-sparc_softmmu_ss = ss.source_set()
2721
-sparc_softmmu_ss.add(files(
2722
+sparc_system_ss = ss.source_set()
2723
+sparc_system_ss.add(files(
2724
'machine.c',
2725
'mmu_helper.c',
2726
'monitor.c',
2727
))
2728
2729
target_arch += {'sparc': sparc_ss}
2730
-target_softmmu_arch += {'sparc': sparc_softmmu_ss}
2731
+target_softmmu_arch += {'sparc': sparc_system_ss}
2732
diff --git a/target/tricore/meson.build b/target/tricore/meson.build
2733
index XXXXXXX..XXXXXXX 100644
2734
--- a/target/tricore/meson.build
2735
+++ b/target/tricore/meson.build
2736
@@ -XXX,XX +XXX,XX @@ tricore_ss.add(files(
2737
))
2738
tricore_ss.add(zlib)
2739
2740
-tricore_softmmu_ss = ss.source_set()
2741
+tricore_system_ss = ss.source_set()
2742
2743
target_arch += {'tricore': tricore_ss}
2744
-target_softmmu_arch += {'tricore': tricore_softmmu_ss}
2745
+target_softmmu_arch += {'tricore': tricore_system_ss}
2746
diff --git a/target/xtensa/meson.build b/target/xtensa/meson.build
2747
index XXXXXXX..XXXXXXX 100644
2748
--- a/target/xtensa/meson.build
2749
+++ b/target/xtensa/meson.build
2750
@@ -XXX,XX +XXX,XX @@ xtensa_ss.add(files(
2751
'xtensa-isa.c',
2752
))
2753
2754
-xtensa_softmmu_ss = ss.source_set()
2755
-xtensa_softmmu_ss.add(files(
2756
+xtensa_system_ss = ss.source_set()
2757
+xtensa_system_ss.add(files(
2758
'dbg_helper.c',
2759
'mmu_helper.c',
2760
'monitor.c',
2761
@@ -XXX,XX +XXX,XX @@ xtensa_softmmu_ss.add(files(
2762
))
2763
2764
target_arch += {'xtensa': xtensa_ss}
2765
-target_softmmu_arch += {'xtensa': xtensa_softmmu_ss}
2766
+target_softmmu_arch += {'xtensa': xtensa_system_ss}
2767
diff --git a/tcg/meson.build b/tcg/meson.build
2768
index XXXXXXX..XXXXXXX 100644
2769
--- a/tcg/meson.build
2770
+++ b/tcg/meson.build
2771
@@ -XXX,XX +XXX,XX @@ libtcg_softmmu = static_library('tcg_softmmu',
2772
2773
tcg_softmmu = declare_dependency(link_with: libtcg_softmmu,
2774
dependencies: tcg_ss.dependencies())
2775
-softmmu_ss.add(tcg_softmmu)
2776
+system_ss.add(tcg_softmmu)
2777
diff --git a/trace/meson.build b/trace/meson.build
2778
index XXXXXXX..XXXXXXX 100644
2779
--- a/trace/meson.build
2780
+++ b/trace/meson.build
2781
@@ -XXX,XX +XXX,XX @@
2782
-softmmu_ss.add(files('trace-hmp-cmds.c'))
2783
+system_ss.add(files('trace-hmp-cmds.c'))
2784
2785
specific_ss.add(files('control-target.c'))
2786
2787
diff --git a/ui/meson.build b/ui/meson.build
2788
index XXXXXXX..XXXXXXX 100644
2789
--- a/ui/meson.build
2790
+++ b/ui/meson.build
2791
@@ -XXX,XX +XXX,XX @@
2792
-softmmu_ss.add(pixman)
2793
+system_ss.add(pixman)
2794
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: pixman) # for the include path
2795
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: opengl) # for the include path
2796
2797
-softmmu_ss.add(png)
2798
-softmmu_ss.add(files(
2799
+system_ss.add(png)
2800
+system_ss.add(files(
2801
'clipboard.c',
2802
'console.c',
2803
'cursor.c',
2804
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2805
'util.c',
2806
))
2807
if dbus_display
2808
- softmmu_ss.add(files('dbus-module.c'))
2809
+ system_ss.add(files('dbus-module.c'))
2810
endif
2811
-softmmu_ss.add([spice_headers, files('spice-module.c')])
2812
-softmmu_ss.add(when: spice_protocol, if_true: files('vdagent.c'))
2813
+system_ss.add([spice_headers, files('spice-module.c')])
2814
+system_ss.add(when: spice_protocol, if_true: files('vdagent.c'))
2815
2816
-softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files(
2817
+system_ss.add(when: 'CONFIG_LINUX', if_true: files(
2818
'input-linux.c',
2819
'udmabuf.c',
2820
))
2821
-softmmu_ss.add(when: cocoa, if_true: files('cocoa.m'))
2822
+system_ss.add(when: cocoa, if_true: files('cocoa.m'))
2823
2824
vnc_ss = ss.source_set()
2825
vnc_ss.add(files(
2826
@@ -XXX,XX +XXX,XX @@ vnc_ss.add(files(
2827
))
2828
vnc_ss.add(zlib, jpeg, gnutls)
2829
vnc_ss.add(when: sasl, if_true: files('vnc-auth-sasl.c'))
2830
-softmmu_ss.add_all(when: vnc, if_true: vnc_ss)
2831
-softmmu_ss.add(when: vnc, if_false: files('vnc-stubs.c'))
2832
+system_ss.add_all(when: vnc, if_true: vnc_ss)
2833
+system_ss.add(when: vnc, if_false: files('vnc-stubs.c'))
2834
2835
ui_modules = {}
2836
2837
@@ -XXX,XX +XXX,XX @@ if curses.found()
2838
ui_modules += {'curses' : curses_ss}
2839
endif
2840
2841
-softmmu_ss.add(opengl)
2842
+system_ss.add(opengl)
2843
if opengl.found()
2844
opengl_ss = ss.source_set()
2845
opengl_ss.add(gbm)
2846
@@ -XXX,XX +XXX,XX @@ if dbus_display
2847
endif
2848
2849
if gtk.found()
2850
- softmmu_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2851
+ system_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2852
2853
gtk_ss = ss.source_set()
2854
gtk_ss.add(gtk, vte, pixman, files('gtk.c'))
2855
@@ -XXX,XX +XXX,XX @@ if gtk.found()
2856
endif
2857
2858
if sdl.found()
2859
- softmmu_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2860
+ system_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2861
2862
sdl_ss = ss.source_set()
2863
sdl_ss.add(sdl, sdl_image, pixman, glib, files(
54
--
2864
--
55
2.25.1
2865
2.34.1
56
2866
57
2867
diff view generated by jsdifflib
[PULL 15/27] tcg/tci: Remove tci_read_r16s
[PULL 13/16] plugins: Remove unused 'exec/helper-proto.h' header
1
Use explicit casts for ext16s opcodes.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Message-Id: <20230611085846.21415-2-philmd@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
7
---
6
tcg/tci.c | 26 ++++----------------------
8
plugins/core.c | 1 -
7
1 file changed, 4 insertions(+), 22 deletions(-)
9
1 file changed, 1 deletion(-)
8
10
9
diff --git a/tcg/tci.c b/tcg/tci.c
11
diff --git a/plugins/core.c b/plugins/core.c
10
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/tci.c
13
--- a/plugins/core.c
12
+++ b/tcg/tci.c
14
+++ b/plugins/core.c
13
@@ -XXX,XX +XXX,XX @@ static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
15
@@ -XXX,XX +XXX,XX @@
14
return regs[index];
16
15
}
17
#include "exec/exec-all.h"
16
18
#include "exec/tb-flush.h"
17
-#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
19
-#include "exec/helper-proto.h"
18
-static int16_t tci_read_reg16s(const tcg_target_ulong *regs, TCGReg index)
20
#include "tcg/tcg.h"
19
-{
21
#include "tcg/tcg-op.h"
20
- return (int16_t)tci_read_reg(regs, index);
22
#include "plugin.h"
21
-}
22
-#endif
23
-
24
#if TCG_TARGET_REG_BITS == 64
25
static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index)
26
{
27
@@ -XXX,XX +XXX,XX @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
28
return value;
29
}
30
31
-#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
32
-/* Read indexed register (16 bit signed) from bytecode. */
33
-static int16_t tci_read_r16s(const tcg_target_ulong *regs,
34
- const uint8_t **tb_ptr)
35
-{
36
- int16_t value = tci_read_reg16s(regs, **tb_ptr);
37
- *tb_ptr += 1;
38
- return value;
39
-}
40
-#endif
41
-
42
/* Read indexed register (32 bit) from bytecode. */
43
static uint32_t tci_read_r32(const tcg_target_ulong *regs,
44
const uint8_t **tb_ptr)
45
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
46
#if TCG_TARGET_HAS_ext16s_i32
47
case INDEX_op_ext16s_i32:
48
t0 = *tb_ptr++;
49
- t1 = tci_read_r16s(regs, &tb_ptr);
50
- tci_write_reg(regs, t0, t1);
51
+ t1 = tci_read_r(regs, &tb_ptr);
52
+ tci_write_reg(regs, t0, (int16_t)t1);
53
break;
54
#endif
55
#if TCG_TARGET_HAS_ext8u_i32
56
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
57
#if TCG_TARGET_HAS_ext16s_i64
58
case INDEX_op_ext16s_i64:
59
t0 = *tb_ptr++;
60
- t1 = tci_read_r16s(regs, &tb_ptr);
61
- tci_write_reg(regs, t0, t1);
62
+ t1 = tci_read_r(regs, &tb_ptr);
63
+ tci_write_reg(regs, t0, (int16_t)t1);
64
break;
65
#endif
66
#if TCG_TARGET_HAS_ext16u_i64
67
--
23
--
68
2.25.1
24
2.34.1
69
25
70
26
diff view generated by jsdifflib
[PULL 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction
[PULL 14/16] accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header
1
From: Alex Bennée <alex.bennee@linaro.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Having a function return either and valid TB and some system state
3
We only need lookup_tb_ptr() prototype.
4
seems excessive. It will make the subsequent re-factoring easier if we
5
lookup the current state where we are.
6
4
7
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Message-Id: <20210224165811.11567-2-alex.bennee@linaro.org>
6
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Message-Id: <20230611085846.21415-3-philmd@linaro.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
9
---
11
include/exec/tb-lookup.h | 18 ++++++++----------
10
accel/tcg/cpu-exec.c | 2 +-
12
accel/tcg/cpu-exec.c | 10 ++++++++--
11
1 file changed, 1 insertion(+), 1 deletion(-)
13
accel/tcg/tcg-runtime.c | 4 +++-
14
3 files changed, 19 insertions(+), 13 deletions(-)
15
12
16
diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h
17
index XXXXXXX..XXXXXXX 100644
18
--- a/include/exec/tb-lookup.h
19
+++ b/include/exec/tb-lookup.h
20
@@ -XXX,XX +XXX,XX @@
21
#include "exec/tb-hash.h"
22
23
/* Might cause an exception, so have a longjmp destination ready */
24
-static inline TranslationBlock *
25
-tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_base,
26
- uint32_t *flags, uint32_t cf_mask)
27
+static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
28
+ target_ulong cs_base,
29
+ uint32_t flags, uint32_t cf_mask)
30
{
31
- CPUArchState *env = (CPUArchState *)cpu->env_ptr;
32
TranslationBlock *tb;
33
uint32_t hash;
34
35
- cpu_get_tb_cpu_state(env, pc, cs_base, flags);
36
- hash = tb_jmp_cache_hash_func(*pc);
37
+ hash = tb_jmp_cache_hash_func(pc);
38
tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]);
39
40
cf_mask &= ~CF_CLUSTER_MASK;
41
cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT;
42
43
if (likely(tb &&
44
- tb->pc == *pc &&
45
- tb->cs_base == *cs_base &&
46
- tb->flags == *flags &&
47
+ tb->pc == pc &&
48
+ tb->cs_base == cs_base &&
49
+ tb->flags == flags &&
50
tb->trace_vcpu_dstate == *cpu->trace_dstate &&
51
(tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == cf_mask)) {
52
return tb;
53
}
54
- tb = tb_htable_lookup(cpu, *pc, *cs_base, *flags, cf_mask);
55
+ tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask);
56
if (tb == NULL) {
57
return NULL;
58
}
59
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
13
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
60
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
61
--- a/accel/tcg/cpu-exec.c
15
--- a/accel/tcg/cpu-exec.c
62
+++ b/accel/tcg/cpu-exec.c
16
+++ b/accel/tcg/cpu-exec.c
63
@@ -XXX,XX +XXX,XX @@ static void cpu_exec_exit(CPUState *cpu)
17
@@ -XXX,XX +XXX,XX @@
64
18
#include "sysemu/cpu-timers.h"
65
void cpu_exec_step_atomic(CPUState *cpu)
19
#include "exec/replay-core.h"
66
{
20
#include "sysemu/tcg.h"
67
+ CPUArchState *env = (CPUArchState *)cpu->env_ptr;
21
-#include "exec/helper-proto.h"
68
TranslationBlock *tb;
22
+#include "exec/helper-proto-common.h"
69
target_ulong cs_base, pc;
23
#include "tb-jmp-cache.h"
70
uint32_t flags;
24
#include "tb-hash.h"
71
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
25
#include "tb-context.h"
72
g_assert(!cpu->running);
73
cpu->running = true;
74
75
- tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
76
+ cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
77
+ tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
78
+
79
if (tb == NULL) {
80
mmap_lock();
81
tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
82
@@ -XXX,XX +XXX,XX @@ static inline TranslationBlock *tb_find(CPUState *cpu,
83
TranslationBlock *last_tb,
84
int tb_exit, uint32_t cf_mask)
85
{
86
+ CPUArchState *env = (CPUArchState *)cpu->env_ptr;
87
TranslationBlock *tb;
88
target_ulong cs_base, pc;
89
uint32_t flags;
90
91
- tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
92
+ cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
93
+
94
+ tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
95
if (tb == NULL) {
96
mmap_lock();
97
tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
98
diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c
99
index XXXXXXX..XXXXXXX 100644
100
--- a/accel/tcg/tcg-runtime.c
101
+++ b/accel/tcg/tcg-runtime.c
102
@@ -XXX,XX +XXX,XX @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
103
target_ulong cs_base, pc;
104
uint32_t flags;
105
106
- tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, curr_cflags());
107
+ cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
108
+
109
+ tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags());
110
if (tb == NULL) {
111
return tcg_code_gen_epilogue;
112
}
113
--
26
--
114
2.25.1
27
2.34.1
115
28
116
29
diff view generated by jsdifflib
[PULL 14/27] tcg/tci: Remove tci_read_r16
[PULL 15/16] exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY
1
Use explicit casts for ext16u opcodes, and allow truncation
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
to happen with the store for st16 opcodes, and with the call
3
for bswap16 opcodes.
4
2
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3
We want to check the softmmu tlb availability, not
4
if we are targetting system emulation. Besides, this
5
code could be used by user emulation in the future.
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230605230216.17202-1-philmd@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
11
---
8
tcg/tci.c | 28 +++++++---------------------
12
include/exec/cpu-defs.h | 12 ++++++------
9
1 file changed, 7 insertions(+), 21 deletions(-)
13
1 file changed, 6 insertions(+), 6 deletions(-)
10
14
11
diff --git a/tcg/tci.c b/tcg/tci.c
15
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
12
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
13
--- a/tcg/tci.c
17
--- a/include/exec/cpu-defs.h
14
+++ b/tcg/tci.c
18
+++ b/include/exec/cpu-defs.h
15
@@ -XXX,XX +XXX,XX @@ static int32_t tci_read_reg32s(const tcg_target_ulong *regs, TCGReg index)
19
@@ -XXX,XX +XXX,XX @@
16
}
20
*/
21
#define NB_MMU_MODES 16
22
23
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
24
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG)
25
#include "exec/tlb-common.h"
26
27
/* use a fully associative victim tlb of 8 entries */
28
@@ -XXX,XX +XXX,XX @@
29
# endif
30
# endif
31
32
-#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */
33
+#endif /* CONFIG_SOFTMMU && CONFIG_TCG */
34
35
-#if !defined(CONFIG_USER_ONLY)
36
+#if defined(CONFIG_SOFTMMU)
37
/*
38
* The full TLB entry, which is not accessed by generated TCG code,
39
* so the layout is not as critical as that of CPUTLBEntry. This is
40
@@ -XXX,XX +XXX,XX @@ typedef struct CPUTLBEntryFull {
41
TARGET_PAGE_ENTRY_EXTRA
17
#endif
42
#endif
18
43
} CPUTLBEntryFull;
19
-static uint16_t tci_read_reg16(const tcg_target_ulong *regs, TCGReg index)
44
-#endif /* !CONFIG_USER_ONLY */
20
-{
45
+#endif /* CONFIG_SOFTMMU */
21
- return (uint16_t)tci_read_reg(regs, index);
46
22
-}
47
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
23
-
48
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG)
24
static uint32_t tci_read_reg32(const tcg_target_ulong *regs, TCGReg index)
49
/*
25
{
50
* Data elements that are per MMU mode, minus the bits accessed by
26
return (uint32_t)tci_read_reg(regs, index);
51
* the TCG fast path.
27
@@ -XXX,XX +XXX,XX @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr)
52
@@ -XXX,XX +XXX,XX @@ typedef struct CPUTLB {
28
return value;
53
29
}
54
typedef struct CPUTLB { } CPUTLB;
30
55
31
-/* Read indexed register (16 bit) from bytecode. */
56
-#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */
32
-static uint16_t tci_read_r16(const tcg_target_ulong *regs,
57
+#endif /* CONFIG_SOFTMMU && CONFIG_TCG */
33
- const uint8_t **tb_ptr)
58
34
-{
59
/*
35
- uint16_t value = tci_read_reg16(regs, **tb_ptr);
60
* This structure must be placed in ArchCPU immediately
36
- *tb_ptr += 1;
37
- return value;
38
-}
39
-
40
#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
41
/* Read indexed register (16 bit signed) from bytecode. */
42
static int16_t tci_read_r16s(const tcg_target_ulong *regs,
43
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
44
*(uint8_t *)(t1 + t2) = t0;
45
break;
46
CASE_32_64(st16)
47
- t0 = tci_read_r16(regs, &tb_ptr);
48
+ t0 = tci_read_r(regs, &tb_ptr);
49
t1 = tci_read_r(regs, &tb_ptr);
50
t2 = tci_read_s32(&tb_ptr);
51
*(uint16_t *)(t1 + t2) = t0;
52
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
53
#if TCG_TARGET_HAS_ext16u_i32
54
case INDEX_op_ext16u_i32:
55
t0 = *tb_ptr++;
56
- t1 = tci_read_r16(regs, &tb_ptr);
57
- tci_write_reg(regs, t0, t1);
58
+ t1 = tci_read_r(regs, &tb_ptr);
59
+ tci_write_reg(regs, t0, (uint16_t)t1);
60
break;
61
#endif
62
#if TCG_TARGET_HAS_bswap16_i32
63
case INDEX_op_bswap16_i32:
64
t0 = *tb_ptr++;
65
- t1 = tci_read_r16(regs, &tb_ptr);
66
+ t1 = tci_read_r(regs, &tb_ptr);
67
tci_write_reg(regs, t0, bswap16(t1));
68
break;
69
#endif
70
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
71
#if TCG_TARGET_HAS_ext16u_i64
72
case INDEX_op_ext16u_i64:
73
t0 = *tb_ptr++;
74
- t1 = tci_read_r16(regs, &tb_ptr);
75
- tci_write_reg(regs, t0, t1);
76
+ t1 = tci_read_r(regs, &tb_ptr);
77
+ tci_write_reg(regs, t0, (uint16_t)t1);
78
break;
79
#endif
80
#if TCG_TARGET_HAS_ext32s_i64
81
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
82
#if TCG_TARGET_HAS_bswap16_i64
83
case INDEX_op_bswap16_i64:
84
t0 = *tb_ptr++;
85
- t1 = tci_read_r16(regs, &tb_ptr);
86
+ t1 = tci_read_r(regs, &tb_ptr);
87
tci_write_reg(regs, t0, bswap16(t1));
88
break;
89
#endif
90
--
61
--
91
2.25.1
62
2.34.1
92
63
93
64
diff view generated by jsdifflib
[PULL 27/27] accel/tcg: Precompute curr_cflags into cpu->tcg_cflags
[PULL 16/16] cputlb: Restrict SavedIOTLB to system emulation
1
The primary motivation is to remove a dozen insns along
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
the fast-path in tb_lookup. As a byproduct, this allows
3
us to completely remove parallel_cpus.
4
2
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
3
Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in
4
case of reset") added the SavedIOTLB structure -- which is
5
system emulation specific -- in the generic CPUState structure.
6
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Message-Id: <20221216215519.5522-3-philmd@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
11
---
8
accel/tcg/tcg-accel-ops.h | 1 +
12
include/hw/core/cpu.h | 6 ++++--
9
include/exec/exec-all.h | 7 +------
13
1 file changed, 4 insertions(+), 2 deletions(-)
10
include/hw/core/cpu.h | 2 ++
11
accel/tcg/cpu-exec.c | 3 ---
12
accel/tcg/tcg-accel-ops-mttcg.c | 3 +--
13
accel/tcg/tcg-accel-ops-rr.c | 2 +-
14
accel/tcg/tcg-accel-ops.c | 8 ++++++++
15
accel/tcg/translate-all.c | 4 ----
16
linux-user/main.c | 1 +
17
linux-user/sh4/signal.c | 8 +++++---
18
linux-user/syscall.c | 18 ++++++++++--------
19
11 files changed, 30 insertions(+), 27 deletions(-)
20
14
21
diff --git a/accel/tcg/tcg-accel-ops.h b/accel/tcg/tcg-accel-ops.h
22
index XXXXXXX..XXXXXXX 100644
23
--- a/accel/tcg/tcg-accel-ops.h
24
+++ b/accel/tcg/tcg-accel-ops.h
25
@@ -XXX,XX +XXX,XX @@
26
void tcg_cpus_destroy(CPUState *cpu);
27
int tcg_cpus_exec(CPUState *cpu);
28
void tcg_handle_interrupt(CPUState *cpu, int mask);
29
+void tcg_cpu_init_cflags(CPUState *cpu, bool parallel);
30
31
#endif /* TCG_CPUS_H */
32
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
33
index XXXXXXX..XXXXXXX 100644
34
--- a/include/exec/exec-all.h
35
+++ b/include/exec/exec-all.h
36
@@ -XXX,XX +XXX,XX @@ struct TranslationBlock {
37
uintptr_t jmp_dest[2];
38
};
39
40
-extern bool parallel_cpus;
41
-
42
/* Hide the qatomic_read to make code a little easier on the eyes */
43
static inline uint32_t tb_cflags(const TranslationBlock *tb)
44
{
45
@@ -XXX,XX +XXX,XX @@ static inline uint32_t tb_cflags(const TranslationBlock *tb)
46
/* current cflags for hashing/comparison */
47
static inline uint32_t curr_cflags(CPUState *cpu)
48
{
49
- uint32_t cflags = deposit32(0, CF_CLUSTER_SHIFT, 8, cpu->cluster_index);
50
- cflags |= parallel_cpus ? CF_PARALLEL : 0;
51
- cflags |= icount_enabled() ? CF_USE_ICOUNT : 0;
52
- return cflags;
53
+ return cpu->tcg_cflags;
54
}
55
56
/* TranslationBlock invalidate API */
57
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
15
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
58
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
59
--- a/include/hw/core/cpu.h
17
--- a/include/hw/core/cpu.h
60
+++ b/include/hw/core/cpu.h
18
+++ b/include/hw/core/cpu.h
61
@@ -XXX,XX +XXX,XX @@ struct qemu_work_item;
19
@@ -XXX,XX +XXX,XX @@ struct CPUWatchpoint {
62
* to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
20
QTAILQ_ENTRY(CPUWatchpoint) entry;
63
* be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
21
};
64
* QOM parent.
22
65
+ * @tcg_cflags: Pre-computed cflags for this cpu.
23
-#ifdef CONFIG_PLUGIN
66
* @nr_cores: Number of cores within this CPU package.
24
+#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
67
* @nr_threads: Number of threads within this CPU.
25
/*
68
* @running: #true if CPU is currently running (lockless).
26
* For plugins we sometime need to save the resolved iotlb data before
27
* the memory regions get moved around by io_writex.
69
@@ -XXX,XX +XXX,XX @@ struct CPUState {
28
@@ -XXX,XX +XXX,XX @@ struct CPUState {
29
30
#ifdef CONFIG_PLUGIN
31
GArray *plugin_mem_cbs;
32
+#if !defined(CONFIG_USER_ONLY)
33
/* saved iotlb data from io_writex */
34
SavedIOTLB saved_iotlb;
35
-#endif
36
+#endif /* !CONFIG_USER_ONLY */
37
+#endif /* CONFIG_PLUGIN */
38
70
/* TODO Move common fields from CPUArchState here. */
39
/* TODO Move common fields from CPUArchState here. */
71
int cpu_index;
40
int cpu_index;
72
int cluster_index;
73
+ uint32_t tcg_cflags;
74
uint32_t halted;
75
uint32_t can_do_io;
76
int32_t exception_index;
77
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
78
index XXXXXXX..XXXXXXX 100644
79
--- a/accel/tcg/cpu-exec.c
80
+++ b/accel/tcg/cpu-exec.c
81
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
82
mmap_unlock();
83
}
84
85
- /* Since we got here, we know that parallel_cpus must be true. */
86
- parallel_cpus = false;
87
cpu_exec_enter(cpu);
88
/* execute the generated code */
89
trace_exec_tb(tb, pc);
90
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
91
* the execution.
92
*/
93
g_assert(cpu_in_exclusive_context(cpu));
94
- parallel_cpus = true;
95
cpu->running = false;
96
end_exclusive();
97
}
98
diff --git a/accel/tcg/tcg-accel-ops-mttcg.c b/accel/tcg/tcg-accel-ops-mttcg.c
99
index XXXXXXX..XXXXXXX 100644
100
--- a/accel/tcg/tcg-accel-ops-mttcg.c
101
+++ b/accel/tcg/tcg-accel-ops-mttcg.c
102
@@ -XXX,XX +XXX,XX @@ void mttcg_start_vcpu_thread(CPUState *cpu)
103
char thread_name[VCPU_THREAD_NAME_SIZE];
104
105
g_assert(tcg_enabled());
106
-
107
- parallel_cpus = (current_machine->smp.max_cpus > 1);
108
+ tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1);
109
110
cpu->thread = g_malloc0(sizeof(QemuThread));
111
cpu->halt_cond = g_malloc0(sizeof(QemuCond));
112
diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c
113
index XXXXXXX..XXXXXXX 100644
114
--- a/accel/tcg/tcg-accel-ops-rr.c
115
+++ b/accel/tcg/tcg-accel-ops-rr.c
116
@@ -XXX,XX +XXX,XX @@ void rr_start_vcpu_thread(CPUState *cpu)
117
static QemuThread *single_tcg_cpu_thread;
118
119
g_assert(tcg_enabled());
120
- parallel_cpus = false;
121
+ tcg_cpu_init_cflags(cpu, false);
122
123
if (!single_tcg_cpu_thread) {
124
cpu->thread = g_malloc0(sizeof(QemuThread));
125
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
126
index XXXXXXX..XXXXXXX 100644
127
--- a/accel/tcg/tcg-accel-ops.c
128
+++ b/accel/tcg/tcg-accel-ops.c
129
@@ -XXX,XX +XXX,XX @@
130
131
/* common functionality among all TCG variants */
132
133
+void tcg_cpu_init_cflags(CPUState *cpu, bool parallel)
134
+{
135
+ uint32_t cflags = cpu->cluster_index << CF_CLUSTER_SHIFT;
136
+ cflags |= parallel ? CF_PARALLEL : 0;
137
+ cflags |= icount_enabled() ? CF_USE_ICOUNT : 0;
138
+ cpu->tcg_cflags = cflags;
139
+}
140
+
141
void tcg_cpus_destroy(CPUState *cpu)
142
{
143
cpu_thread_signal_destroyed(cpu);
144
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
145
index XXXXXXX..XXXXXXX 100644
146
--- a/accel/tcg/translate-all.c
147
+++ b/accel/tcg/translate-all.c
148
@@ -XXX,XX +XXX,XX @@ static void *l1_map[V_L1_MAX_SIZE];
149
TCGContext tcg_init_ctx;
150
__thread TCGContext *tcg_ctx;
151
TBContext tb_ctx;
152
-bool parallel_cpus;
153
154
static void page_table_config_init(void)
155
{
156
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
157
cflags = (cflags & ~CF_COUNT_MASK) | 1;
158
}
159
160
- cflags &= ~CF_CLUSTER_MASK;
161
- cflags |= cpu->cluster_index << CF_CLUSTER_SHIFT;
162
-
163
max_insns = cflags & CF_COUNT_MASK;
164
if (max_insns == 0) {
165
max_insns = CF_COUNT_MASK;
166
diff --git a/linux-user/main.c b/linux-user/main.c
167
index XXXXXXX..XXXXXXX 100644
168
--- a/linux-user/main.c
169
+++ b/linux-user/main.c
170
@@ -XXX,XX +XXX,XX @@ CPUArchState *cpu_copy(CPUArchState *env)
171
/* Reset non arch specific state */
172
cpu_reset(new_cpu);
173
174
+ new_cpu->tcg_cflags = cpu->tcg_cflags;
175
memcpy(new_env, env, sizeof(CPUArchState));
176
177
/* Clone all break/watchpoints.
178
diff --git a/linux-user/sh4/signal.c b/linux-user/sh4/signal.c
179
index XXXXXXX..XXXXXXX 100644
180
--- a/linux-user/sh4/signal.c
181
+++ b/linux-user/sh4/signal.c
182
@@ -XXX,XX +XXX,XX @@ static abi_ulong get_sigframe(struct target_sigaction *ka,
183
return (sp - frame_size) & -8ul;
184
}
185
186
-/* Notice when we're in the middle of a gUSA region and reset.
187
- Note that this will only occur for !parallel_cpus, as we will
188
- translate such sequences differently in a parallel context. */
189
+/*
190
+ * Notice when we're in the middle of a gUSA region and reset.
191
+ * Note that this will only occur when #CF_PARALLEL is unset, as we
192
+ * will translate such sequences differently in a parallel context.
193
+ */
194
static void unwind_gusa(CPUSH4State *regs)
195
{
196
/* If the stack pointer is sufficiently negative, and we haven't
197
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
198
index XXXXXXX..XXXXXXX 100644
199
--- a/linux-user/syscall.c
200
+++ b/linux-user/syscall.c
201
@@ -XXX,XX +XXX,XX @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
202
/* Grab a mutex so that thread setup appears atomic. */
203
pthread_mutex_lock(&clone_lock);
204
205
+ /*
206
+ * If this is our first additional thread, we need to ensure we
207
+ * generate code for parallel execution and flush old translations.
208
+ * Do this now so that the copy gets CF_PARALLEL too.
209
+ */
210
+ if (!(cpu->tcg_cflags & CF_PARALLEL)) {
211
+ cpu->tcg_cflags |= CF_PARALLEL;
212
+ tb_flush(cpu);
213
+ }
214
+
215
/* we create a new CPU instance. */
216
new_env = cpu_copy(env);
217
/* Init regs that differ from the parent. */
218
@@ -XXX,XX +XXX,XX @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
219
sigprocmask(SIG_BLOCK, &sigmask, &info.sigmask);
220
cpu->random_seed = qemu_guest_random_seed_thread_part1();
221
222
- /* If this is our first additional thread, we need to ensure we
223
- * generate code for parallel execution and flush old translations.
224
- */
225
- if (!parallel_cpus) {
226
- parallel_cpus = true;
227
- tb_flush(cpu);
228
- }
229
-
230
ret = pthread_create(&info.thread, &attr, clone_func, &info);
231
/* TODO: Free new CPU state if thread creation failed. */
232
233
--
41
--
234
2.25.1
42
2.34.1
235
43
236
44
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Patchew 2.1-devel-b67e4c2

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