V2 fixes a build problem that affected win32.

r~

The following changes since commit 187f35512106501fe9a11057f4d8705431e0026d:

Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-next-251019-3' into staging (2019-10-26 10:13:48 +0100)

https://github.com/rth7680/qemu.git tags/pull-tcg-20191028

for you to fetch changes up to fe9b676fb3160496b4b2bf0c57d33be724bf04c3:

translate-all: Remove tb_alloc (2019-10-28 10:35:23 +0100)

Improvements for TARGET_PAGE_BITS_VARY

Fix for TCI ld16u_i64.

Fix for segv on icount execute from i/o memory.

Two misc cleanups.

Alex Bennée (1):

cputlb: ensure _cmmu helper functions follow the naming standard

Clement Deschamps (1):

translate-all: fix uninitialized tb->orig_tb

Richard Henderson (8):

exec: Split out variable page size support to exec-vary.c

configure: Detect compiler support for __attribute__((alias))

exec: Use const alias for TARGET_PAGE_BITS_VARY

exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG

exec: Promote TARGET_PAGE_MASK to target_long

exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY

cputlb: Fix tlb_vaddr_to_host

translate-all: Remove tb_alloc

From: Stefan Weil <sw@weilnetz.de>

This fixes "make check-tcg" on a Debian x86_64 host.

Signed-off-by: Stefan Weil <sw@weilnetz.de>

Tested-by: Thomas Huth <thuth@redhat.com>

Message-Id: <20190410194838.10123-1-sw@weilnetz.de>

tcg/tci.c | 15 +++++++++++++++

1 file changed, 15 insertions(+)

@@ -XXX,XX +XXX,XX @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value)

tci_write_reg(regs, index, value);

}

+static void

+tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value)

+{

+ tci_write_reg(regs, index, value);

+}

+

static void

tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value)

{

@@ -XXX,XX +XXX,XX @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)

tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2));

case INDEX_op_ld8s_i32:

+ TODO();

+ break;

case INDEX_op_ld16u_i32:

TODO();

@@ -XXX,XX +XXX,XX @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)

tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2));

case INDEX_op_ld8s_i64:

+ TODO();

+ break;

case INDEX_op_ld16u_i64:

+ t2 = tci_read_s32(&tb_ptr);

+ tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2));

case INDEX_op_ld16s_i64:

TODO();

2.17.1

From: Alex Bennée <alex.bennee@linaro.org>

We document this in docs/devel/load-stores.rst so lets follow it. The

32 bit and 64 bit access functions have historically not included the

sign so we leave those as is. We also introduce some signed helpers

which are used for loading immediate values in the translator.

Fixes: 282dffc8

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org>

include/exec/cpu_ldst_template.h | 4 ++--

tcg/tcg.h | 20 ++++++++++++++------

accel/tcg/cputlb.c | 24 +++++++++++++++++++++---

target/cris/translate_v10.inc.c | 3 +--

4 files changed, 38 insertions(+), 13 deletions(-)

diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h

--- a/include/exec/cpu_ldst_template.h

+++ b/include/exec/cpu_ldst_template.h

@@ -XXX,XX +XXX,XX @@

#ifdef SOFTMMU_CODE_ACCESS

#define ADDR_READ addr_code

#define MMUSUFFIX _cmmu

-#define URETSUFFIX SUFFIX

-#define SRETSUFFIX SUFFIX

+#define URETSUFFIX USUFFIX

+#define SRETSUFFIX glue(s, SUFFIX)

#else

#define ADDR_READ addr_read

#define MMUSUFFIX _mmu

diff --git a/tcg/tcg.h b/tcg/tcg.h

index XXXXXXX..XXXXXXX 100644

--- a/tcg/tcg.h

+++ b/tcg/tcg.h

@@ -XXX,XX +XXX,XX @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,

void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,

TCGMemOpIdx oi, uintptr_t retaddr);

-uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,

+uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr);

-uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,

+int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr);

+uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr);

+int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr);

uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr);

uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr);

-uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,

- TCGMemOpIdx oi, uintptr_t retaddr);

+uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr);

+int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr);

uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr);

uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,

@@ -XXX,XX +XXX,XX @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,

# define helper_ret_stw_mmu helper_be_stw_mmu

# define helper_ret_stl_mmu helper_be_stl_mmu

# define helper_ret_stq_mmu helper_be_stq_mmu

-# define helper_ret_ldw_cmmu helper_be_ldw_cmmu

+# define helper_ret_lduw_cmmu helper_be_lduw_cmmu

+# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu

# define helper_ret_ldl_cmmu helper_be_ldl_cmmu

# define helper_ret_ldq_cmmu helper_be_ldq_cmmu

#else

@@ -XXX,XX +XXX,XX @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,

# define helper_ret_stw_mmu helper_le_stw_mmu

# define helper_ret_stl_mmu helper_le_stl_mmu

# define helper_ret_stq_mmu helper_le_stq_mmu

-# define helper_ret_ldw_cmmu helper_le_ldw_cmmu

+# define helper_ret_lduw_cmmu helper_le_lduw_cmmu

+# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu

# define helper_ret_ldl_cmmu helper_le_ldl_cmmu

# define helper_ret_ldq_cmmu helper_le_ldq_cmmu

#endif

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c

index XXXXXXX..XXXXXXX 100644

--- a/accel/tcg/cputlb.c

+++ b/accel/tcg/cputlb.c

@@ -XXX,XX +XXX,XX @@ static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr,

return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu);

-uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,

+uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr)

{

return full_ldub_cmmu(env, addr, oi, retaddr);

}

+int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr)

+ return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr);

static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr)

{

@@ -XXX,XX +XXX,XX @@ static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,

full_le_lduw_cmmu);

}

-uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,

+uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr)

{

return full_le_lduw_cmmu(env, addr, oi, retaddr);

}

+int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr)

+ return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr);

static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr)

{

@@ -XXX,XX +XXX,XX @@ static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,

full_be_lduw_cmmu);

}

-uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,

+uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr)

{

return full_be_lduw_cmmu(env, addr, oi, retaddr);

}

+int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr,

+ TCGMemOpIdx oi, uintptr_t retaddr)

+ return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr);

static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr,

TCGMemOpIdx oi, uintptr_t retaddr)

diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c

index XXXXXXX..XXXXXXX 100644

--- a/target/cris/translate_v10.inc.c

+++ b/target/cris/translate_v10.inc.c

@@ -XXX,XX +XXX,XX @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)

case CRISV10_IND_BCC_M:

cris_cc_mask(dc, 0);

- imm = cpu_ldsw_code(env, dc->pc + 2);

- simm = (int16_t)imm;

+ simm = cpu_ldsw_code(env, dc->pc + 2);

simm += 4;

LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm);

2.17.1

From: Wei Yang <richardw.yang@linux.intel.com>

Use ROUND_UP() to define, which is a little bit easy to read.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

Reviewed-by: Juan Quintela <quintela@redhat.com>

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>

Message-Id: <20191013021145.16011-2-richardw.yang@linux.intel.com>

include/exec/cpu-all.h | 7 +++----

1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h

--- a/include/exec/cpu-all.h

+++ b/include/exec/cpu-all.h

@@ -XXX,XX +XXX,XX @@ extern int target_page_bits;

#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)

#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)

-#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)

+#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE)

/* Using intptr_t ensures that qemu_*_page_mask is sign-extended even

* when intptr_t is 32-bit and we are aligning a long long.

@@ -XXX,XX +XXX,XX @@ extern int target_page_bits;

extern uintptr_t qemu_host_page_size;

extern intptr_t qemu_host_page_mask;

-#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)

-#define REAL_HOST_PAGE_ALIGN(addr) (((addr) + qemu_real_host_page_size - 1) & \

- qemu_real_host_page_mask)

+#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size)

+#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size)

/* same as PROT_xxx */

#define PAGE_READ 0x0001

2.17.1

The next patch will play a trick with "const" that will

confuse the compiler about the uses of target_page_bits

within exec.c. Moving everything to a new file prevents

this confusion.

No functional change so far.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>

Makefile.target | 2 +-

include/qemu-common.h | 6 +++++

exec-vary.c | 57 +++++++++++++++++++++++++++++++++++++++++++

exec.c | 34 --------------------------

4 files changed, 64 insertions(+), 35 deletions(-)

create mode 100644 exec-vary.c

diff --git a/Makefile.target b/Makefile.target

--- a/Makefile.target

+++ b/Makefile.target

@@ -XXX,XX +XXX,XX @@ obj-y += trace/

#########################################################

# cpu emulator library

-obj-y += exec.o

+obj-y += exec.o exec-vary.o

obj-y += accel/

obj-$(CONFIG_TCG) += tcg/tcg.o tcg/tcg-op.o tcg/tcg-op-vec.o tcg/tcg-op-gvec.o

obj-$(CONFIG_TCG) += tcg/tcg-common.o tcg/optimize.o

diff --git a/include/qemu-common.h b/include/qemu-common.h

index XXXXXXX..XXXXXXX 100644

--- a/include/qemu-common.h

+++ b/include/qemu-common.h

@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu);

*/

bool set_preferred_target_page_bits(int bits);

+/**

+ * finalize_target_page_bits:

+ * Commit the final value set by set_preferred_target_page_bits.

+ */

+void finalize_target_page_bits(void);

+

/**

* Sends a (part of) iovec down a socket, yielding when the socket is full, or

* Receives data into a (part of) iovec from a socket,

diff --git a/exec-vary.c b/exec-vary.c

new file mode 100644

index XXXXXXX..XXXXXXX

--- /dev/null

+++ b/exec-vary.c

@@ -XXX,XX +XXX,XX @@

+/*

+ * Variable page size handling

+ *

+ * Copyright (c) 2003 Fabrice Bellard

+ *

+ * This library is free software; you can redistribute it and/or

+ * modify it under the terms of the GNU Lesser General Public

+ * License as published by the Free Software Foundation; either

+ * version 2 of the License, or (at your option) any later version.

+ *

+ * This library is distributed in the hope that it will be useful,

+ * but WITHOUT ANY WARRANTY; without even the implied warranty of

+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU

+ * Lesser General Public License for more details.

+ *

+ * You should have received a copy of the GNU Lesser General Public

+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.

+ */

+

+#include "qemu/osdep.h"

+#include "qemu-common.h"

+#include "exec/exec-all.h"

+

+#ifdef TARGET_PAGE_BITS_VARY

+int target_page_bits;

+bool target_page_bits_decided;

+#endif

+

+bool set_preferred_target_page_bits(int bits)

+{

+ /*

+ * The target page size is the lowest common denominator for all

+ * the CPUs in the system, so we can only make it smaller, never

+ * larger. And we can't make it smaller once we've committed to

+ * a particular size.

+ */

+#ifdef TARGET_PAGE_BITS_VARY

+ assert(bits >= TARGET_PAGE_BITS_MIN);

+ if (target_page_bits == 0 || target_page_bits > bits) {

+ if (target_page_bits_decided) {

+ return false;

+ }

+ target_page_bits = bits;

+ }

+#endif

+ return true;

+}

+

+void finalize_target_page_bits(void)

+{

+#ifdef TARGET_PAGE_BITS_VARY

+ if (target_page_bits == 0) {

+ target_page_bits = TARGET_PAGE_BITS_MIN;

+ }

+ target_page_bits_decided = true;

+#endif

+}

diff --git a/exec.c b/exec.c

index XXXXXXX..XXXXXXX 100644

--- a/exec.c

+++ b/exec.c

@@ -XXX,XX +XXX,XX @@ AddressSpace address_space_memory;

static MemoryRegion io_mem_unassigned;

-#ifdef TARGET_PAGE_BITS_VARY

-int target_page_bits;

-bool target_page_bits_decided;

-#endif

-

CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);

/* current CPU in the current thread. It is only valid inside

@@ -XXX,XX +XXX,XX @@ int use_icount;

uintptr_t qemu_host_page_size;

intptr_t qemu_host_page_mask;

-bool set_preferred_target_page_bits(int bits)

- /* The target page size is the lowest common denominator for all

- * the CPUs in the system, so we can only make it smaller, never

- * larger. And we can't make it smaller once we've committed to

- * a particular size.

- */

-#ifdef TARGET_PAGE_BITS_VARY

- assert(bits >= TARGET_PAGE_BITS_MIN);

- if (target_page_bits == 0 || target_page_bits > bits) {

- if (target_page_bits_decided) {

- return false;

- }

- target_page_bits = bits;

- }

-#endif

- return true;

#if !defined(CONFIG_USER_ONLY)

-static void finalize_target_page_bits(void)

-#ifdef TARGET_PAGE_BITS_VARY

- if (target_page_bits == 0) {

- target_page_bits = TARGET_PAGE_BITS_MIN;

- }

- target_page_bits_decided = true;

-#endif

typedef struct PhysPageEntry PhysPageEntry;

struct PhysPageEntry {

2.17.1

Such support is present almost everywhere, except for Xcode 9.

It is added in Xcode 10, but travis uses xcode9 by default,

so we should support it for a while yet.

configure | 19 +++++++++++++++++++

1 file changed, 19 insertions(+)

diff --git a/configure b/configure

index XXXXXXX..XXXXXXX 100755

--- a/configure

+++ b/configure

@@ -XXX,XX +XXX,XX @@ if compile_prog "" "" ; then

vector16=yes

fi

+########################################

+# See if __attribute__((alias)) is supported.

+# This false for Xcode 9, but has been remedied for Xcode 10.

+# Unfortunately, travis uses Xcode 9 by default.