[v1] target/mips: Reintroduce the R5900 CPU (with more testing)

[RFC PATCH 05/42] target/mips: Rename 128-bit upper halve GPR registers

Posted by Philippe Mathieu-Daudé 4 years, 12 months ago

TCG displays the upper halve registers with the same name
as their lower halves. Rename the upper halves with the
'[hi]' suffix.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index ab9b0999c93..9c034c934d5 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -29289,10 +29289,12 @@ void mips_tcg_init(void)
     cpu_gpr_hi[0] = NULL;
 
     for (unsigned i = 1; i < 32; i++) {
+        g_autofree char *rname = g_strdup_printf("%s[hi]", regnames[i]);
+
         cpu_gpr_hi[i] = tcg_global_mem_new_i64(cpu_env,
                                                offsetof(CPUMIPSState,
                                                         active_tc.gpr_hi[i]),
-                                               regnames[i]);
+                                               rname);
     }
 #endif /* !TARGET_MIPS64 */
     for (i = 0; i < 32; i++) {
-- 
2.26.2

Re: [RFC PATCH 05/42] target/mips: Rename 128-bit upper halve GPR registers

Posted by Richard Henderson 4 years, 11 months ago

On 2/14/21 9:58 AM, Philippe Mathieu-Daudé wrote:
> TCG displays the upper halve registers with the same name
> as their lower halves. Rename the upper halves with the
> '[hi]' suffix.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/translate.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~