| 1 | no changes to v1, except adding the CVE identifier to one of the commit | 1 | Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx |
|---|---|---|---|
| 2 | messages. | 2 | ethernet device failed 'make check' on big-endian hosts. |
| 3 | 3 | ||
| 4 | -- PMM | 4 | -- PMM |
| 5 | 5 | ||
| 6 | The following changes since commit cf7ca7d5b9faca13f1f8e3ea92cfb2f741eb0c0e: | 6 | The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf: |
| 7 | 7 | ||
| 8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/tracing-pull-request' into staging (2021-02-01 16:28:00 +0000) | 8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000) |
| 9 | 9 | ||
| 10 | are available in the Git repository at: | 10 | are available in the Git repository at: |
| 11 | 11 | ||
| 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210203 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1 |
| 13 | 13 | ||
| 14 | for you to fetch changes up to fd8f71b95da86f530aae3d02a14b0ccd9e024772: | 14 | for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621: |
| 15 | 15 | ||
| 16 | hw/arm: Display CPU type in machine description (2021-02-03 10:15:51 +0000) | 16 | target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000) |
| 17 | 17 | ||
| 18 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 19 | target-arm queue: | 19 | target-arm queue: |
| 20 | * hw/intc/arm_gic: Allow to use QTest without crashing | 20 | * Correctly initialize MDCR_EL2.HPMN |
| 21 | * hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled | 21 | * versal: Use nr_apu_cpus in favor of hard coding 2 |
| 22 | * hw/char/exynos4210_uart: Fix missing call to report ready for input | 22 | * accel/tcg: Add URL of clang bug to comment about our workaround |
| 23 | * hw/arm/smmuv3: Fix addr_mask for range-based invalidation | 23 | * Add support for FEAT_DIT, Data Independent Timing |
| 24 | * hw/ssi/imx_spi: Fix various minor bugs | 24 | * Remove GPIO from unimplemented NPCM7XX |
| 25 | * hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register | 25 | * Fix SCR RES1 handling |
| 26 | * hw/arm: Add missing Kconfig dependencies | 26 | * Don't migrate CPUARMState.features |
| 27 | * hw/arm: Display CPU type in machine description | ||
| 28 | 27 | ||
| 29 | ---------------------------------------------------------------- | 28 | ---------------------------------------------------------------- |
| 30 | Bin Meng (5): | 29 | Aaron Lindsay (1): |
| 31 | hw/ssi: imx_spi: Use a macro for number of chip selects supported | 30 | target/arm: Don't migrate CPUARMState.features |
| 32 | hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() | ||
| 33 | hw/ssi: imx_spi: Round up the burst length to be multiple of 8 | ||
| 34 | hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic | ||
| 35 | hw/ssi: imx_spi: Correct tx and rx fifo endianness | ||
| 36 | 31 | ||
| 37 | Iris Johnson (2): | 32 | Daniel Müller (1): |
| 38 | hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled | 33 | target/arm: Correctly initialize MDCR_EL2.HPMN |
| 39 | hw/char/exynos4210_uart: Fix missing call to report ready for input | ||
| 40 | 34 | ||
| 41 | Philippe Mathieu-Daudé (12): | 35 | Edgar E. Iglesias (1): |
| 42 | hw/intc/arm_gic: Allow to use QTest without crashing | 36 | hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 |
| 43 | hw/ssi: imx_spi: Remove pointless variable initialization | ||
| 44 | hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value | ||
| 45 | hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled | ||
| 46 | hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled | ||
| 47 | hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register | ||
| 48 | hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ | ||
| 49 | hw/arm/exynos4210: Add missing dependency on OR_IRQ | ||
| 50 | hw/arm/xlnx-versal: Versal SoC requires ZDMA | ||
| 51 | hw/arm/xlnx-versal: Versal SoC requires ZynqMP peripherals | ||
| 52 | hw/net/can: ZynqMP CAN device requires PTIMER | ||
| 53 | hw/arm: Display CPU type in machine description | ||
| 54 | 37 | ||
| 55 | Xuzhou Cheng (1): | 38 | Hao Wu (1): |
| 56 | hw/ssi: imx_spi: Disable chip selects when controller is disabled | 39 | hw/arm: Remove GPIO from unimplemented NPCM7XX |
| 57 | 40 | ||
| 58 | Zenghui Yu (1): | 41 | Mike Nawrocki (1): |
| 59 | hw/arm/smmuv3: Fix addr_mask for range-based invalidation | 42 | target/arm: Fix SCR RES1 handling |
| 60 | 43 | ||
| 61 | include/hw/ssi/imx_spi.h | 5 +- | 44 | Peter Maydell (2): |
| 62 | hw/arm/digic_boards.c | 2 +- | 45 | arm: Update infocenter.arm.com URLs |
| 63 | hw/arm/microbit.c | 2 +- | 46 | accel/tcg: Add URL of clang bug to comment about our workaround |
| 64 | hw/arm/netduino2.c | 2 +- | ||
| 65 | hw/arm/netduinoplus2.c | 2 +- | ||
| 66 | hw/arm/orangepi.c | 2 +- | ||
| 67 | hw/arm/smmuv3.c | 4 +- | ||
| 68 | hw/arm/stellaris.c | 4 +- | ||
| 69 | hw/char/exynos4210_uart.c | 7 ++- | ||
| 70 | hw/intc/arm_gic.c | 5 +- | ||
| 71 | hw/ssi/imx_spi.c | 153 +++++++++++++++++++++++++++++----------------- | ||
| 72 | hw/Kconfig | 1 + | ||
| 73 | hw/arm/Kconfig | 5 ++ | ||
| 74 | hw/dma/Kconfig | 3 + | ||
| 75 | hw/dma/meson.build | 2 +- | ||
| 76 | 15 files changed, 130 insertions(+), 69 deletions(-) | ||
| 77 | 47 | ||
| 48 | Rebecca Cran (4): | ||
| 49 | target/arm: Add support for FEAT_DIT, Data Independent Timing | ||
| 50 | target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate | ||
| 51 | target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU | ||
| 52 | target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU | ||
| 53 | |||
| 54 | include/hw/dma/pl080.h | 7 ++-- | ||
| 55 | include/hw/misc/arm_integrator_debug.h | 2 +- | ||
| 56 | include/hw/ssi/pl022.h | 5 ++- | ||
| 57 | target/arm/cpu.h | 17 ++++++++ | ||
| 58 | target/arm/internals.h | 6 +++ | ||
| 59 | accel/tcg/cpu-exec.c | 25 +++++++++--- | ||
| 60 | hw/arm/aspeed_ast2600.c | 2 +- | ||
| 61 | hw/arm/musca.c | 4 +- | ||
| 62 | hw/arm/npcm7xx.c | 8 ---- | ||
| 63 | hw/arm/xlnx-versal.c | 4 +- | ||
| 64 | hw/misc/arm_integrator_debug.c | 2 +- | ||
| 65 | hw/timer/arm_timer.c | 7 ++-- | ||
| 66 | target/arm/cpu.c | 4 ++ | ||
| 67 | target/arm/cpu64.c | 5 +++ | ||
| 68 | target/arm/helper-a64.c | 27 +++++++++++-- | ||
| 69 | target/arm/helper.c | 71 +++++++++++++++++++++++++++------- | ||
| 70 | target/arm/machine.c | 2 +- | ||
| 71 | target/arm/op_helper.c | 9 +---- | ||
| 72 | target/arm/translate-a64.c | 12 ++++++ | ||
| 73 | 19 files changed, 164 insertions(+), 55 deletions(-) | ||
| 74 | diff view generated by jsdifflib |