[PULL v2 00/29] target-arm queue
[PULL v2 00/57] target-arm queue
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v2: drop pvpanic-pci patches.
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Squashed in a trivial fix for 32-bit hosts:
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The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
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--- a/target/arm/mve_helper.c
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+++ b/target/arm/mve_helper.c
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@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
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acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
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m[H##ESIZE(e)])); \
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} \
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- acc = int128_add(acc, 1 << 7); \
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+ acc = int128_add(acc, int128_make64(1 << 7)); \
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} \
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} \
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mve_advance_vpt(env); \
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
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-- PMM
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The following changes since commit 53f306f316549d20c76886903181413d20842423:
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Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
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for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
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for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
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docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
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docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Implement IMPDEF pauth algorithm
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* Don't require 'virt' board to be compiled in for ACPI GHES code
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* Support ARMv8.4-SEL2
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* docs: Document which architecture extensions we emulate
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* Fix bug where we were truncating predicate vector lengths in SVE insns
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* Fix bugs in M-profile FPCXT_NS accesses
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* npcm7xx_adc-test: Fix memleak in adc_qom_set
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* First slice of MVE patches
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* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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* Implement MTE3
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* docs: Build and install all the docs in a single manual
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* docs/system: arm: Add nRF boards description
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----------------------------------------------------------------
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----------------------------------------------------------------
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Gan Qixin (1):
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Alexandre Iooss (1):
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npcm7xx_adc-test: Fix memleak in adc_qom_set
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docs/system: arm: Add nRF boards description
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Peter Maydell (1):
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Peter Collingbourne (1):
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docs: Build and install all the docs in a single manual
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target/arm: Implement MTE3
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Philippe Mathieu-Daudé (1):
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Peter Maydell (55):
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target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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hw/acpi: Provide stub version of acpi_ghes_record_errors()
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hw/acpi: Provide function acpi_ghes_present()
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target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
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docs/system/arm: Document which architecture extensions we emulate
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target/arm/translate-vfp.c: Whitespace fixes
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target/arm: Handle FPU being disabled in FPCXT_NS accesses
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target/arm: Don't NOCP fault for FPCXT_NS accesses
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target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
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target/arm: Factor FP context update code out into helper function
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target/arm: Split vfp_access_check() into A and M versions
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target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
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target/arm: Implement MVE VLDR/VSTR (non-widening forms)
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target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
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target/arm: Implement MVE VCLZ
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target/arm: Implement MVE VCLS
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target/arm: Implement MVE VREV16, VREV32, VREV64
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target/arm: Implement MVE VMVN (register)
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target/arm: Implement MVE VABS
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target/arm: Implement MVE VNEG
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tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
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target/arm: Implement MVE VDUP
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target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
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target/arm: Implement MVE VADD, VSUB, VMUL
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target/arm: Implement MVE VMULH
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target/arm: Implement MVE VRMULH
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target/arm: Implement MVE VMAX, VMIN
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target/arm: Implement MVE VABD
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target/arm: Implement MVE VHADD, VHSUB
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target/arm: Implement MVE VMULL
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target/arm: Implement MVE VMLALDAV
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target/arm: Implement MVE VMLSLDAV
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target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
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target/arm: Implement MVE VADD (scalar)
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target/arm: Implement MVE VSUB, VMUL (scalar)
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target/arm: Implement MVE VHADD, VHSUB (scalar)
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target/arm: Implement MVE VBRSR
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target/arm: Implement MVE VPST
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target/arm: Implement MVE VQADD and VQSUB
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target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
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target/arm: Implement MVE VQDMULL scalar
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target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
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target/arm: Implement MVE VQADD, VQSUB (vector)
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target/arm: Implement MVE VQSHL (vector)
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target/arm: Implement MVE VQRSHL
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target/arm: Implement MVE VSHL insn
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target/arm: Implement MVE VRSHL
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target/arm: Implement MVE VQDMLADH and VQRDMLADH
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target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
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target/arm: Implement MVE VQDMULL (vector)
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target/arm: Implement MVE VRHADD
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target/arm: Implement MVE VADC, VSBC
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target/arm: Implement MVE VCADD
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target/arm: Implement MVE VHCADD
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target/arm: Implement MVE VADDV
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target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
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Richard Henderson (7):
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docs/system/arm/emulation.rst | 103 ++++
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target/arm: Implement an IMPDEF pauth algorithm
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docs/system/arm/nrf.rst | 51 ++
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target/arm: Add cpu properties to control pauth
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docs/system/target-arm.rst | 7 +
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target/arm: Use object_property_add_bool for "sve" property
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include/hw/acpi/ghes.h | 9 +
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target/arm: Introduce PREDDESC field definitions
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include/tcg/tcg-op.h | 8 +
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target/arm: Update PFIRST, PNEXT for pred_desc
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include/tcg/tcg.h | 1 -
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target/arm: Update ZIP, UZP, TRN for pred_desc
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target/arm/helper-mve.h | 357 +++++++++++++
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target/arm: Update REV, PUNPK for pred_desc
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target/arm/helper.h | 2 +
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target/arm/internals.h | 11 +
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target/arm/translate-a32.h | 3 +
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target/arm/translate.h | 10 +
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target/arm/m-nocp.decode | 24 +
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target/arm/mve.decode | 240 +++++++++
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target/arm/vfp.decode | 14 -
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hw/acpi/ghes-stub.c | 22 +
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hw/acpi/ghes.c | 17 +
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target/arm/cpu64.c | 2 +-
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target/arm/kvm64.c | 6 +-
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target/arm/mte_helper.c | 82 +--
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target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
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target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
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target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
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target/arm/translate-vfp.c | 741 +++++++-------------------
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tcg/tcg-op-gvec.c | 20 +-
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MAINTAINERS | 1 +
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hw/acpi/meson.build | 6 +-
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target/arm/meson.build | 1 +
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27 files changed, 3578 insertions(+), 629 deletions(-)
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create mode 100644 docs/system/arm/emulation.rst
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create mode 100644 docs/system/arm/nrf.rst
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create mode 100644 target/arm/helper-mve.h
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create mode 100644 hw/acpi/ghes-stub.c
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create mode 100644 target/arm/mve_helper.c
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135
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Rémi Denis-Courmont (19):
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target/arm: remove redundant tests
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target/arm: add arm_is_el2_enabled() helper
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target/arm: use arm_is_el2_enabled() where applicable
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target/arm: use arm_hcr_el2_eff() where applicable
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target/arm: factor MDCR_EL2 common handling
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target/arm: Define isar_feature function to test for presence of SEL2
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target/arm: add 64-bit S-EL2 to EL exception table
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target/arm: add MMU stage 1 for Secure EL2
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target/arm: add ARMv8.4-SEL2 system registers
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target/arm: handle VMID change in secure state
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target/arm: do S1_ptw_translate() before address space lookup
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target/arm: translate NS bit in page-walks
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target/arm: generalize 2-stage page-walk condition
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target/arm: secure stage 2 translation regime
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target/arm: set HPFAR_EL2.NS on secure stage 2 faults
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target/arm: revector to run-time pick target EL
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target/arm: Implement SCR_EL2.EEL2
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target/arm: enable Secure EL2 in max CPU
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target/arm: refactor vae1_tlbmask()
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docs/conf.py | 46 ++++-
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docs/devel/conf.py | 15 --
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docs/index.html.in | 17 --
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docs/interop/conf.py | 28 ---
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docs/meson.build | 64 +++---
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docs/specs/conf.py | 16 --
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docs/system/arm/cpu-features.rst | 21 ++
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docs/system/conf.py | 28 ---
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docs/tools/conf.py | 37 ----
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docs/user/conf.py | 15 --
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include/qemu/xxhash.h | 98 +++++++++
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target/arm/cpu-param.h | 2 +-
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target/arm/cpu.h | 107 ++++++++--
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target/arm/internals.h | 45 +++++
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target/arm/cpu.c | 23 ++-
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target/arm/cpu64.c | 65 ++++--
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target/arm/helper-a64.c | 8 +-
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target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
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target/arm/m_helper.c | 2 +-
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target/arm/monitor.c | 1 +
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target/arm/op_helper.c | 4 +-
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target/arm/pauth_helper.c | 27 ++-
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target/arm/sve_helper.c | 33 ++--
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target/arm/tlb_helper.c | 3 +
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target/arm/translate-a64.c | 4 +
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target/arm/translate-sve.c | 31 ++-
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target/arm/translate.c | 36 +++-
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tests/qtest/arm-cpu-features.c | 13 ++
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tests/qtest/npcm7xx_adc-test.c | 1 +
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.gitlab-ci.yml | 4 +-
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30 files changed, 770 insertions(+), 438 deletions(-)
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delete mode 100644 docs/devel/conf.py
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delete mode 100644 docs/index.html.in
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delete mode 100644 docs/interop/conf.py
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delete mode 100644 docs/specs/conf.py
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delete mode 100644 docs/system/conf.py
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delete mode 100644 docs/tools/conf.py
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delete mode 100644 docs/user/conf.py
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