| 1 | v2: drop pvpanic-pci patches. | 1 | no changes to v1, except adding the CVE identifier to one of the commit |
|---|---|---|---|
| 2 | messages. | ||
| 2 | 3 | ||
| 3 | The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c: | 4 | -- PMM |
| 4 | 5 | ||
| 5 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000) | 6 | The following changes since commit cf7ca7d5b9faca13f1f8e3ea92cfb2f741eb0c0e: |
| 7 | |||
| 8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/tracing-pull-request' into staging (2021-02-01 16:28:00 +0000) | ||
| 6 | 9 | ||
| 7 | are available in the Git repository at: | 10 | are available in the Git repository at: |
| 8 | 11 | ||
| 9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210203 |
| 10 | 13 | ||
| 11 | for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8: | 14 | for you to fetch changes up to fd8f71b95da86f530aae3d02a14b0ccd9e024772: |
| 12 | 15 | ||
| 13 | docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000) | 16 | hw/arm: Display CPU type in machine description (2021-02-03 10:15:51 +0000) |
| 14 | 17 | ||
| 15 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 16 | target-arm queue: | 19 | target-arm queue: |
| 17 | * Implement IMPDEF pauth algorithm | 20 | * hw/intc/arm_gic: Allow to use QTest without crashing |
| 18 | * Support ARMv8.4-SEL2 | 21 | * hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled |
| 19 | * Fix bug where we were truncating predicate vector lengths in SVE insns | 22 | * hw/char/exynos4210_uart: Fix missing call to report ready for input |
| 20 | * npcm7xx_adc-test: Fix memleak in adc_qom_set | 23 | * hw/arm/smmuv3: Fix addr_mask for range-based invalidation |
| 21 | * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error | 24 | * hw/ssi/imx_spi: Fix various minor bugs |
| 22 | * docs: Build and install all the docs in a single manual | 25 | * hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register |
| 26 | * hw/arm: Add missing Kconfig dependencies | ||
| 27 | * hw/arm: Display CPU type in machine description | ||
| 23 | 28 | ||
| 24 | ---------------------------------------------------------------- | 29 | ---------------------------------------------------------------- |
| 25 | Gan Qixin (1): | 30 | Bin Meng (5): |
| 26 | npcm7xx_adc-test: Fix memleak in adc_qom_set | 31 | hw/ssi: imx_spi: Use a macro for number of chip selects supported |
| 32 | hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() | ||
| 33 | hw/ssi: imx_spi: Round up the burst length to be multiple of 8 | ||
| 34 | hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic | ||
| 35 | hw/ssi: imx_spi: Correct tx and rx fifo endianness | ||
| 27 | 36 | ||
| 28 | Peter Maydell (1): | 37 | Iris Johnson (2): |
| 29 | docs: Build and install all the docs in a single manual | 38 | hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled |
| 39 | hw/char/exynos4210_uart: Fix missing call to report ready for input | ||
| 30 | 40 | ||
| 31 | Philippe Mathieu-Daudé (1): | 41 | Philippe Mathieu-Daudé (12): |
| 32 | target/arm/m_helper: Silence GCC 10 maybe-uninitialized error | 42 | hw/intc/arm_gic: Allow to use QTest without crashing |
| 43 | hw/ssi: imx_spi: Remove pointless variable initialization | ||
| 44 | hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value | ||
| 45 | hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled | ||
| 46 | hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled | ||
| 47 | hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register | ||
| 48 | hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ | ||
| 49 | hw/arm/exynos4210: Add missing dependency on OR_IRQ | ||
| 50 | hw/arm/xlnx-versal: Versal SoC requires ZDMA | ||
| 51 | hw/arm/xlnx-versal: Versal SoC requires ZynqMP peripherals | ||
| 52 | hw/net/can: ZynqMP CAN device requires PTIMER | ||
| 53 | hw/arm: Display CPU type in machine description | ||
| 33 | 54 | ||
| 34 | Richard Henderson (7): | 55 | Xuzhou Cheng (1): |
| 35 | target/arm: Implement an IMPDEF pauth algorithm | 56 | hw/ssi: imx_spi: Disable chip selects when controller is disabled |
| 36 | target/arm: Add cpu properties to control pauth | ||
| 37 | target/arm: Use object_property_add_bool for "sve" property | ||
| 38 | target/arm: Introduce PREDDESC field definitions | ||
| 39 | target/arm: Update PFIRST, PNEXT for pred_desc | ||
| 40 | target/arm: Update ZIP, UZP, TRN for pred_desc | ||
| 41 | target/arm: Update REV, PUNPK for pred_desc | ||
| 42 | 57 | ||
| 43 | Rémi Denis-Courmont (19): | 58 | Zenghui Yu (1): |
| 44 | target/arm: remove redundant tests | 59 | hw/arm/smmuv3: Fix addr_mask for range-based invalidation |
| 45 | target/arm: add arm_is_el2_enabled() helper | ||
| 46 | target/arm: use arm_is_el2_enabled() where applicable | ||
| 47 | target/arm: use arm_hcr_el2_eff() where applicable | ||
| 48 | target/arm: factor MDCR_EL2 common handling | ||
| 49 | target/arm: Define isar_feature function to test for presence of SEL2 | ||
| 50 | target/arm: add 64-bit S-EL2 to EL exception table | ||
| 51 | target/arm: add MMU stage 1 for Secure EL2 | ||
| 52 | target/arm: add ARMv8.4-SEL2 system registers | ||
| 53 | target/arm: handle VMID change in secure state | ||
| 54 | target/arm: do S1_ptw_translate() before address space lookup | ||
| 55 | target/arm: translate NS bit in page-walks | ||
| 56 | target/arm: generalize 2-stage page-walk condition | ||
| 57 | target/arm: secure stage 2 translation regime | ||
| 58 | target/arm: set HPFAR_EL2.NS on secure stage 2 faults | ||
| 59 | target/arm: revector to run-time pick target EL | ||
| 60 | target/arm: Implement SCR_EL2.EEL2 | ||
| 61 | target/arm: enable Secure EL2 in max CPU | ||
| 62 | target/arm: refactor vae1_tlbmask() | ||
| 63 | 60 | ||
| 64 | docs/conf.py | 46 ++++- | 61 | include/hw/ssi/imx_spi.h | 5 +- |
| 65 | docs/devel/conf.py | 15 -- | 62 | hw/arm/digic_boards.c | 2 +- |
| 66 | docs/index.html.in | 17 -- | 63 | hw/arm/microbit.c | 2 +- |
| 67 | docs/interop/conf.py | 28 --- | 64 | hw/arm/netduino2.c | 2 +- |
| 68 | docs/meson.build | 64 +++--- | 65 | hw/arm/netduinoplus2.c | 2 +- |
| 69 | docs/specs/conf.py | 16 -- | 66 | hw/arm/orangepi.c | 2 +- |
| 70 | docs/system/arm/cpu-features.rst | 21 ++ | 67 | hw/arm/smmuv3.c | 4 +- |
| 71 | docs/system/conf.py | 28 --- | 68 | hw/arm/stellaris.c | 4 +- |
| 72 | docs/tools/conf.py | 37 ---- | 69 | hw/char/exynos4210_uart.c | 7 ++- |
| 73 | docs/user/conf.py | 15 -- | 70 | hw/intc/arm_gic.c | 5 +- |
| 74 | include/qemu/xxhash.h | 98 +++++++++ | 71 | hw/ssi/imx_spi.c | 153 +++++++++++++++++++++++++++++----------------- |
| 75 | target/arm/cpu-param.h | 2 +- | 72 | hw/Kconfig | 1 + |
| 76 | target/arm/cpu.h | 107 ++++++++-- | 73 | hw/arm/Kconfig | 5 ++ |
| 77 | target/arm/internals.h | 45 +++++ | 74 | hw/dma/Kconfig | 3 + |
| 78 | target/arm/cpu.c | 23 ++- | 75 | hw/dma/meson.build | 2 +- |
| 79 | target/arm/cpu64.c | 65 ++++-- | 76 | 15 files changed, 130 insertions(+), 69 deletions(-) |
| 80 | target/arm/helper-a64.c | 8 +- | ||
| 81 | target/arm/helper.c | 414 ++++++++++++++++++++++++++------------- | ||
| 82 | target/arm/m_helper.c | 2 +- | ||
| 83 | target/arm/monitor.c | 1 + | ||
| 84 | target/arm/op_helper.c | 4 +- | ||
| 85 | target/arm/pauth_helper.c | 27 ++- | ||
| 86 | target/arm/sve_helper.c | 33 ++-- | ||
| 87 | target/arm/tlb_helper.c | 3 + | ||
| 88 | target/arm/translate-a64.c | 4 + | ||
| 89 | target/arm/translate-sve.c | 31 ++- | ||
| 90 | target/arm/translate.c | 36 +++- | ||
| 91 | tests/qtest/arm-cpu-features.c | 13 ++ | ||
| 92 | tests/qtest/npcm7xx_adc-test.c | 1 + | ||
| 93 | .gitlab-ci.yml | 4 +- | ||
| 94 | 30 files changed, 770 insertions(+), 438 deletions(-) | ||
| 95 | delete mode 100644 docs/devel/conf.py | ||
| 96 | delete mode 100644 docs/index.html.in | ||
| 97 | delete mode 100644 docs/interop/conf.py | ||
| 98 | delete mode 100644 docs/specs/conf.py | ||
| 99 | delete mode 100644 docs/system/conf.py | ||
| 100 | delete mode 100644 docs/tools/conf.py | ||
| 101 | delete mode 100644 docs/user/conf.py | ||
| 102 | 77 | diff view generated by jsdifflib |