[PULL v2 00/29] target-arm queue
[PULL v2 00/46] target-arm queue
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v2: drop pvpanic-pci patches.
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v2 update: fix memory leaks in pvpanic-pci test case spotted by
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oss-fuzz gitlab CI run.
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The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
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-- PMM
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
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The following changes since commit 7e7eb9f852a46b51a71ae9d82590b2e4d28827ee:
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Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-01-28' into staging (2021-01-28 22:43:18 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210129-1
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for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
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for you to fetch changes up to 14711b6f54708b9583796db02b12ee7bd0331502:
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docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
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hw/arm/stellaris: Remove board-creation reset of STELLARIS_SYS (2021-01-29 15:54:44 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Implement IMPDEF pauth algorithm
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* Implement ID_PFR2
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* Support ARMv8.4-SEL2
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* Conditionalize DBGDIDR
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* Fix bug where we were truncating predicate vector lengths in SVE insns
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* rename xlnx-zcu102.canbusN properties
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* npcm7xx_adc-test: Fix memleak in adc_qom_set
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* provide powerdown/reset mechanism for secure firmware on 'virt' board
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* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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* hw/misc: Fix arith overflow in NPCM7XX PWM module
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* docs: Build and install all the docs in a single manual
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* target/arm: Replace magic value by MMU_DATA_LOAD definition
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* configure: fix preadv errors on Catalina macOS with new XCode
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* Various configure and other cleanups in preparation for iOS support
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* hvf: Add hypervisor entitlement to output binaries (needed for Big Sur)
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* Implement pvpanic-pci device
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* Convert the CMSDK timer devices to the Clock framework
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----------------------------------------------------------------
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----------------------------------------------------------------
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Gan Qixin (1):
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Alexander Graf (1):
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npcm7xx_adc-test: Fix memleak in adc_qom_set
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hvf: Add hypervisor entitlement to output binaries
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Peter Maydell (1):
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Hao Wu (1):
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docs: Build and install all the docs in a single manual
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hw/misc: Fix arith overflow in NPCM7XX PWM module
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Joelle van Dyne (7):
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configure: cross-compiling with empty cross_prefix
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osdep: build with non-working system() function
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darwin: remove redundant dependency declaration
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darwin: fix cross-compiling for Darwin
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configure: cross compile should use x86_64 cpu_family
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darwin: detect CoreAudio for build
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darwin: remove 64-bit build detection on 32-bit OS
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Maxim Uvarov (3):
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hw: gpio: implement gpio-pwr driver for qemu reset/poweroff
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arm-virt: refactor gpios creation
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arm-virt: add secure pl061 for reset/power down
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Mihai Carabas (4):
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hw/misc/pvpanic: split-out generic and bus dependent code
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hw/misc/pvpanic: add PCI interface support
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pvpanic : update pvpanic spec document
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tests/qtest: add a test case for pvpanic-pci
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Paolo Bonzini (1):
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arm: rename xlnx-zcu102.canbusN properties
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Peter Maydell (26):
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configure: Move preadv check to meson.build
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ptimer: Add new ptimer_set_period_from_clock() function
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clock: Add new clock_has_source() function
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tests: Add a simple test of the CMSDK APB timer
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tests: Add a simple test of the CMSDK APB watchdog
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tests: Add a simple test of the CMSDK APB dual timer
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hw/timer/cmsdk-apb-timer: Rename CMSDKAPBTIMER struct to CMSDKAPBTimer
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hw/timer/cmsdk-apb-timer: Add Clock input
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hw/timer/cmsdk-apb-dualtimer: Add Clock input
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hw/watchdog/cmsdk-apb-watchdog: Add Clock input
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hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ"
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hw/arm/armsse: Wire up clocks
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hw/arm/mps2: Inline CMSDK_APB_TIMER creation
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hw/arm/mps2: Create and connect SYSCLK Clock
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hw/arm/mps2-tz: Create and connect ARMSSE Clocks
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hw/arm/musca: Create and connect ARMSSE Clocks
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hw/arm/stellaris: Convert SSYS to QOM device
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hw/arm/stellaris: Create Clock input for watchdog
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hw/timer/cmsdk-apb-timer: Convert to use Clock input
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hw/timer/cmsdk-apb-dualtimer: Convert to use Clock input
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hw/watchdog/cmsdk-apb-watchdog: Convert to use Clock input
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tests/qtest/cmsdk-apb-watchdog-test: Test clock changes
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hw/arm/armsse: Use Clock to set system_clock_scale
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arm: Don't set freq properties on CMSDK timer, dualtimer, watchdog, ARMSSE
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arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSE
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hw/arm/stellaris: Remove board-creation reset of STELLARIS_SYS
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Philippe Mathieu-Daudé (1):
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Philippe Mathieu-Daudé (1):
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target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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target/arm: Replace magic value by MMU_DATA_LOAD definition
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Richard Henderson (7):
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Richard Henderson (2):
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target/arm: Implement an IMPDEF pauth algorithm
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target/arm: Implement ID_PFR2
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target/arm: Add cpu properties to control pauth
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target/arm: Conditionalize DBGDIDR
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target/arm: Use object_property_add_bool for "sve" property
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target/arm: Introduce PREDDESC field definitions
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target/arm: Update PFIRST, PNEXT for pred_desc
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target/arm: Update ZIP, UZP, TRN for pred_desc
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target/arm: Update REV, PUNPK for pred_desc
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Rémi Denis-Courmont (19):
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docs/devel/clocks.rst | 16 +++
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target/arm: remove redundant tests
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docs/specs/pci-ids.txt | 1 +
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target/arm: add arm_is_el2_enabled() helper
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docs/specs/pvpanic.txt | 13 ++-
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target/arm: use arm_is_el2_enabled() where applicable
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docs/system/arm/virt.rst | 2 +
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target/arm: use arm_hcr_el2_eff() where applicable
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configure | 78 ++++++++------
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target/arm: factor MDCR_EL2 common handling
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meson.build | 34 ++++++-
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target/arm: Define isar_feature function to test for presence of SEL2
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include/hw/arm/armsse.h | 14 ++-
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target/arm: add 64-bit S-EL2 to EL exception table
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include/hw/arm/virt.h | 2 +
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target/arm: add MMU stage 1 for Secure EL2
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include/hw/clock.h | 15 +++
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target/arm: add ARMv8.4-SEL2 system registers
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include/hw/misc/pvpanic.h | 24 ++++-
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target/arm: handle VMID change in secure state
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include/hw/pci/pci.h | 1 +
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target/arm: do S1_ptw_translate() before address space lookup
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include/hw/ptimer.h | 22 ++++
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target/arm: translate NS bit in page-walks
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include/hw/timer/cmsdk-apb-dualtimer.h | 5 +-
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target/arm: generalize 2-stage page-walk condition
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include/hw/timer/cmsdk-apb-timer.h | 34 ++-----
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target/arm: secure stage 2 translation regime
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include/hw/watchdog/cmsdk-apb-watchdog.h | 5 +-
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target/arm: set HPFAR_EL2.NS on secure stage 2 faults
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include/qemu/osdep.h | 12 +++
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target/arm: revector to run-time pick target EL
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include/qemu/typedefs.h | 1 +
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target/arm: Implement SCR_EL2.EEL2
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target/arm/cpu.h | 1 +
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target/arm: enable Secure EL2 in max CPU
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hw/arm/armsse.c | 48 ++++++---
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target/arm: refactor vae1_tlbmask()
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hw/arm/mps2-tz.c | 14 ++-
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hw/arm/mps2.c | 28 ++++-
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hw/arm/musca.c | 13 ++-
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hw/arm/stellaris.c | 170 +++++++++++++++++++++++--------
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hw/arm/virt.c | 111 ++++++++++++++++----
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hw/arm/xlnx-zcu102.c | 4 +-
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hw/core/ptimer.c | 34 +++++++
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hw/gpio/gpio_pwr.c | 70 +++++++++++++
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hw/misc/npcm7xx_pwm.c | 23 ++++-
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hw/misc/pvpanic-isa.c | 94 +++++++++++++++++
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hw/misc/pvpanic-pci.c | 94 +++++++++++++++++
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hw/misc/pvpanic.c | 85 ++--------------
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hw/timer/cmsdk-apb-dualtimer.c | 53 +++++++---
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hw/timer/cmsdk-apb-timer.c | 55 +++++-----
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hw/watchdog/cmsdk-apb-watchdog.c | 29 ++++--
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target/arm/helper.c | 27 +++--
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target/arm/kvm64.c | 2 +
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tests/qtest/cmsdk-apb-dualtimer-test.c | 130 +++++++++++++++++++++++
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tests/qtest/cmsdk-apb-timer-test.c | 75 ++++++++++++++
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tests/qtest/cmsdk-apb-watchdog-test.c | 131 ++++++++++++++++++++++++
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tests/qtest/npcm7xx_pwm-test.c | 4 +-
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tests/qtest/pvpanic-pci-test.c | 98 ++++++++++++++++++
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tests/qtest/xlnx-can-test.c | 30 +++---
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MAINTAINERS | 3 +
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accel/hvf/entitlements.plist | 8 ++
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hw/arm/Kconfig | 1 +
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hw/gpio/Kconfig | 3 +
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hw/gpio/meson.build | 1 +
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hw/i386/Kconfig | 2 +-
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hw/misc/Kconfig | 12 ++-
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hw/misc/meson.build | 4 +-
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scripts/entitlement.sh | 13 +++
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tests/qtest/meson.build | 6 +-
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52 files changed, 1436 insertions(+), 319 deletions(-)
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create mode 100644 hw/gpio/gpio_pwr.c
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create mode 100644 hw/misc/pvpanic-isa.c
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create mode 100644 hw/misc/pvpanic-pci.c
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create mode 100644 tests/qtest/cmsdk-apb-dualtimer-test.c
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create mode 100644 tests/qtest/cmsdk-apb-timer-test.c
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create mode 100644 tests/qtest/cmsdk-apb-watchdog-test.c
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create mode 100644 tests/qtest/pvpanic-pci-test.c
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create mode 100644 accel/hvf/entitlements.plist
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create mode 100755 scripts/entitlement.sh
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docs/conf.py | 46 ++++-
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docs/devel/conf.py | 15 --
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docs/index.html.in | 17 --
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docs/interop/conf.py | 28 ---
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docs/meson.build | 64 +++---
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docs/specs/conf.py | 16 --
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docs/system/arm/cpu-features.rst | 21 ++
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docs/system/conf.py | 28 ---
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docs/tools/conf.py | 37 ----
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docs/user/conf.py | 15 --
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include/qemu/xxhash.h | 98 +++++++++
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target/arm/cpu-param.h | 2 +-
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target/arm/cpu.h | 107 ++++++++--
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target/arm/internals.h | 45 +++++
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target/arm/cpu.c | 23 ++-
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target/arm/cpu64.c | 65 ++++--
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target/arm/helper-a64.c | 8 +-
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target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
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target/arm/m_helper.c | 2 +-
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target/arm/monitor.c | 1 +
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target/arm/op_helper.c | 4 +-
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target/arm/pauth_helper.c | 27 ++-
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target/arm/sve_helper.c | 33 ++--
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target/arm/tlb_helper.c | 3 +
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target/arm/translate-a64.c | 4 +
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target/arm/translate-sve.c | 31 ++-
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target/arm/translate.c | 36 +++-
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tests/qtest/arm-cpu-features.c | 13 ++
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tests/qtest/npcm7xx_adc-test.c | 1 +
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.gitlab-ci.yml | 4 +-
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30 files changed, 770 insertions(+), 438 deletions(-)
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delete mode 100644 docs/devel/conf.py
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delete mode 100644 docs/index.html.in
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delete mode 100644 docs/interop/conf.py
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delete mode 100644 docs/specs/conf.py
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delete mode 100644 docs/system/conf.py
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delete mode 100644 docs/tools/conf.py
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delete mode 100644 docs/user/conf.py
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