[PATCH] hw/char/cadence_uart: Fixed wrong Cadence UART stop bit count register value.

Anthony Dentinger posted 1 patch 6 days, 19 hours ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20210113211531.20696-1-anthony.dentinger@spacecodesign.com
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, Alistair Francis <alistair@alistair23.me>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Peter Maydell <peter.maydell@linaro.org>
hw/char/cadence_uart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH] hw/char/cadence_uart: Fixed wrong Cadence UART stop bit count register value.

Posted by Anthony Dentinger 6 days, 19 hours ago
Here is a reference showing that 0x00 is the correct value:
- https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
  (page 1776, Register XUARTPS_MR_OFFSET Details, which is for a platform
  called Zynq that has a UART made by Cadence)
- https://github.com/Xilinx/linux-xlnx/blob/51445f9139af73c616f054a8fcc77ed2568b81b1/drivers/tty/serial/xilinx_uartps.c#L98
  (Linux driver for the Cadence UART on that Zynq platform).

Signed-off-by: Anthony Dentinger <anthony.dentinger@spacecodesign.com>
---
 hw/char/cadence_uart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index c603e14012..a049ed50c4 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -93,7 +93,7 @@
 #define UART_DATA_BITS_7       (0x2 << UART_MR_CHRL_SH)
 #define UART_PARITY_ODD        (0x1 << UART_MR_PAR_SH)
 #define UART_PARITY_EVEN       (0x0 << UART_MR_PAR_SH)
-#define UART_STOP_BITS_1       (0x3 << UART_MR_NBSTOP_SH)
+#define UART_STOP_BITS_1       (0x0 << UART_MR_NBSTOP_SH)
 #define UART_STOP_BITS_2       (0x2 << UART_MR_NBSTOP_SH)
 #define NORMAL_MODE            (0x0 << UART_MR_CHMODE_SH)
 #define ECHO_MODE              (0x1 << UART_MR_CHMODE_SH)
-- 
2.16.2.windows.1