| 1 | v2: drop the 'merge the manuals' patch: it breaks the gitlab job which tries | 1 | Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx |
|---|---|---|---|
| 2 | to publish the docs on gitlab, and I also realised I forgot to update the | 2 | ethernet device failed 'make check' on big-endian hosts. |
| 3 | Windows installer scripts. | ||
| 4 | 3 | ||
| 5 | -- PMM | 4 | -- PMM |
| 6 | 5 | ||
| 7 | The following changes since commit b3f846c59d8405bb87c551187721fc92ff2f1b92: | 6 | The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf: |
| 8 | 7 | ||
| 9 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-11v2' into staging (2021-01-11 15:15:35 +0000) | 8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000) |
| 10 | 9 | ||
| 11 | are available in the Git repository at: | 10 | are available in the Git repository at: |
| 12 | 11 | ||
| 13 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210112-1 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1 |
| 14 | 13 | ||
| 15 | for you to fetch changes up to 1ff5a063d60c7737de11465516331b8ca8700865: | 14 | for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621: |
| 16 | 15 | ||
| 17 | ui/cocoa: Fix openFile: deprecation on Big Sur (2021-01-12 21:19:02 +0000) | 16 | target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000) |
| 18 | 17 | ||
| 19 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 20 | target-arm queue: | 19 | target-arm queue: |
| 21 | * arm: Support emulation of ARMv8.4-TTST extension | 20 | * Correctly initialize MDCR_EL2.HPMN |
| 22 | * arm: Update cpu.h ID register field definitions | 21 | * versal: Use nr_apu_cpus in favor of hard coding 2 |
| 23 | * arm: Fix breakage of XScale instruction emulation | 22 | * accel/tcg: Add URL of clang bug to comment about our workaround |
| 24 | * hw/net/lan9118: Fix RX Status FIFO PEEK value | 23 | * Add support for FEAT_DIT, Data Independent Timing |
| 25 | * npcm7xx: Add ADC and PWM emulation | 24 | * Remove GPIO from unimplemented NPCM7XX |
| 26 | * ui/cocoa: Make "open docs" help menu entry work again when binary | 25 | * Fix SCR RES1 handling |
| 27 | is run from the build tree | 26 | * Don't migrate CPUARMState.features |
| 28 | * ui/cocoa: Fix openFile: deprecation on Big Sur | ||
| 29 | * docs: Add qemu-storage-daemon(1) manpage to meson.build | ||
| 30 | 27 | ||
| 31 | ---------------------------------------------------------------- | 28 | ---------------------------------------------------------------- |
| 32 | Hao Wu (6): | 29 | Aaron Lindsay (1): |
| 33 | hw/misc: Add clock converter in NPCM7XX CLK module | 30 | target/arm: Don't migrate CPUARMState.features |
| 34 | hw/timer: Refactor NPCM7XX Timer to use CLK clock | ||
| 35 | hw/adc: Add an ADC module for NPCM7XX | ||
| 36 | hw/misc: Add a PWM module for NPCM7XX | ||
| 37 | hw/misc: Add QTest for NPCM7XX PWM Module | ||
| 38 | hw/*: Use type casting for SysBusDevice in NPCM7XX | ||
| 39 | 31 | ||
| 40 | Leif Lindholm (6): | 32 | Daniel Müller (1): |
| 41 | target/arm: fix typo in cpu.h ID_AA64PFR1 field name | 33 | target/arm: Correctly initialize MDCR_EL2.HPMN |
| 42 | target/arm: make ARMCPU.clidr 64-bit | ||
| 43 | target/arm: make ARMCPU.ctr 64-bit | ||
| 44 | target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h | ||
| 45 | target/arm: add aarch64 ID register fields to cpu.h | ||
| 46 | target/arm: add aarch32 ID register fields to cpu.h | ||
| 47 | 34 | ||
| 48 | Peter Maydell (4): | 35 | Edgar E. Iglesias (1): |
| 49 | docs: Add qemu-storage-daemon(1) manpage to meson.build | 36 | hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 |
| 50 | target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns | ||
| 51 | hw/net/lan9118: Fix RX Status FIFO PEEK value | ||
| 52 | hw/net/lan9118: Add symbolic constants for register offsets | ||
| 53 | 37 | ||
| 54 | Roman Bolshakov (2): | 38 | Hao Wu (1): |
| 55 | ui/cocoa: Update path to docs in build tree | 39 | hw/arm: Remove GPIO from unimplemented NPCM7XX |
| 56 | ui/cocoa: Fix openFile: deprecation on Big Sur | ||
| 57 | 40 | ||
| 58 | Rémi Denis-Courmont (2): | 41 | Mike Nawrocki (1): |
| 59 | target/arm: ARMv8.4-TTST extension | 42 | target/arm: Fix SCR RES1 handling |
| 60 | target/arm: enable Small Translation tables in max CPU | ||
| 61 | 43 | ||
| 62 | docs/meson.build | 1 + | 44 | Peter Maydell (2): |
| 63 | docs/system/arm/nuvoton.rst | 4 +- | 45 | arm: Update infocenter.arm.com URLs |
| 64 | meson.build | 1 + | 46 | accel/tcg: Add URL of clang bug to comment about our workaround |
| 65 | hw/adc/trace.h | 1 + | ||
| 66 | include/hw/adc/npcm7xx_adc.h | 69 ++++ | ||
| 67 | include/hw/arm/npcm7xx.h | 4 + | ||
| 68 | include/hw/misc/npcm7xx_clk.h | 146 ++++++- | ||
| 69 | include/hw/misc/npcm7xx_pwm.h | 105 +++++ | ||
| 70 | include/hw/timer/npcm7xx_timer.h | 1 + | ||
| 71 | target/arm/cpu.h | 85 ++++- | ||
| 72 | hw/adc/npcm7xx_adc.c | 301 +++++++++++++++ | ||
| 73 | hw/arm/npcm7xx.c | 55 ++- | ||
| 74 | hw/arm/npcm7xx_boards.c | 2 +- | ||
| 75 | hw/mem/npcm7xx_mc.c | 2 +- | ||
| 76 | hw/misc/npcm7xx_clk.c | 807 ++++++++++++++++++++++++++++++++++++++- | ||
| 77 | hw/misc/npcm7xx_gcr.c | 2 +- | ||
| 78 | hw/misc/npcm7xx_pwm.c | 550 ++++++++++++++++++++++++++ | ||
| 79 | hw/misc/npcm7xx_rng.c | 2 +- | ||
| 80 | hw/net/lan9118.c | 26 +- | ||
| 81 | hw/nvram/npcm7xx_otp.c | 2 +- | ||
| 82 | hw/ssi/npcm7xx_fiu.c | 2 +- | ||
| 83 | hw/timer/npcm7xx_timer.c | 39 +- | ||
| 84 | target/arm/cpu64.c | 1 + | ||
| 85 | target/arm/helper.c | 15 +- | ||
| 86 | target/arm/translate.c | 7 + | ||
| 87 | tests/qtest/npcm7xx_adc-test.c | 377 ++++++++++++++++++ | ||
| 88 | tests/qtest/npcm7xx_pwm-test.c | 490 ++++++++++++++++++++++++ | ||
| 89 | hw/adc/meson.build | 1 + | ||
| 90 | hw/adc/trace-events | 5 + | ||
| 91 | hw/misc/meson.build | 1 + | ||
| 92 | hw/misc/trace-events | 6 + | ||
| 93 | tests/qtest/meson.build | 4 +- | ||
| 94 | ui/cocoa.m | 7 +- | ||
| 95 | 33 files changed, 3054 insertions(+), 67 deletions(-) | ||
| 96 | create mode 100644 hw/adc/trace.h | ||
| 97 | create mode 100644 include/hw/adc/npcm7xx_adc.h | ||
| 98 | create mode 100644 include/hw/misc/npcm7xx_pwm.h | ||
| 99 | create mode 100644 hw/adc/npcm7xx_adc.c | ||
| 100 | create mode 100644 hw/misc/npcm7xx_pwm.c | ||
| 101 | create mode 100644 tests/qtest/npcm7xx_adc-test.c | ||
| 102 | create mode 100644 tests/qtest/npcm7xx_pwm-test.c | ||
| 103 | create mode 100644 hw/adc/trace-events | ||
| 104 | 47 | ||
| 48 | Rebecca Cran (4): | ||
| 49 | target/arm: Add support for FEAT_DIT, Data Independent Timing | ||
| 50 | target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate | ||
| 51 | target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU | ||
| 52 | target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU | ||
| 53 | |||
| 54 | include/hw/dma/pl080.h | 7 ++-- | ||
| 55 | include/hw/misc/arm_integrator_debug.h | 2 +- | ||
| 56 | include/hw/ssi/pl022.h | 5 ++- | ||
| 57 | target/arm/cpu.h | 17 ++++++++ | ||
| 58 | target/arm/internals.h | 6 +++ | ||
| 59 | accel/tcg/cpu-exec.c | 25 +++++++++--- | ||
| 60 | hw/arm/aspeed_ast2600.c | 2 +- | ||
| 61 | hw/arm/musca.c | 4 +- | ||
| 62 | hw/arm/npcm7xx.c | 8 ---- | ||
| 63 | hw/arm/xlnx-versal.c | 4 +- | ||
| 64 | hw/misc/arm_integrator_debug.c | 2 +- | ||
| 65 | hw/timer/arm_timer.c | 7 ++-- | ||
| 66 | target/arm/cpu.c | 4 ++ | ||
| 67 | target/arm/cpu64.c | 5 +++ | ||
| 68 | target/arm/helper-a64.c | 27 +++++++++++-- | ||
| 69 | target/arm/helper.c | 71 +++++++++++++++++++++++++++------- | ||
| 70 | target/arm/machine.c | 2 +- | ||
| 71 | target/arm/op_helper.c | 9 +---- | ||
| 72 | target/arm/translate-a64.c | 12 ++++++ | ||
| 73 | 19 files changed, 164 insertions(+), 55 deletions(-) | ||
| 74 | diff view generated by jsdifflib |