First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS).

Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined
by the ARM ARM.

Third, add field definitions for CLIDR (excepting the Ttype<n> fields, since
I was unsure of prefererred naming - Ttype7-Ttype1?).

Fourth add all ID_AA64 registers/fields present in ARM DDI 0487F.c,

Lastly, add all ID_ (aarch32) registers/fields.

Some of the ID_AA64 fields will be used by some patches Rebecca Cran will be
submitting shortly, and some of those features also exist for aarch32.

v2->v3:
- Add missing R-b tags.
- Add separate definition for CCSIDR_EL1 fields when FEAT_CCIDX implemented.
- Add patch extending also ARMCPU.ctr to 64-bit.
- Rebase to current master.

v1->v2:
- Correct CCSIDR_EL1 field sizes in 3/5.
- Rebase to current master.

Leif Lindholm (6):
  target/arm: fix typo in cpu.h ID_AA64PFR1 field name
  target/arm: make ARMCPU.clidr 64-bit
  target/arm: make ARMCPU.ctr 64-bit
  target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to
    cpu.h
  target/arm: add aarch64 ID register fields to cpu.h
  target/arm: add aarch32 ID register fields to cpu.h

 target/arm/cpu.h | 80 ++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 77 insertions(+), 3 deletions(-)

-- 
2.20.1

On Fri, 8 Jan 2021 at 18:51, Leif Lindholm <leif@nuviainc.com> wrote:
>
> First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS).
>
> Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined
> by the ARM ARM.
>
> Third, add field definitions for CLIDR (excepting the Ttype<n> fields, since
> I was unsure of prefererred naming - Ttype7-Ttype1?).
>
> Fourth add all ID_AA64 registers/fields present in ARM DDI 0487F.c,
>
> Lastly, add all ID_ (aarch32) registers/fields.
>
> Some of the ID_AA64 fields will be used by some patches Rebecca Cran will be
> submitting shortly, and some of those features also exist for aarch32.



Applied to target-arm.next, thanks.

-- PMM