A grab-bag of minor stuff for the end of the year. My to-review

queue is not empty, but it it at least in single figures...

The following changes since commit 5bfbd8170ce7acb98a1834ff49ed7340b0837144:

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging (2020-12-14 20:32:38 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201215

for you to fetch changes up to 23af268566069183285bebbdf95b1b37cb7c0942:

hw/block/m25p80: Fix Numonyx fast read dummy cycle count (2020-12-15 13:39:30 +0000)

* gdbstub: Correct misparsing of vCont C/S requests

* openrisc: Move pic_cpu code into CPU object proper

* nios2: Move IIC code into CPU object proper

* Improve reporting of ROM overlap errors

* xlnx-versal: Add USB support

* hw/misc/zynq_slcr: Avoid #DIV/0! error

* Numonyx: Fix dummy cycles and check for SPI mode on cmds

Joe Komlodi (4):

hw/block/m25p80: Make Numonyx config field names more accurate

hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx

hw/block/m25p80: Check SPI mode before running some Numonyx commands

hw/block/m25p80: Fix Numonyx fast read dummy cycle count

Peter Maydell (11):

gdbstub: Correct misparsing of vCont C/S requests

hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs

hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y"

target/openrisc: Move pic_cpu code into CPU object proper

target/nios2: Move IIC code into CPU object proper

target/nios2: Move nios2_check_interrupts() into target/nios2

target/nios2: Use deposit32() to update ipending register

hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset()

hw/core/loader.c: Improve reporting of ROM overlap errors

elf_ops.h: Don't truncate name of the ROM blobs we create

elf_ops.h: Be more verbose with ROM blob names

Philippe Mathieu-Daudé (1):

hw/misc/zynq_slcr: Avoid #DIV/0! error

Sai Pavan Boddu (2):

usb: Add versal-usb2-ctrl-regs module

usb: xlnx-usb-subsystem: Add xilinx usb subsystem

Vikram Garhwal (2):

usb: Add DWC3 model

arm: xlnx-versal: Connect usb to virt-versal

include/hw/arm/xlnx-versal.h | 9 +

include/hw/elf_ops.h | 5 +-

include/hw/usb/hcd-dwc3.h | 55 +++

include/hw/usb/xlnx-usb-subsystem.h | 45 ++

include/hw/usb/xlnx-versal-usb2-ctrl-regs.h | 45 ++

target/nios2/cpu.h | 3 -

target/openrisc/cpu.h | 1 -

gdbstub.c | 2 +-

hw/arm/xlnx-versal-virt.c | 55 +++

hw/arm/xlnx-versal.c | 26 ++

hw/block/m25p80.c | 158 +++++--

hw/core/loader.c | 67 ++-

hw/intc/nios2_iic.c | 95 ----

hw/misc/zynq_slcr.c | 5 +

hw/nios2/10m50_devboard.c | 13 +-

hw/nios2/cpu_pic.c | 67 ---

hw/openrisc/openrisc_sim.c | 46 +-

hw/openrisc/pic_cpu.c | 61 ---

hw/usb/hcd-dwc3.c | 689 ++++++++++++++++++++++++++++

hw/usb/xlnx-usb-subsystem.c | 94 ++++

hw/usb/xlnx-versal-usb2-ctrl-regs.c | 229 +++++++++

softmmu/vl.c | 1 -

target/nios2/cpu.c | 29 ++

target/nios2/op_helper.c | 9 +

target/openrisc/cpu.c | 32 ++

MAINTAINERS | 1 -

hw/intc/meson.build | 1 -

hw/nios2/meson.build | 2 +-

hw/openrisc/Kconfig | 1 +

hw/openrisc/meson.build | 2 +-

hw/usb/Kconfig | 10 +

hw/usb/meson.build | 3 +

32 files changed, 1557 insertions(+), 304 deletions(-)

create mode 100644 include/hw/usb/hcd-dwc3.h

create mode 100644 include/hw/usb/xlnx-usb-subsystem.h

create mode 100644 include/hw/usb/xlnx-versal-usb2-ctrl-regs.h

delete mode 100644 hw/intc/nios2_iic.c

delete mode 100644 hw/nios2/cpu_pic.c

delete mode 100644 hw/openrisc/pic_cpu.c

create mode 100644 hw/usb/hcd-dwc3.c

create mode 100644 hw/usb/xlnx-usb-subsystem.c

create mode 100644 hw/usb/xlnx-versal-usb2-ctrl-regs.c

From: Joe Komlodi <joe.komlodi@xilinx.com>

Numonyx chips determine the number of cycles to wait based on bits 7:4

in the volatile configuration register.

However, if these bits are 0x0 or 0xF, the number of dummy cycles to

wait is 10 for QIOR and QIOR4 commands or when in QIO mode, and otherwise 8 for

the currently supported fast read commands. [1]

[1]

https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_02g_cbb_0.pdf?rev=9b167fbf2b3645efba6385949a72e453

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>

Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>

Message-id: 1605568264-26376-5-git-send-email-komlodi@xilinx.com

hw/block/m25p80.c | 30 +++++++++++++++++++++++++++---

1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c

--- a/hw/block/m25p80.c

+++ b/hw/block/m25p80.c

@@ -XXX,XX +XXX,XX @@ static uint8_t numonyx_mode(Flash *s)

}

}

+static uint8_t numonyx_extract_cfg_num_dummies(Flash *s)

+{

+ uint8_t num_dummies;

+ uint8_t mode;

+ assert(get_man(s) == MAN_NUMONYX);

+

+ mode = numonyx_mode(s);

+ num_dummies = extract32(s->volatile_cfg, 4, 4);

+

+ if (num_dummies == 0x0 || num_dummies == 0xf) {

+ switch (s->cmd_in_progress) {

+ case QIOR:

+ case QIOR4:

+ num_dummies = 10;

+ break;

+ default:

+ num_dummies = (mode == MODE_QIO) ? 10 : 8;

+ break;

+ }

+ }

+

+ return num_dummies;

+}

+

static void decode_fast_read_cmd(Flash *s)

{

s->needed_bytes = get_addr_length(s);

@@ -XXX,XX +XXX,XX @@ static void decode_fast_read_cmd(Flash *s)

s->needed_bytes += 8;

break;

case MAN_NUMONYX:

- s->needed_bytes += extract32(s->volatile_cfg, 4, 4);

+ s->needed_bytes += numonyx_extract_cfg_num_dummies(s);

break;

case MAN_MACRONIX:

if (extract32(s->volatile_cfg, 6, 2) == 1) {

@@ -XXX,XX +XXX,XX @@ static void decode_dio_read_cmd(Flash *s)

);

break;

case MAN_NUMONYX:

- s->needed_bytes += extract32(s->volatile_cfg, 4, 4);

+ s->needed_bytes += numonyx_extract_cfg_num_dummies(s);

break;

case MAN_MACRONIX:

switch (extract32(s->volatile_cfg, 6, 2)) {

@@ -XXX,XX +XXX,XX @@ static void decode_qio_read_cmd(Flash *s)

);

break;

case MAN_NUMONYX:

- s->needed_bytes += extract32(s->volatile_cfg, 4, 4);

+ s->needed_bytes += numonyx_extract_cfg_num_dummies(s);

break;

case MAN_MACRONIX:

switch (extract32(s->volatile_cfg, 6, 2)) {

2.20.1

We're about to refactor the OpenRISC pic_cpu code in a way that means

that just grabbing the whole qemu_irq[] array of inbound IRQs for a

CPU won't be possible any more. Abstract out a function for "return

the qemu_irq for IRQ x input of CPU y" so we can more easily replace

the implementation.

Reviewed-by: Stafford Horne <shorne@gmail.com>

Message-id: 20201127225127.14770-3-peter.maydell@linaro.org

hw/openrisc/openrisc_sim.c | 38 +++++++++++++++++++++-----------------

1 file changed, 21 insertions(+), 17 deletions(-)

diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c

--- a/hw/openrisc/openrisc_sim.c

+++ b/hw/openrisc/openrisc_sim.c

@@ -XXX,XX +XXX,XX @@ static void main_cpu_reset(void *opaque)

cpu_set_pc(cs, boot_info.bootstrap_pc);

}

+static qemu_irq get_cpu_irq(OpenRISCCPU *cpus[], int cpunum, int irq_pin)

+{

+ return cpus[cpunum]->env.irq[irq_pin];

+}

+

static void openrisc_sim_net_init(hwaddr base, hwaddr descriptors,

- int num_cpus, qemu_irq **cpu_irqs,

+ int num_cpus, OpenRISCCPU *cpus[],

int irq_pin, NICInfo *nd)

{

DeviceState *dev;

@@ -XXX,XX +XXX,XX @@ static void openrisc_sim_net_init(hwaddr base, hwaddr descriptors,

qdev_prop_set_uint32(splitter, "num-lines", num_cpus);

qdev_realize_and_unref(splitter, NULL, &error_fatal);

for (i = 0; i < num_cpus; i++) {

- qdev_connect_gpio_out(splitter, i, cpu_irqs[i][irq_pin]);

+ qdev_connect_gpio_out(splitter, i, get_cpu_irq(cpus, i, irq_pin));

sysbus_connect_irq(s, 0, qdev_get_gpio_in(splitter, 0));

} else {

- sysbus_connect_irq(s, 0, cpu_irqs[0][irq_pin]);

+ sysbus_connect_irq(s, 0, get_cpu_irq(cpus, 0, irq_pin));

}

sysbus_mmio_map(s, 0, base);

sysbus_mmio_map(s, 1, descriptors);

}

static void openrisc_sim_ompic_init(hwaddr base, int num_cpus,

- qemu_irq **cpu_irqs, int irq_pin)

+ OpenRISCCPU *cpus[], int irq_pin)

{

DeviceState *dev;

SysBusDevice *s;

@@ -XXX,XX +XXX,XX @@ static void openrisc_sim_ompic_init(hwaddr base, int num_cpus,

s = SYS_BUS_DEVICE(dev);

sysbus_realize_and_unref(s, &error_fatal);

for (i = 0; i < num_cpus; i++) {

- sysbus_connect_irq(s, i, cpu_irqs[i][irq_pin]);

+ sysbus_connect_irq(s, i, get_cpu_irq(cpus, i, irq_pin));

}

sysbus_mmio_map(s, 0, base);

}

@@ -XXX,XX +XXX,XX @@ static void openrisc_sim_init(MachineState *machine)

{

ram_addr_t ram_size = machine->ram_size;

const char *kernel_filename = machine->kernel_filename;

- OpenRISCCPU *cpu = NULL;

+ OpenRISCCPU *cpus[2] = {};

MemoryRegion *ram;

- qemu_irq *cpu_irqs[2];

qemu_irq serial_irq;

int n;

unsigned int smp_cpus = machine->smp.cpus;

assert(smp_cpus >= 1 && smp_cpus <= 2);

for (n = 0; n < smp_cpus; n++) {

- cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));

- if (cpu == NULL) {

+ cpus[n] = OPENRISC_CPU(cpu_create(machine->cpu_type));

+ if (cpus[n] == NULL) {

fprintf(stderr, "Unable to find CPU definition!\n");

exit(1);

}

- cpu_openrisc_pic_init(cpu);

- cpu_irqs[n] = (qemu_irq *) cpu->env.irq;

+ cpu_openrisc_pic_init(cpus[n]);

- cpu_openrisc_clock_init(cpu);

+ cpu_openrisc_clock_init(cpus[n]);

- qemu_register_reset(main_cpu_reset, cpu);

+ qemu_register_reset(main_cpu_reset, cpus[n]);

}

ram = g_malloc(sizeof(*ram));

@@ -XXX,XX +XXX,XX @@ static void openrisc_sim_init(MachineState *machine)

if (nd_table[0].used) {

openrisc_sim_net_init(0x92000000, 0x92000400, smp_cpus,

- cpu_irqs, 4, nd_table);

+ cpus, 4, nd_table);

}

if (smp_cpus > 1) {

- openrisc_sim_ompic_init(0x98000000, smp_cpus, cpu_irqs, 1);

+ openrisc_sim_ompic_init(0x98000000, smp_cpus, cpus, 1);

- serial_irq = qemu_irq_split(cpu_irqs[0][2], cpu_irqs[1][2]);

+ serial_irq = qemu_irq_split(get_cpu_irq(cpus, 0, 2),

+ get_cpu_irq(cpus, 1, 2));

} else {

- serial_irq = cpu_irqs[0][2];

+ serial_irq = get_cpu_irq(cpus, 0, 2);

}

serial_mm_init(get_system_memory(), 0x90000000, 0, serial_irq,

2.20.1

In rom_check_and_register_reset() we report to the user if there is

a "ROM region overlap". This has a couple of problems:

* the reported information is not very easy to intepret

* the function just prints the overlap to stderr (and relies on

its single callsite in vl.c to do an error_report() and exit)

* only the first overlap encountered is diagnosed

Make this function use error_report() and error_printf() and

report a more user-friendly report with all the overlaps

diagnosed.

Sample old output:

rom: requested regions overlap (rom dtb. free=0x0000000000008000, addr=0x0000000000000000)

qemu-system-aarch64: rom check and register reset failed

Sample new output:

qemu-system-aarch64: Some ROM regions are overlapping

These ROM regions might have been loaded by direct user request or by default.

They could be BIOS/firmware images, a guest kernel, initrd or some other file loaded into guest memory.

Check whether you intended to load all this guest code, and whether it has been built to load to the correct addresses.

The following two regions overlap (in the cpu-memory-0 address space):

phdr #0: /home/petmay01/linaro/qemu-misc-tests/ldmia-fault.axf (addresses 0x0000000000000000 - 0x0000000000008000)

dtb (addresses 0x0000000000000000 - 0x0000000000100000)

The following two regions overlap (in the cpu-memory-0 address space):

phdr #1: /home/petmay01/linaro/qemu-misc-tests/bad-psci-call.axf (addresses 0x0000000040000000 - 0x0000000040000010)

phdr #0: /home/petmay01/linaro/qemu-misc-tests/bp-test.elf (addresses 0x0000000040000000 - 0x0000000040000020)

Message-id: 20201129203923.10622-3-peter.maydell@linaro.org

hw/core/loader.c | 48 ++++++++++++++++++++++++++++++++++++++++++------

softmmu/vl.c | 1 -

2 files changed, 42 insertions(+), 7 deletions(-)

diff --git a/hw/core/loader.c b/hw/core/loader.c

--- a/hw/core/loader.c

+++ b/hw/core/loader.c

@@ -XXX,XX +XXX,XX @@ static bool roms_overlap(Rom *last_rom, Rom *this_rom)

last_rom->addr + last_rom->romsize > this_rom->addr;

}

+static const char *rom_as_name(Rom *rom)

+{

+ const char *name = rom->as ? rom->as->name : NULL;

+ return name ?: "anonymous";

+}

+

+static void rom_print_overlap_error_header(void)

+{

+ error_report("Some ROM regions are overlapping");

+ error_printf(

+ "These ROM regions might have been loaded by "

+ "direct user request or by default.\n"

+ "They could be BIOS/firmware images, a guest kernel, "

+ "initrd or some other file loaded into guest memory.\n"

+ "Check whether you intended to load all this guest code, and "

+ "whether it has been built to load to the correct addresses.\n");

+}

+

+static void rom_print_one_overlap_error(Rom *last_rom, Rom *rom)

+{

+ error_printf(

+ "\nThe following two regions overlap (in the %s address space):\n",

+ rom_as_name(rom));

+ error_printf(

+ " %s (addresses 0x" TARGET_FMT_plx " - 0x" TARGET_FMT_plx ")\n",

+ last_rom->name, last_rom->addr, last_rom->addr + last_rom->romsize);

+ error_printf(

+ " %s (addresses 0x" TARGET_FMT_plx " - 0x" TARGET_FMT_plx ")\n",

+ rom->name, rom->addr, rom->addr + rom->romsize);

+}

+

int rom_check_and_register_reset(void)

{

MemoryRegionSection section;

Rom *rom, *last_rom = NULL;

+ bool found_overlap = false;

QTAILQ_FOREACH(rom, &roms, next) {

if (rom->fw_file) {

@@ -XXX,XX +XXX,XX @@ int rom_check_and_register_reset(void)

}

if (!rom->mr) {

if (roms_overlap(last_rom, rom)) {

- fprintf(stderr, "rom: requested regions overlap "

- "(rom %s. free=0x" TARGET_FMT_plx

- ", addr=0x" TARGET_FMT_plx ")\n",

- rom->name, last_rom->addr + last_rom->romsize,

- rom->addr);

- return -1;

+ if (!found_overlap) {

+ found_overlap = true;

+ rom_print_overlap_error_header();

+ }

+ rom_print_one_overlap_error(last_rom, rom);

+ /* Keep going through the list so we report all overlaps */

}

last_rom = rom;

}

@@ -XXX,XX +XXX,XX @@ int rom_check_and_register_reset(void)

rom->isrom = int128_nz(section.size) && memory_region_is_rom(section.mr);

memory_region_unref(section.mr);

}

+ if (found_overlap) {

+ return -1;

+ }

+

qemu_register_reset(rom_reset, NULL);

roms_loaded = 1;

return 0;

diff --git a/softmmu/vl.c b/softmmu/vl.c

index XXXXXXX..XXXXXXX 100644

--- a/softmmu/vl.c

+++ b/softmmu/vl.c

@@ -XXX,XX +XXX,XX @@ static void qemu_machine_creation_done(void)

qemu_run_machine_init_done_notifiers();

if (rom_check_and_register_reset() != 0) {

- error_report("rom check and register reset failed");

exit(1);

}

2.20.1

From: Joe Komlodi <joe.komlodi@xilinx.com>

Some Numonyx flash commands cannot be executed in DIO and QIO mode, such as

trying to do DPP or DOR when in QIO mode.

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>

Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>

Message-id: 1605568264-26376-4-git-send-email-komlodi@xilinx.com

hw/block/m25p80.c | 114 ++++++++++++++++++++++++++++++++++++++--------

1 file changed, 95 insertions(+), 19 deletions(-)

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c

--- a/hw/block/m25p80.c

+++ b/hw/block/m25p80.c

@@ -XXX,XX +XXX,XX @@ typedef enum {

MAN_GENERIC,

} Manufacturer;

+typedef enum {

+ MODE_STD = 0,

+ MODE_DIO = 1,

+ MODE_QIO = 2

+} SPIMode;

+

#define M25P80_INTERNAL_DATA_BUFFER_SZ 16

struct Flash {

@@ -XXX,XX +XXX,XX @@ static void reset_memory(Flash *s)

trace_m25p80_reset_done(s);

+static uint8_t numonyx_mode(Flash *s)

+ if (!(s->enh_volatile_cfg & EVCFG_QUAD_IO_DISABLED)) {

+ return MODE_QIO;

+ } else if (!(s->enh_volatile_cfg & EVCFG_DUAL_IO_DISABLED)) {

+ return MODE_DIO;