[v9] i386 cleanup

[RFC v9 16/32] target/riscv: remove CONFIG_TCG, as it is always TCG

Claudio Fontana posted 22 patches 5 years, 2 months ago

Diff against v1 v2 v3 v4 v5 v6 v7 v8 v10
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[RFC v9 16/32] target/riscv: remove CONFIG_TCG, as it is always TCG

Posted by Claudio Fontana 5 years, 2 months ago

for now only TCG is allowed as an accelerator for riscv,
so remove the CONFIG_TCG use.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
 target/riscv/cpu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a52e0ce466..27dd1645c9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -561,10 +561,9 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
     /* For now, mark unmigratable: */
     cc->vmsd = &vmstate_riscv_cpu;
 #endif
-#ifdef CONFIG_TCG
     cc->tcg_ops.initialize = riscv_translate_init;
     cc->tlb_fill = riscv_cpu_tlb_fill;
-#endif
+
     device_class_set_props(dc, riscv_cpu_properties);
 }
 
-- 
2.26.2

Re: [RFC v9 16/32] target/riscv: remove CONFIG_TCG, as it is always TCG

Posted by Alistair Francis 5 years, 2 months ago

On Tue, Dec 8, 2020 at 12:52 PM Claudio Fontana <cfontana@suse.de> wrote:
>
> for now only TCG is allowed as an accelerator for riscv,
> so remove the CONFIG_TCG use.
>
> Signed-off-by: Claudio Fontana <cfontana@suse.de>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index a52e0ce466..27dd1645c9 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -561,10 +561,9 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
>      /* For now, mark unmigratable: */
>      cc->vmsd = &vmstate_riscv_cpu;
>  #endif
> -#ifdef CONFIG_TCG
>      cc->tcg_ops.initialize = riscv_translate_init;
>      cc->tlb_fill = riscv_cpu_tlb_fill;
> -#endif
> +
>      device_class_set_props(dc, riscv_cpu_properties);
>  }
>
> --
> 2.26.2
>
>