1
Arm queue; bugfixes only.
1
Hi; here's a target-arm pull for rc2. Four arm-related fixes,
2
and a couple of bug fixes for other areas of the codebase
3
that seemed like they'd fallen through the cracks.
2
4
3
thanks
5
thanks
4
-- PMM
6
-- PMM
5
7
6
The following changes since commit 48aa8f0ac536db3550a35c295ff7de94e4c33739:
8
The following changes since commit ccb86f079a9e4d94918086a9df18c1844347aff8:
7
9
8
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2020-11-16' into staging (2020-11-17 11:07:00 +0000)
10
Merge tag 'pull-nbd-2023-07-28' of https://repo.or.cz/qemu/ericb into staging (2023-07-28 09:56:57 -0700)
9
11
10
are available in the Git repository at:
12
are available in the Git repository at:
11
13
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201117
14
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230731
13
15
14
for you to fetch changes up to ab135622cf478585bdfcb68b85e4a817d74a0c42:
16
for you to fetch changes up to 108e8180c6b0c315711aa54e914030a313505c17:
15
17
16
tmp105: Correct handling of temperature limit checks (2020-11-17 12:56:33 +0000)
18
gdbstub: Fix client Ctrl-C handling (2023-07-31 14:57:32 +0100)
17
19
18
----------------------------------------------------------------
20
----------------------------------------------------------------
19
target-arm queue:
21
target-arm queue:
20
* hw/arm/virt: ARM_VIRT must select ARM_GIC
22
* Don't build AArch64 decodetree files for qemu-system-arm
21
* exynos: Fix bad printf format specifiers
23
* Fix TCG assert in v8.1M CSEL etc
22
* hw/input/ps2.c: Remove remnants of printf debug
24
* Fix MemOp for STGP
23
* target/openrisc: Remove dead code attempting to check "is timer disabled"
25
* gdbstub: Fix client Ctrl-C handling
24
* register: Remove unnecessary NULL check
26
* kvm: Fix crash due to access uninitialized kvm_state
25
* util/cutils: Fix Coverity array overrun in freq_to_str()
27
* elf2dmp: Don't abandon when Prcb is set to 0
26
* configure: Make "does libgio work" test pull in some actual functions
27
* tmp105: reset the T_low and T_High registers
28
* tmp105: Correct handling of temperature limit checks
29
28
30
----------------------------------------------------------------
29
----------------------------------------------------------------
31
Alex Chen (1):
30
Akihiko Odaki (1):
32
exynos: Fix bad printf format specifiers
31
elf2dmp: Don't abandon when Prcb is set to 0
33
32
34
Alistair Francis (1):
33
Gavin Shan (1):
35
register: Remove unnecessary NULL check
34
kvm: Fix crash due to access uninitialized kvm_state
36
35
37
Andrew Jones (1):
36
Nicholas Piggin (1):
38
hw/arm/virt: ARM_VIRT must select ARM_GIC
37
gdbstub: Fix client Ctrl-C handling
39
38
40
Peter Maydell (5):
39
Peter Maydell (2):
41
hw/input/ps2.c: Remove remnants of printf debug
40
target/arm: Avoid writing to constant TCGv in trans_CSEL()
42
target/openrisc: Remove dead code attempting to check "is timer disabled"
41
target/arm/tcg: Don't build AArch64 decodetree files for qemu-system-arm
43
configure: Make "does libgio work" test pull in some actual functions
44
hw/misc/tmp105: reset the T_low and T_High registers
45
tmp105: Correct handling of temperature limit checks
46
42
47
Philippe Mathieu-Daudé (1):
43
Richard Henderson (1):
48
util/cutils: Fix Coverity array overrun in freq_to_str()
44
target/arm: Fix MemOp for STGP
49
45
50
configure | 11 +++++--
46
accel/kvm/kvm-all.c | 2 +-
51
hw/misc/tmp105.h | 7 +++++
47
contrib/elf2dmp/main.c | 5 +++++
52
hw/core/register.c | 4 ---
48
gdbstub/gdbstub.c | 13 +++++++++++--
53
hw/input/ps2.c | 9 ------
49
target/arm/tcg/translate-a64.c | 21 ++++++++++++++++++---
54
hw/misc/tmp105.c | 73 ++++++++++++++++++++++++++++++++++++++------
50
target/arm/tcg/translate.c | 15 ++++++++-------
55
hw/timer/exynos4210_mct.c | 4 +--
51
target/arm/tcg/meson.build | 10 +++++++---
56
hw/timer/exynos4210_pwm.c | 8 ++---
52
6 files changed, 50 insertions(+), 16 deletions(-)
57
target/openrisc/sys_helper.c | 3 --
58
util/cutils.c | 3 +-
59
hw/arm/Kconfig | 1 +
60
10 files changed, 89 insertions(+), 34 deletions(-)
61
diff view generated by jsdifflib
Deleted patch
1
From: Andrew Jones <drjones@redhat.com>
2
1
3
The removal of the selection of A15MPCORE from ARM_VIRT also
4
removed what A15MPCORE selects, ARM_GIC. We still need ARM_GIC.
5
6
Fixes: bec3c97e0cf9 ("hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals")
7
Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
8
Signed-off-by: Andrew Jones <drjones@redhat.com>
9
Reviewed-by: Miroslav Rezanina <mrezanin@redhat.com>
10
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
11
Message-id: 20201111143440.112763-1-drjones@redhat.com
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
14
hw/arm/Kconfig | 1 +
15
1 file changed, 1 insertion(+)
16
17
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
18
index XXXXXXX..XXXXXXX 100644
19
--- a/hw/arm/Kconfig
20
+++ b/hw/arm/Kconfig
21
@@ -XXX,XX +XXX,XX @@ config ARM_VIRT
22
imply VFIO_PLATFORM
23
imply VFIO_XGMAC
24
imply TPM_TIS_SYSBUS
25
+ select ARM_GIC
26
select ACPI
27
select ARM_SMMUV3
28
select GPIO_KEY
29
--
30
2.20.1
31
32
diff view generated by jsdifflib
1
From: Alex Chen <alex.chen@huawei.com>
1
From: Richard Henderson <richard.henderson@linaro.org>
2
2
3
We should use printf format specifier "%u" instead of "%d" for
3
When converting to decodetree, the code to rebuild mop for the pair
4
argument of type "unsigned int".
4
only made it into trans_STP and not into trans_STGP.
5
5
6
Reported-by: Euler Robot <euler.robot@huawei.com>
6
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1790
7
Signed-off-by: Alex Chen <alex.chen@huawei.com>
7
Fixes: 8c212eb6594 ("target/arm: Convert load/store-pair to decodetree")
8
Message-id: 20201111073651.72804-1-alex.chen@huawei.com
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-id: 20230726165416.309624-1-richard.henderson@linaro.org
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
12
---
12
hw/timer/exynos4210_mct.c | 4 ++--
13
target/arm/tcg/translate-a64.c | 21 ++++++++++++++++++---
13
hw/timer/exynos4210_pwm.c | 8 ++++----
14
1 file changed, 18 insertions(+), 3 deletions(-)
14
2 files changed, 6 insertions(+), 6 deletions(-)
15
15
16
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
16
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
17
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
18
--- a/hw/timer/exynos4210_mct.c
18
--- a/target/arm/tcg/translate-a64.c
19
+++ b/hw/timer/exynos4210_mct.c
19
+++ b/target/arm/tcg/translate-a64.c
20
@@ -XXX,XX +XXX,XX @@ static void exynos4210_gcomp_raise_irq(void *opaque, uint32_t id)
20
@@ -XXX,XX +XXX,XX @@ static bool trans_STGP(DisasContext *s, arg_ldstpair *a)
21
/* If CSTAT is pending and IRQ is enabled */
21
MemOp mop;
22
if ((s->reg.int_cstat & G_INT_CSTAT_COMP(id)) &&
22
TCGv_i128 tmp;
23
(s->reg.int_enb & G_INT_ENABLE(id))) {
23
24
- DPRINTF("gcmp timer[%d] IRQ\n", id);
24
+ /* STGP only comes in one size. */
25
+ DPRINTF("gcmp timer[%u] IRQ\n", id);
25
+ tcg_debug_assert(a->sz == MO_64);
26
qemu_irq_raise(s->irq[id]);
26
+
27
if (!dc_isar_feature(aa64_mte_insn_reg, s)) {
28
return false;
27
}
29
}
28
}
30
@@ -XXX,XX +XXX,XX @@ static bool trans_STGP(DisasContext *s, arg_ldstpair *a)
29
@@ -XXX,XX +XXX,XX @@ static void exynos4210_mct_update_freq(Exynos4210MCTState *s)
31
gen_helper_stg(cpu_env, dirty_addr, dirty_addr);
30
MCT_CFG_GET_DIVIDER(s->reg_mct_cfg));
31
32
if (freq != s->freq) {
33
- DPRINTF("freq=%dHz\n", s->freq);
34
+ DPRINTF("freq=%uHz\n", s->freq);
35
36
/* global timer */
37
tx_ptimer_set_freq(s->g_timer.ptimer_frc, s->freq);
38
diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/timer/exynos4210_pwm.c
41
+++ b/hw/timer/exynos4210_pwm.c
42
@@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_update_freq(Exynos4210PWMState *s, uint32_t id)
43
44
if (freq != s->timer[id].freq) {
45
ptimer_set_freq(s->timer[id].ptimer, s->timer[id].freq);
46
- DPRINTF("freq=%dHz\n", s->timer[id].freq);
47
+ DPRINTF("freq=%uHz\n", s->timer[id].freq);
48
}
32
}
49
}
33
50
34
- mop = finalize_memop(s, a->sz);
51
@@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_tick(void *opaque)
35
- clean_addr = gen_mte_checkN(s, dirty_addr, true, false, 2 << a->sz, mop);
52
uint32_t id = s->id;
36
+ mop = finalize_memop(s, MO_64);
53
bool cmp;
37
+ clean_addr = gen_mte_checkN(s, dirty_addr, true, false, 2 << MO_64, mop);
54
38
55
- DPRINTF("timer %d tick\n", id);
39
tcg_rt = cpu_reg(s, a->rt);
56
+ DPRINTF("timer %u tick\n", id);
40
tcg_rt2 = cpu_reg(s, a->rt2);
57
41
58
/* set irq status */
42
- assert(a->sz == 3);
59
p->reg_tint_cstat |= TINT_CSTAT_STATUS(id);
43
+ /*
60
44
+ * STGP is defined as two 8-byte memory operations and one tag operation.
61
/* raise IRQ */
45
+ * We implement it as one single 16-byte memory operation for convenience.
62
if (p->reg_tint_cstat & TINT_CSTAT_ENABLE(id)) {
46
+ * Rebuild mop as for STP.
63
- DPRINTF("timer %d IRQ\n", id);
47
+ * TODO: The atomicity with LSE2 is stronger than required.
64
+ DPRINTF("timer %u IRQ\n", id);
48
+ * Need a form of MO_ATOM_WITHIN16_PAIR that never requires
65
qemu_irq_raise(p->timer[id].irq);
49
+ * 16-byte atomicity.
66
}
50
+ */
67
51
+ mop = MO_128;
68
@@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_tick(void *opaque)
52
+ if (s->align_mem) {
69
}
53
+ mop |= MO_ALIGN_8;
70
54
+ }
71
if (cmp) {
55
+ mop = finalize_memop_pair(s, mop);
72
- DPRINTF("auto reload timer %d count to %x\n", id,
56
73
+ DPRINTF("auto reload timer %u count to %x\n", id,
57
tmp = tcg_temp_new_i128();
74
p->timer[id].reg_tcntb);
58
if (s->be_data == MO_LE) {
75
ptimer_set_count(p->timer[id].ptimer, p->timer[id].reg_tcntb);
76
ptimer_run(p->timer[id].ptimer, 1);
77
--
59
--
78
2.20.1
60
2.34.1
79
80
diff view generated by jsdifflib
Deleted patch
1
In commit 5edab03d4040 we added tracepoints to the ps2 keyboard
2
and mouse emulation. However we didn't remove all the debug-by-printf
3
support. In fact there is only one printf() remaining, and it is
4
redundant with the trace_ps2_write_mouse() event next to it.
5
Remove the printf() and the now-unused DEBUG* macros.
6
1
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
9
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
10
Message-id: 20201101133258.4240-1-peter.maydell@linaro.org
11
---
12
hw/input/ps2.c | 9 ---------
13
1 file changed, 9 deletions(-)
14
15
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/hw/input/ps2.c
18
+++ b/hw/input/ps2.c
19
@@ -XXX,XX +XXX,XX @@
20
21
#include "trace.h"
22
23
-/* debug PC keyboard */
24
-//#define DEBUG_KBD
25
-
26
-/* debug PC keyboard : only mouse */
27
-//#define DEBUG_MOUSE
28
-
29
/* Keyboard Commands */
30
#define KBD_CMD_SET_LEDS    0xED    /* Set keyboard leds */
31
#define KBD_CMD_ECHO     0xEE
32
@@ -XXX,XX +XXX,XX @@ void ps2_write_mouse(void *opaque, int val)
33
PS2MouseState *s = (PS2MouseState *)opaque;
34
35
trace_ps2_write_mouse(opaque, val);
36
-#ifdef DEBUG_MOUSE
37
- printf("kbd: write mouse 0x%02x\n", val);
38
-#endif
39
switch(s->common.write_cmd) {
40
default:
41
case -1:
42
--
43
2.20.1
44
45
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
From: Akihiko Odaki <akihiko.odaki@daynix.com>
2
2
3
Fix Coverity CID 1435957: Memory - illegal accesses (OVERRUN):
3
Prcb may be set to 0 for some CPUs if the dump was taken before they
4
start. The dump may still contain valuable information for started CPUs
5
so don't abandon conversion in such a case.
4
6
5
>>> Overrunning array "suffixes" of 7 8-byte elements at element
7
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
6
index 7 (byte offset 63) using index "idx" (which evaluates to 7).
8
Reviewed-by: Viktor Prutyanov <viktor.prutyanov@phystech.edu>
7
9
Message-id: 20230611033434.14659-1-akihiko.odaki@daynix.com
8
Note, the biggest input value freq_to_str() can accept is UINT64_MAX,
9
which is ~18.446 EHz, less than 1000 EHz.
10
11
Reported-by: Eduardo Habkost <ehabkost@redhat.com>
12
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
13
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
14
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
15
Reviewed-by: Luc Michel <luc@lmichel.fr>
16
Message-id: 20201101215755.2021421-1-f4bug@amsat.org
17
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
18
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
19
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20
---
11
---
21
util/cutils.c | 3 ++-
12
contrib/elf2dmp/main.c | 5 +++++
22
1 file changed, 2 insertions(+), 1 deletion(-)
13
1 file changed, 5 insertions(+)
23
14
24
diff --git a/util/cutils.c b/util/cutils.c
15
diff --git a/contrib/elf2dmp/main.c b/contrib/elf2dmp/main.c
25
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
26
--- a/util/cutils.c
17
--- a/contrib/elf2dmp/main.c
27
+++ b/util/cutils.c
18
+++ b/contrib/elf2dmp/main.c
28
@@ -XXX,XX +XXX,XX @@ char *freq_to_str(uint64_t freq_hz)
19
@@ -XXX,XX +XXX,XX @@ static int fill_context(KDDEBUGGER_DATA64 *kdbg,
29
double freq = freq_hz;
20
return 1;
30
size_t idx = 0;
21
}
31
22
32
- while (freq >= 1000.0 && idx < ARRAY_SIZE(suffixes)) {
23
+ if (!Prcb) {
33
+ while (freq >= 1000.0) {
24
+ eprintf("Context for CPU #%d is missing\n", i);
34
freq /= 1000.0;
25
+ continue;
35
idx++;
26
+ }
36
}
27
+
37
+ assert(idx < ARRAY_SIZE(suffixes));
28
if (va_space_rw(vs, Prcb + kdbg->OffsetPrcbContext,
38
29
&Context, sizeof(Context), 0)) {
39
return g_strdup_printf("%0.3g %sHz", freq, suffixes[idx]);
30
eprintf("Failed to read CPU #%d ContextFrame location\n", i);
40
}
41
--
31
--
42
2.20.1
32
2.34.1
43
44
diff view generated by jsdifflib
1
The TMP105 datasheet says that in Interrupt Mode (when TM==1) the device
1
In commit 0b188ea05acb5 we changed the implementation of
2
signals an alert when the temperature equals or exceeds the T_high value and
2
trans_CSEL() to use tcg_constant_i32(). However, this change
3
then remains high until a device register is read or the device responds to
3
was incorrect, because the implementation of the function
4
the SMBUS Alert Response address, or the device is put into Shutdown Mode.
4
sets up the TCGv_i32 rn and rm to be either zero or else
5
Thereafter the Alert pin will only be re-signalled when temperature falls
5
a TCG temp created in load_reg(), and these TCG temps are
6
below T_low; alert can then be cleared in the same set of ways, and the
6
then in both cases written to by the emitted TCG ops.
7
device returns to its initial "alert when temperature goes above T_high"
7
The result is that we hit a TCG assertion:
8
mode. (If this textual description is confusing, see figure 3 in the
9
TI datasheet at https://www.ti.com/lit/gpn/tmp105 .)
10
8
11
We were misimplementing this as a simple "always alert if temperature is
9
qemu-system-arm: ../../tcg/tcg.c:4455: tcg_reg_alloc_mov: Assertion `!temp_readonly(ots)' failed.
12
above T_high or below T_low" condition, which gives a spurious alert on
13
startup if using the "T_high = 80 degrees C, T_low = 75 degrees C" reset
14
limit values.
15
10
16
Implement the correct (hysteresis) behaviour by tracking whether we
11
(or on a non-debug build, just produce a garbage result)
17
are currently looking for the temperature to rise over T_high or
18
for it to fall below T_low. Our implementation of the comparator
19
mode (TM==0) wasn't wrong, but rephrase it to match the way that
20
interrupt mode is now handled for clarity.
21
12
13
Adjust the code so that rn and rm are always writeable
14
temporaries whether the instruction is using the special
15
case "0" or a normal register as input.
16
17
Cc: qemu-stable@nongnu.org
18
Fixes: 0b188ea05acb5 ("target/arm: Use tcg_constant in trans_CSEL")
22
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
19
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
23
Reviewed-by: Cédric Le Goater <clg@kaod.org>
20
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
24
Message-id: 20201110150023.25533-3-peter.maydell@linaro.org
21
Message-id: 20230727103906.2641264-1-peter.maydell@linaro.org
25
---
22
---
26
hw/misc/tmp105.h | 7 +++++
23
target/arm/tcg/translate.c | 15 ++++++++-------
27
hw/misc/tmp105.c | 70 +++++++++++++++++++++++++++++++++++++++++-------
24
1 file changed, 8 insertions(+), 7 deletions(-)
28
2 files changed, 68 insertions(+), 9 deletions(-)
29
25
30
diff --git a/hw/misc/tmp105.h b/hw/misc/tmp105.h
26
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
31
index XXXXXXX..XXXXXXX 100644
27
index XXXXXXX..XXXXXXX 100644
32
--- a/hw/misc/tmp105.h
28
--- a/target/arm/tcg/translate.c
33
+++ b/hw/misc/tmp105.h
29
+++ b/target/arm/tcg/translate.c
34
@@ -XXX,XX +XXX,XX @@ struct TMP105State {
30
@@ -XXX,XX +XXX,XX @@ static bool trans_IT(DisasContext *s, arg_IT *a)
35
int16_t limit[2];
31
/* v8.1M CSEL/CSINC/CSNEG/CSINV */
36
int faults;
32
static bool trans_CSEL(DisasContext *s, arg_CSEL *a)
37
uint8_t alarm;
33
{
38
+ /*
34
- TCGv_i32 rn, rm, zero;
39
+ * The TMP105 initially looks for a temperature rising above T_high;
35
+ TCGv_i32 rn, rm;
40
+ * once this is detected, the condition it looks for next is the
36
DisasCompare c;
41
+ * temperature falling below T_low. This flag is false when initially
37
42
+ * looking for T_high, true when looking for T_low.
38
if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) {
43
+ */
39
@@ -XXX,XX +XXX,XX @@ static bool trans_CSEL(DisasContext *s, arg_CSEL *a)
44
+ bool detect_falling;
45
};
46
47
#endif
48
diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c
49
index XXXXXXX..XXXXXXX 100644
50
--- a/hw/misc/tmp105.c
51
+++ b/hw/misc/tmp105.c
52
@@ -XXX,XX +XXX,XX @@ static void tmp105_alarm_update(TMP105State *s)
53
return;
54
}
40
}
55
41
56
- if ((s->config >> 1) & 1) {                    /* TM */
42
/* In this insn input reg fields of 0b1111 mean "zero", not "PC" */
57
- if (s->temperature >= s->limit[1])
43
- zero = tcg_constant_i32(0);
58
- s->alarm = 1;
44
+ rn = tcg_temp_new_i32();
59
- else if (s->temperature < s->limit[0])
45
+ rm = tcg_temp_new_i32();
60
- s->alarm = 1;
46
if (a->rn == 15) {
61
+ if (s->config >> 1 & 1) {
47
- rn = zero;
62
+ /*
48
+ tcg_gen_movi_i32(rn, 0);
63
+ * TM == 1 : Interrupt mode. We signal Alert when the
64
+ * temperature rises above T_high, and expect the guest to clear
65
+ * it (eg by reading a device register).
66
+ */
67
+ if (s->detect_falling) {
68
+ if (s->temperature < s->limit[0]) {
69
+ s->alarm = 1;
70
+ s->detect_falling = false;
71
+ }
72
+ } else {
73
+ if (s->temperature >= s->limit[1]) {
74
+ s->alarm = 1;
75
+ s->detect_falling = true;
76
+ }
77
+ }
78
} else {
49
} else {
79
- if (s->temperature >= s->limit[1])
50
- rn = load_reg(s, a->rn);
80
- s->alarm = 1;
51
+ load_reg_var(s, rn, a->rn);
81
- else if (s->temperature < s->limit[0])
82
- s->alarm = 0;
83
+ /*
84
+ * TM == 0 : Comparator mode. We signal Alert when the temperature
85
+ * rises above T_high, and stop signalling it when the temperature
86
+ * falls below T_low.
87
+ */
88
+ if (s->detect_falling) {
89
+ if (s->temperature < s->limit[0]) {
90
+ s->alarm = 0;
91
+ s->detect_falling = false;
92
+ }
93
+ } else {
94
+ if (s->temperature >= s->limit[1]) {
95
+ s->alarm = 1;
96
+ s->detect_falling = true;
97
+ }
98
+ }
99
}
52
}
100
53
if (a->rm == 15) {
101
tmp105_interrupt_update(s);
54
- rm = zero;
102
@@ -XXX,XX +XXX,XX @@ static int tmp105_post_load(void *opaque, int version_id)
55
+ tcg_gen_movi_i32(rm, 0);
103
return 0;
56
} else {
104
}
57
- rm = load_reg(s, a->rm);
105
58
+ load_reg_var(s, rm, a->rm);
106
+static bool detect_falling_needed(void *opaque)
107
+{
108
+ TMP105State *s = opaque;
109
+
110
+ /*
111
+ * We only need to migrate the detect_falling bool if it's set;
112
+ * for migration from older machines we assume that it is false
113
+ * (ie temperature is not out of range).
114
+ */
115
+ return s->detect_falling;
116
+}
117
+
118
+static const VMStateDescription vmstate_tmp105_detect_falling = {
119
+ .name = "TMP105/detect-falling",
120
+ .version_id = 1,
121
+ .minimum_version_id = 1,
122
+ .needed = detect_falling_needed,
123
+ .fields = (VMStateField[]) {
124
+ VMSTATE_BOOL(detect_falling, TMP105State),
125
+ VMSTATE_END_OF_LIST()
126
+ }
127
+};
128
+
129
static const VMStateDescription vmstate_tmp105 = {
130
.name = "TMP105",
131
.version_id = 0,
132
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tmp105 = {
133
VMSTATE_UINT8(alarm, TMP105State),
134
VMSTATE_I2C_SLAVE(i2c, TMP105State),
135
VMSTATE_END_OF_LIST()
136
+ },
137
+ .subsections = (const VMStateDescription*[]) {
138
+ &vmstate_tmp105_detect_falling,
139
+ NULL
140
}
59
}
141
};
60
142
61
switch (a->op) {
143
@@ -XXX,XX +XXX,XX @@ static void tmp105_reset(I2CSlave *i2c)
62
@@ -XXX,XX +XXX,XX @@ static bool trans_CSEL(DisasContext *s, arg_CSEL *a)
144
s->config = 0;
63
}
145
s->faults = tmp105_faultq[(s->config >> 3) & 3];
64
146
s->alarm = 0;
65
arm_test_cc(&c, a->fcond);
147
+ s->detect_falling = false;
66
- tcg_gen_movcond_i32(c.cond, rn, c.value, zero, rn, rm);
148
67
+ tcg_gen_movcond_i32(c.cond, rn, c.value, tcg_constant_i32(0), rn, rm);
149
s->limit[0] = 0x4b00; /* T_LOW, 75 degrees C */
68
150
s->limit[1] = 0x5000; /* T_HIGH, 80 degrees C */
69
store_reg(s, a->rd, rn);
70
return true;
151
--
71
--
152
2.20.1
72
2.34.1
153
154
diff view generated by jsdifflib
1
The TMP105 datasheet (https://www.ti.com/lit/gpn/tmp105) says that the
1
Currently we list all the Arm decodetree files together and add them
2
power-up reset values for the T_low and T_high registers are 80 degrees C
2
unconditionally to arm_ss. This means we build them for both
3
and 75 degrees C, which are 0x500 and 0x4B0 hex according to table 5. These
3
qemu-system-aarch64 and qemu-system-arm. However, some of them are
4
values are then shifted right by four bits to give the register reset
4
AArch64-specific, so there is no need to build them for
5
values, since both registers store the 12 bits of temperature data in bits
5
qemu-system-arm. (Meson is smart enough to notice that the generated
6
[15..4] of a 16 bit register.
6
.c.inc file is not used by any objects that go into qemu-system-arm,
7
so we only unnecessarily run decodetree, not anything more
8
heavyweight like a recompile or relink, but it's still unnecessary
9
work.)
7
10
8
We were resetting these registers to zero, which is problematic for Linux
11
Split gen into gen_a32 and gen_a64, and only add gen_a64 for
9
guests which enable the alert interrupt and then immediately take an
12
TARGET_AARCH64 compiles.
10
unexpected overtemperature alert because the current temperature is above
11
freezing...
12
13
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
14
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
14
Reviewed-by: Cédric Le Goater <clg@kaod.org>
15
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
15
Message-id: 20201110150023.25533-2-peter.maydell@linaro.org
16
Message-id: 20230718104628.1137734-1-peter.maydell@linaro.org
16
---
17
---
17
hw/misc/tmp105.c | 3 +++
18
target/arm/tcg/meson.build | 10 +++++++---
18
1 file changed, 3 insertions(+)
19
1 file changed, 7 insertions(+), 3 deletions(-)
19
20
20
diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c
21
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
21
index XXXXXXX..XXXXXXX 100644
22
index XXXXXXX..XXXXXXX 100644
22
--- a/hw/misc/tmp105.c
23
--- a/target/arm/tcg/meson.build
23
+++ b/hw/misc/tmp105.c
24
+++ b/target/arm/tcg/meson.build
24
@@ -XXX,XX +XXX,XX @@ static void tmp105_reset(I2CSlave *i2c)
25
@@ -XXX,XX +XXX,XX @@
25
s->faults = tmp105_faultq[(s->config >> 3) & 3];
26
-gen = [
26
s->alarm = 0;
27
+gen_a64 = [
27
28
+ decodetree.process('a64.decode', extra_args: ['--static-decode=disas_a64']),
28
+ s->limit[0] = 0x4b00; /* T_LOW, 75 degrees C */
29
decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
29
+ s->limit[1] = 0x5000; /* T_HIGH, 80 degrees C */
30
decodetree.process('sme.decode', extra_args: '--decode=disas_sme'),
31
decodetree.process('sme-fa64.decode', extra_args: '--static-decode=disas_sme_fa64'),
32
+]
30
+
33
+
31
tmp105_interrupt_update(s);
34
+gen_a32 = [
32
}
35
decodetree.process('neon-shared.decode', extra_args: '--decode=disas_neon_shared'),
33
36
decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'),
37
decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'),
38
@@ -XXX,XX +XXX,XX @@ gen = [
39
decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
40
decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
41
decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
42
- decodetree.process('a64.decode', extra_args: ['--static-decode=disas_a64']),
43
]
44
45
-arm_ss.add(gen)
46
+arm_ss.add(gen_a32)
47
+arm_ss.add(when: 'TARGET_AARCH64', if_true: gen_a64)
48
49
arm_ss.add(files(
50
'cpu32.c',
34
--
51
--
35
2.20.1
52
2.34.1
36
53
37
54
diff view generated by jsdifflib
1
From: Alistair Francis <alistair.francis@wdc.com>
1
From: Gavin Shan <gshan@redhat.com>
2
2
3
This patch fixes CID 1432800 by removing an unnecessary check.
3
Runs into core dump on arm64 and the backtrace extracted from the
4
core dump is shown as below. It's caused by accessing uninitialized
5
@kvm_state in kvm_flush_coalesced_mmio_buffer() due to commit 176d073029
6
("hw/arm/virt: Use machine_memory_devices_init()"), where the machine's
7
memory region is added earlier than before.
4
8
5
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
9
main
6
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
qemu_init
11
configure_accelerators
12
qemu_opts_foreach
13
do_configure_accelerator
14
accel_init_machine
15
kvm_init
16
virt_kvm_type
17
virt_set_memmap
18
machine_memory_devices_init
19
memory_region_add_subregion
20
memory_region_add_subregion_common
21
memory_region_update_container_subregions
22
memory_region_transaction_begin
23
qemu_flush_coalesced_mmio_buffer
24
kvm_flush_coalesced_mmio_buffer
25
26
Fix it by bailing early in kvm_flush_coalesced_mmio_buffer() on the
27
uninitialized @kvm_state. With this applied, no crash is observed on
28
arm64.
29
30
Fixes: 176d073029 ("hw/arm/virt: Use machine_memory_devices_init()")
31
Signed-off-by: Gavin Shan <gshan@redhat.com>
32
Reviewed-by: David Hildenbrand <david@redhat.com>
33
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
34
Message-id: 20230731125946.2038742-1-gshan@redhat.com
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
35
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
36
---
9
hw/core/register.c | 4 ----
37
accel/kvm/kvm-all.c | 2 +-
10
1 file changed, 4 deletions(-)
38
1 file changed, 1 insertion(+), 1 deletion(-)
11
39
12
diff --git a/hw/core/register.c b/hw/core/register.c
40
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
13
index XXXXXXX..XXXXXXX 100644
41
index XXXXXXX..XXXXXXX 100644
14
--- a/hw/core/register.c
42
--- a/accel/kvm/kvm-all.c
15
+++ b/hw/core/register.c
43
+++ b/accel/kvm/kvm-all.c
16
@@ -XXX,XX +XXX,XX @@ static RegisterInfoArray *register_init_block(DeviceState *owner,
44
@@ -XXX,XX +XXX,XX @@ void kvm_flush_coalesced_mmio_buffer(void)
17
int index = rae[i].addr / data_size;
45
{
18
RegisterInfo *r = &ri[index];
46
KVMState *s = kvm_state;
19
47
20
- if (data + data_size * index == 0 || !&rae[i]) {
48
- if (s->coalesced_flush_in_progress) {
21
- continue;
49
+ if (!s || s->coalesced_flush_in_progress) {
22
- }
50
return;
23
-
51
}
24
/* Init the register, this will zero it. */
25
object_initialize((void *)r, sizeof(*r), TYPE_REGISTER);
26
52
27
--
53
--
28
2.20.1
54
2.34.1
29
55
30
56
diff view generated by jsdifflib
1
In the mtspr helper we attempt to check for "is the timer disabled"
1
From: Nicholas Piggin <npiggin@gmail.com>
2
with "if (env->ttmr & TIMER_NONE)". This is wrong because TIMER_NONE
3
is zero and the condition is always false (Coverity complains about
4
the dead code.)
5
2
6
The correct check would be to test whether the TTMR_M field in the
3
The gdb remote protocol has a special interrupt character (0x03) that is
7
register is equal to TIMER_NONE instead. However, the
4
transmitted outside the regular packet processing, and represents a
8
cpu_openrisc_timer_update() function checks whether the timer is
5
Ctrl-C pressed in the client. Despite not being a regular packet, it
9
enabled (it looks at cpu->env.is_counting, which is set to 0 via
6
does expect a regular stop response if the stub successfully stops the
10
cpu_openrisc_count_stop() when the TTMR_M field is set to
7
running program.
11
TIMER_NONE), so there's no need to check for "timer disabled" in the
12
target/openrisc code. Instead, simply remove the dead code.
13
8
14
Fixes: Coverity CID 1005812
9
See: https://sourceware.org/gdb/onlinedocs/gdb/Interrupts.html
10
11
Inhibiting the stop reply packet can lead to gdb client hang. So permit
12
a stop response when receiving a character from gdb that stops the vm.
13
Additionally, add a warning if that was not a 0x03 character, because
14
the gdb session is likely to end up getting confused if this happens.
15
16
Cc: qemu-stable@nongnu.org
17
Fixes: 758370052fb ("gdbstub: only send stop-reply packets when allowed to")
18
Reported-by: Frederic Barrat <fbarrat@linux.ibm.com>
19
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
20
Tested-by: Joel Stanley <joel@jms.id.au>
21
Message-id: 20230711085903.304496-1-npiggin@gmail.com
22
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
23
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
Acked-by: Stafford Horne <shorne@gmail.com>
17
Message-id: 20201103114654.18540-1-peter.maydell@linaro.org
18
---
24
---
19
target/openrisc/sys_helper.c | 3 ---
25
gdbstub/gdbstub.c | 13 +++++++++++--
20
1 file changed, 3 deletions(-)
26
1 file changed, 11 insertions(+), 2 deletions(-)
21
27
22
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
28
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
23
index XXXXXXX..XXXXXXX 100644
29
index XXXXXXX..XXXXXXX 100644
24
--- a/target/openrisc/sys_helper.c
30
--- a/gdbstub/gdbstub.c
25
+++ b/target/openrisc/sys_helper.c
31
+++ b/gdbstub/gdbstub.c
26
@@ -XXX,XX +XXX,XX @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
32
@@ -XXX,XX +XXX,XX @@ void gdb_read_byte(uint8_t ch)
27
33
return;
28
case TO_SPR(10, 1): /* TTCR */
34
}
29
cpu_openrisc_count_set(cpu, rb);
35
if (runstate_is_running()) {
30
- if (env->ttmr & TIMER_NONE) {
36
- /* when the CPU is running, we cannot do anything except stop
31
- return;
37
- it when receiving a char */
32
- }
38
+ /*
33
cpu_openrisc_timer_update(cpu);
39
+ * When the CPU is running, we cannot do anything except stop
34
break;
40
+ * it when receiving a char. This is expected on a Ctrl-C in the
41
+ * gdb client. Because we are in all-stop mode, gdb sends a
42
+ * 0x03 byte which is not a usual packet, so we handle it specially
43
+ * here, but it does expect a stop reply.
44
+ */
45
+ if (ch != 0x03) {
46
+ warn_report("gdbstub: client sent packet while target running\n");
47
+ }
48
+ gdbserver_state.allow_stop_reply = true;
49
vm_stop(RUN_STATE_PAUSED);
50
} else
35
#endif
51
#endif
36
--
52
--
37
2.20.1
53
2.34.1
38
39
diff view generated by jsdifflib
Deleted patch
1
In commit 76346b6264a9b01979 we tried to add a configure check that
2
the libgio pkg-config data was correct, which builds an executable
3
linked against it. Unfortunately this doesn't catch the problem
4
(missing static library dependency info), because a "do nothing" test
5
source file doesn't have any symbol references that cause the linker
6
to pull in .o files from libgio.a, and so we don't see the "missing
7
symbols from libmount" error that a full QEMU link triggers.
8
1
9
(The ineffective test went unnoticed because of a typo that
10
effectively disabled libgio unconditionally, but after commit
11
3569a5dfc11f2 fixed that, a static link of the system emulator on
12
Ubuntu stopped working again.)
13
14
Improve the gio test by having the test source fragment reference a
15
g_dbus function (which is what is indirectly causing us to end up
16
wanting functions from libmount).
17
18
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
19
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
20
Message-id: 20201116104617.18333-1-peter.maydell@linaro.org
21
---
22
configure | 11 +++++++++--
23
1 file changed, 9 insertions(+), 2 deletions(-)
24
25
diff --git a/configure b/configure
26
index XXXXXXX..XXXXXXX 100755
27
--- a/configure
28
+++ b/configure
29
@@ -XXX,XX +XXX,XX @@ if $pkg_config --atleast-version=$glib_req_ver gio-2.0; then
30
# Check that the libraries actually work -- Ubuntu 18.04 ships
31
# with pkg-config --static --libs data for gio-2.0 that is missing
32
# -lblkid and will give a link error.
33
- write_c_skeleton
34
- if compile_prog "" "$gio_libs" ; then
35
+ cat > $TMPC <<EOF
36
+#include <gio/gio.h>
37
+int main(void)
38
+{
39
+ g_dbus_proxy_new_sync(0, 0, 0, 0, 0, 0, 0, 0);
40
+ return 0;
41
+}
42
+EOF
43
+ if compile_prog "$gio_cflags" "$gio_libs" ; then
44
gio=yes
45
else
46
gio=no
47
--
48
2.20.1
49
50
diff view generated by jsdifflib