Patches for rc1: nothing major, just some minor bugfixes and

code cleanups.

The following changes since commit f7e1914adad8885a5d4c70239ab90d901ed97e9f:

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201109' into staging (2020-11-10 09:24:56 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201110

for you to fetch changes up to b6c56c8a9a4064ea783f352f43c5df6231a110fa:

target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check (2020-11-10 11:03:48 +0000)

* hw/arm/Kconfig: ARM_V7M depends on PTIMER

* Minor coding style fixes

* docs: add some notes on the sbsa-ref machine

* hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals

* target/arm: Fix neon VTBL/VTBX for len > 1

* hw/arm/armsse: Correct expansion MPC interrupt lines

* hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ

* hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()

* hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input

* hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary

* hw/arm/nseries: Check return value from load_image_targphys()

* tests/qtest/npcm7xx_rng-test: count runs properly

* target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check

Alex Bennée (1):

docs: add some notes on the sbsa-ref machine

AlexChen (1):

ssi: Fix bad printf format specifiers

Andrew Jones (1):

hw/arm/Kconfig: ARM_V7M depends on PTIMER

Havard Skinnemoen (1):

tests/qtest/npcm7xx_rng-test: count runs properly

From: Xinhao Zhang <zhangxinhao1@huawei.com>

Fix code style. Operator needs spaces both sides.

Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>

Signed-off-by: Kai Deng <dengkai1@huawei.com>

Message-id: 20201103114529.638233-1-zhangxinhao1@huawei.com

target/arm/arch_dump.c | 8 ++++----

target/arm/arm-semi.c | 8 ++++----

target/arm/helper.c | 2 +-

3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c

--- a/target/arm/arch_dump.c

+++ b/target/arm/arch_dump.c

@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,

for (i = 0; i < 32; ++i) {

uint64_t *q = aa64_vfp_qreg(env, i);

- note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);

- note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);

+ note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]);

+ note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]);

if (s->dump_info.d_endian == ELFDATA2MSB) {

@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,

*/

for (i = 0; i < 32; ++i) {

uint64_t tmp = note.vfp.vregs[2*i];

- note.vfp.vregs[2*i] = note.vfp.vregs[2*i+1];

- note.vfp.vregs[2*i+1] = tmp;

+ note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1];

+ note.vfp.vregs[2 * i + 1] = tmp;

}

diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/arm-semi.c

+++ b/target/arm/arm-semi.c

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

if (use_gdb_syscalls()) {

arm_semi_open_guestfd = guestfd;

ret = arm_gdb_syscall(cpu, arm_semi_open_cb, "open,%s,%x,1a4", arg0,

- (int)arg2+1, gdb_open_modeflags[arg1]);

+ (int)arg2 + 1, gdb_open_modeflags[arg1]);

} else {

ret = set_swi_errno(env, open(s, open_modeflags[arg1], 0644));

if (ret == (uint32_t)-1) {

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(1);

if (use_gdb_syscalls()) {

ret = arm_gdb_syscall(cpu, arm_semi_cb, "unlink,%s",

- arg0, (int)arg1+1);

+ arg0, (int)arg1 + 1);

} else {

s = lock_user_string(arg0);

if (!s) {

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(3);

if (use_gdb_syscalls()) {

return arm_gdb_syscall(cpu, arm_semi_cb, "rename,%s,%s",

- arg0, (int)arg1+1, arg2, (int)arg3+1);

+ arg0, (int)arg1 + 1, arg2, (int)arg3 + 1);

} else {

char *s2;

s = lock_user_string(arg0);

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(1);

if (use_gdb_syscalls()) {

return arm_gdb_syscall(cpu, arm_semi_cb, "system,%s",

- arg0, (int)arg1+1);

+ arg0, (int)arg1 + 1);

} else {

s = lock_user_string(arg0);

if (!s) {

diff --git a/target/arm/helper.c b/target/arm/helper.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/helper.c

+++ b/target/arm/helper.c

@@ -XXX,XX +XXX,XX @@ uint32_t HELPER(usad8)(uint32_t a, uint32_t b)

uint32_t sum;

sum = do_usad(a, b);

sum += do_usad(a >> 8, b >> 8);

- sum += do_usad(a >> 16, b >>16);

+ sum += do_usad(a >> 16, b >> 16);

sum += do_usad(a >> 24, b >> 24);

return sum;

}

2.20.1

From: Havard Skinnemoen <hskinnemoen@google.com>

The number of runs is equal to the number of 0-1 and 1-0 transitions,

plus one. Currently, it's counting the number of times these transitions

do _not_ happen, plus one.

Source:

https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-22r1a.pdf

section 2.3.4 point (3).

Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>

Message-id: 20201103011457.2959989-2-hskinnemoen@google.com

tests/qtest/npcm7xx_rng-test.c | 2 +-

1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/qtest/npcm7xx_rng-test.c b/tests/qtest/npcm7xx_rng-test.c

--- a/tests/qtest/npcm7xx_rng-test.c

+++ b/tests/qtest/npcm7xx_rng-test.c

@@ -XXX,XX +XXX,XX @@ static double calc_runs_p(const unsigned long *buf, unsigned int nr_bits)

pi = (double)nr_ones / nr_bits;

for (k = 0; k < nr_bits - 1; k++) {

- vn_obs += !(test_bit(k, buf) ^ test_bit(k + 1, buf));

+ vn_obs += (test_bit(k, buf) ^ test_bit(k + 1, buf));

}

vn_obs += 1;

2.20.1

From: AlexChen <alex.chen@huawei.com>

We should use printf format specifier "%u" instead of "%d" for

argument of type "unsigned int".

Reported-by: Euler Robot <euler.robot@huawei.com>

Signed-off-by: Alex Chen <alex.chen@huawei.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Message-id: 5FA280F5.8060902@huawei.com

hw/ssi/imx_spi.c | 2 +-

hw/ssi/xilinx_spi.c | 2 +-

2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c

--- a/hw/ssi/imx_spi.c

+++ b/hw/ssi/imx_spi.c

@@ -XXX,XX +XXX,XX @@ static const char *imx_spi_reg_name(uint32_t reg)

case ECSPI_MSGDATA:

return "ECSPI_MSGDATA";

default:

- sprintf(unknown, "%d ?", reg);

+ sprintf(unknown, "%u ?", reg);

return unknown;

diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c

--- a/hw/ssi/xilinx_spi.c

+++ b/hw/ssi/xilinx_spi.c

@@ -XXX,XX +XXX,XX @@ static void xlx_spi_update_irq(XilinxSPI *s)

irq chain unless things really changed. */

if (pending != s->irqline) {

s->irqline = pending;

- DB_PRINT("irq_change of state %d ISR:%x IER:%X\n",

+ DB_PRINT("irq_change of state %u ISR:%x IER:%X\n",

pending, s->regs[R_IPISR], s->regs[R_IPIER]);

qemu_set_irq(s->irq, pending);

2.20.1

Checks for UNDEF cases should go before the "is VFP enabled?" access

check, except in special cases. Move a stray UNDEF check in the VTBL

trans function up above the access check.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20201109145324.2859-1-peter.maydell@linaro.org

target/arm/translate-neon.c.inc | 8 ++++----

1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc

--- a/target/arm/translate-neon.c.inc

+++ b/target/arm/translate-neon.c.inc

@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)

return false;

- if (!vfp_access_check(s)) {

- return true;

- }

-

if ((a->vn + a->len + 1) > 32) {

/*

* This is UNPREDICTABLE; we choose to UNDEF to avoid the

@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)

return false;

+ if (!vfp_access_check(s)) {

+ return true;

+ }

+

desc = tcg_const_i32((a->vn << 2) | a->len);

def = tcg_temp_new_i64();

if (a->op) {

2.20.1

From: Xinhao Zhang <zhangxinhao1@huawei.com>

Fix code style. Don't use '#' flag of printf format ('%#') in

format strings, use '0x' prefix instead

Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>

Signed-off-by: Kai Deng <dengkai1@huawei.com>

Message-id: 20201103114529.638233-2-zhangxinhao1@huawei.com

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

target/arm/translate-a64.c | 4 ++--

1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c

--- a/target/arm/translate-a64.c

+++ b/target/arm/translate-a64.c

@@ -XXX,XX +XXX,XX @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)

gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);

break;

default:

- fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",

+ fprintf(stderr, "%s: insn 0x%04x, fpop 0x%2x @ 0x%" PRIx64 "\n",

__func__, insn, fpopcode, s->pc_curr);

g_assert_not_reached();

}

@@ -XXX,XX +XXX,XX @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)

case 0x7f: /* FSQRT (vector) */

break;

default:

- fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);

+ fprintf(stderr, "%s: insn 0x%04x fpop 0x%2x\n", __func__, insn, fpop);

g_assert_not_reached();

2.20.1