thanks

+ * Camera interface (DCMI)

+ * Controller Area Network (CAN)

+ * Cycle Redundancy Check (CRC) calculation unit

+ * Digital to Analog Converter (DAC)

+ * DMA controller

+ * Ethernet controller

+ * Flash Interface Unit

+ * GPIO controller

+ * I2C controller

+ * Inter-Integrated Sound (I2S) controller

+ * Power supply configuration (PWR)

+ * Random Number Generator (RNG)

+ * Real-Time Clock (RTC) controller

+ * Reset and Clock Controller (RCC)

+ * Secure Digital Input/Output (SDIO) interface

+ * USB OTG

+ * Watchdog controller (IWDG, WWDG)

+

+Boot options

+------------

+

+The STM32 machines can be started using the ``-kernel`` option to load a

+firmware. Example:

+

+.. code-block:: bash

+

+ $ qemu-system-arm -M stm32vldiscovery -kernel firmware.bin

Convert the use of the DPRINTF debug macro in the PL061 model to

use tracepoints.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

---

hw/gpio/pl061.c | 27 +++++++++------------------

hw/gpio/trace-events | 6 ++++++

2 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/gpio/pl061.c

+++ b/hw/gpio/pl061.c

@@ -XXX,XX +XXX,XX @@

#include "qemu/log.h"

#include "qemu/module.h"

#include "qom/object.h"

-

-//#define DEBUG_PL061 1

-

-#ifdef DEBUG_PL061

-#define DPRINTF(fmt, ...) \

-do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0)

-#define BADF(fmt, ...) \

-do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)

-#else

-#define DPRINTF(fmt, ...) do {} while(0)

-#define BADF(fmt, ...) \

-do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0)

-#endif

+#include "trace.h"

static const uint8_t pl061_id[12] =

{ 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };

@@ -XXX,XX +XXX,XX @@ static void pl061_update(PL061State *s)

uint8_t out;

int i;

- DPRINTF("dir = %d, data = %d\n", s->dir, s->data);

+ trace_pl061_update(DEVICE(s)->canonical_path, s->dir, s->data);

/* Outputs float high. */

/* FIXME: This is board dependent. */

@@ -XXX,XX +XXX,XX @@ static void pl061_update(PL061State *s)

for (i = 0; i < N_GPIOS; i++) {

mask = 1 << i;

if (changed & mask) {

- DPRINTF("Set output %d = %d\n", i, (out & mask) != 0);

- qemu_set_irq(s->out[i], (out & mask) != 0);

+ int level = (out & mask) != 0;

+ trace_pl061_set_output(DEVICE(s)->canonical_path, i, level);

+ qemu_set_irq(s->out[i], level);

}

}

}

@@ -XXX,XX +XXX,XX @@ static void pl061_update(PL061State *s)

for (i = 0; i < N_GPIOS; i++) {

mask = 1 << i;

if (changed & mask) {

- DPRINTF("Changed input %d = %d\n", i, (s->data & mask) != 0);

+ trace_pl061_input_change(DEVICE(s)->canonical_path, i,

+ (s->data & mask) != 0);

if (!(s->isense & mask)) {

/* Edge interrupt */

@@ -XXX,XX +XXX,XX @@ static void pl061_update(PL061State *s)

/* Level interrupt */

s->istate |= ~(s->data ^ s->iev) & s->isense;

- DPRINTF("istate = %02X\n", s->istate);

+ trace_pl061_update_istate(DEVICE(s)->canonical_path,

+ s->istate, s->im, (s->istate & s->im) != 0);

qemu_set_irq(s->irq, (s->istate & s->im) != 0);

}

diff --git a/hw/gpio/trace-events b/hw/gpio/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/hw/gpio/trace-events

+++ b/hw/gpio/trace-events

@@ -XXX,XX +XXX,XX @@ nrf51_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x

nrf51_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64

nrf51_gpio_update_output_irq(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64

+# pl061.c

+pl061_update(const char *id, uint32_t dir, uint32_t data) "%s GPIODIR 0x%x GPIODATA 0x%x"

+pl061_set_output(const char *id, int gpio, int level) "%s setting output %d to %d"

+pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to %d"

+pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) "%s GPIORIS 0x%x GPIOIE 0x%x interrupt level %d"

+

# sifive_gpio.c

sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64

sifive_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64

--

2.20.1

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>