Patches for rc1: nothing major, just some minor bugfixes and

code cleanups.

-- PMM

The following changes since commit f7e1914adad8885a5d4c70239ab90d901ed97e9f:

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201109' into staging (2020-11-10 09:24:56 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201110

for you to fetch changes up to b6c56c8a9a4064ea783f352f43c5df6231a110fa:

target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check (2020-11-10 11:03:48 +0000)

target-arm queue:

* hw/arm/Kconfig: ARM_V7M depends on PTIMER

* Minor coding style fixes

* docs: add some notes on the sbsa-ref machine

* hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals

* target/arm: Fix neon VTBL/VTBX for len > 1

* hw/arm/armsse: Correct expansion MPC interrupt lines

* hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ

* hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()

* hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input

* hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary

* hw/arm/nseries: Check return value from load_image_targphys()

* tests/qtest/npcm7xx_rng-test: count runs properly

* target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check

Alex Bennée (1):

docs: add some notes on the sbsa-ref machine

AlexChen (1):

ssi: Fix bad printf format specifiers

Andrew Jones (1):

hw/arm/Kconfig: ARM_V7M depends on PTIMER

Havard Skinnemoen (1):

tests/qtest/npcm7xx_rng-test: count runs properly

hw/arm/nseries: Check return value from load_image_targphys()

target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check

Philippe Mathieu-Daudé (6):

hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals

hw/arm/armsse: Correct expansion MPC interrupt lines

hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ

hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()

hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input

hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary

Richard Henderson (1):

target/arm: Fix neon VTBL/VTBX for len > 1

Xinhao Zhang (3):

target/arm: add spaces around operator

target/arm: Don't use '#' flag of printf format

target/arm: add space before the open parenthesis '('

From: Richard Henderson <richard.henderson@linaro.org>

The helper function did not get updated when we reorganized

the vector register file for SVE. Since then, the neon dregs

are non-sequential and cannot be simply indexed.

At the same time, make the helper function operate on 64-bit

quantities so that we do not have to call it twice.

Fixes: c39c2b9043e

Reported-by: Ard Biesheuvel <ardb@kernel.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

[PMM: use aa32_vfp_dreg() rather than opencoding]

Message-id: 20201105171126.88014-1-richard.henderson@linaro.org

target/arm/helper.h | 2 +-

target/arm/op_helper.c | 23 +++++++++--------

target/arm/translate-neon.c.inc | 44 +++++++++++----------------------

3 files changed, 29 insertions(+), 40 deletions(-)

diff --git a/target/arm/helper.h b/target/arm/helper.h

--- a/target/arm/helper.h

+++ b/target/arm/helper.h

@@ -XXX,XX +XXX,XX @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)

DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)

DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32)

DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32)

-DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32)

+DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i64, env, i32, i64, i64)

DEF_HELPER_3(shl_cc, i32, env, i32, i32)

DEF_HELPER_3(shr_cc, i32, env, i32, i32)

diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c

--- a/target/arm/op_helper.c

+++ b/target/arm/op_helper.c

@@ -XXX,XX +XXX,XX @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,

cpu_loop_exit_restore(cs, ra);

-uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn,

- uint32_t maxindex)

+uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc,

+ uint64_t ireg, uint64_t def)

- uint32_t val, shift;

- uint64_t *table = vn;

+ uint64_t tmp, val = 0;

+ uint32_t maxindex = ((desc & 3) + 1) * 8;

+ uint32_t base_reg = desc >> 2;

+ uint32_t shift, index, reg;

- val = 0;

- for (shift = 0; shift < 32; shift += 8) {

- uint32_t index = (ireg >> shift) & 0xff;

+ for (shift = 0; shift < 64; shift += 8) {

+ index = (ireg >> shift) & 0xff;

if (index < maxindex) {

- uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;

- val |= tmp << shift;

+ reg = base_reg + (index >> 3);

+ tmp = *aa32_vfp_dreg(env, reg);

+ tmp = ((tmp >> ((index & 7) << 3)) & 0xff) << shift;

} else {

- val |= def & (0xff << shift);

+ tmp = def & (0xffull << shift);

}

+ val |= tmp;

}

return val;

}

diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/translate-neon.c.inc

+++ b/target/arm/translate-neon.c.inc

@@ -XXX,XX +XXX,XX @@ static bool trans_VEXT(DisasContext *s, arg_VEXT *a)

static bool trans_VTBL(DisasContext *s, arg_VTBL *a)

{

- int n;

- TCGv_i32 tmp, tmp2, tmp3, tmp4;

- TCGv_ptr ptr1;

+ TCGv_i64 val, def;

+ TCGv_i32 desc;

if (!arm_dc_feature(s, ARM_FEATURE_NEON)) {

return false;

@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)

return true;

}

- n = a->len + 1;

- if ((a->vn + n) > 32) {

+ if ((a->vn + a->len + 1) > 32) {

/*

* This is UNPREDICTABLE; we choose to UNDEF to avoid the

* helper function running off the end of the register file.

*/

return false;

}

- n <<= 3;

- tmp = tcg_temp_new_i32();

- if (a->op) {

- read_neon_element32(tmp, a->vd, 0, MO_32);

- } else {

- tcg_gen_movi_i32(tmp, 0);

- }

- tmp2 = tcg_temp_new_i32();

- read_neon_element32(tmp2, a->vm, 0, MO_32);

- ptr1 = vfp_reg_ptr(true, a->vn);

- tmp4 = tcg_const_i32(n);

- gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp4);

+ desc = tcg_const_i32((a->vn << 2) | a->len);

+ def = tcg_temp_new_i64();

if (a->op) {

- read_neon_element32(tmp, a->vd, 1, MO_32);

+ read_neon_element64(def, a->vd, 0, MO_64);

} else {

- tcg_gen_movi_i32(tmp, 0);

+ tcg_gen_movi_i64(def, 0);

}

- tmp3 = tcg_temp_new_i32();

- read_neon_element32(tmp3, a->vm, 1, MO_32);

- gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp4);

- tcg_temp_free_i32(tmp);

- tcg_temp_free_i32(tmp4);

- tcg_temp_free_ptr(ptr1);

+ val = tcg_temp_new_i64();

+ read_neon_element64(val, a->vm, 0, MO_64);

- write_neon_element32(tmp2, a->vd, 0, MO_32);

- write_neon_element32(tmp3, a->vd, 1, MO_32);

- tcg_temp_free_i32(tmp2);

- tcg_temp_free_i32(tmp3);

+ gen_helper_neon_tbl(val, cpu_env, desc, val, def);

+ write_neon_element64(val, a->vd, 0, MO_64);

+ tcg_temp_free_i64(def);

+ tcg_temp_free_i64(val);

+ tcg_temp_free_i32(desc);

return true;

}

The system configuration controller (SYSCFG) doesn't have

any output IRQ (and the INTC input #71 belongs to the UART6).

Remove the invalid code.

Fixes: db635521a02 ("stm32f205: Add the stm32f205 SoC")

Message-id: 20201107193403.436146-3-f4bug@amsat.org

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

include/hw/misc/stm32f2xx_syscfg.h | 2 --

hw/arm/stm32f205_soc.c | 1 -

hw/misc/stm32f2xx_syscfg.c | 2 --

3 files changed, 5 deletions(-)

diff --git a/include/hw/misc/stm32f2xx_syscfg.h b/include/hw/misc/stm32f2xx_syscfg.h

--- a/include/hw/misc/stm32f2xx_syscfg.h

+++ b/include/hw/misc/stm32f2xx_syscfg.h

@@ -XXX,XX +XXX,XX @@ struct STM32F2XXSyscfgState {

uint32_t syscfg_exticr3;

uint32_t syscfg_exticr4;

uint32_t syscfg_cmpcr;

-

- qemu_irq irq;

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

omap2420_mpu_init() introduced in commit 827df9f3c5f ("Add basic

OMAP2 chip support") takes care of creating the 3 UARTs.

Then commit 58a26b477e9 ("Emulate a serial bluetooth HCI with H4+

extensions and attach to n8x0's UART") added n8x0_uart_setup()

which create the UART and connects it to an IRQ output,

overwritting the existing peripheral and its IRQ connection.

This is incorrect.

Fortunately we don't need to fix this, because commit 6da68df7f9b

("hw/arm/nseries: Replace the bluetooth chardev with a "null"

chardev") removed the use of this peripheral. We can simply

remove the code.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20201107193403.436146-4-f4bug@amsat.org

hw/arm/nseries.c | 11 -----------

1 file changed, 11 deletions(-)

diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c

--- a/hw/arm/nseries.c

+++ b/hw/arm/nseries.c

@@ -XXX,XX +XXX,XX @@ static void n8x0_cbus_setup(struct n800_s *s)

cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1));

}

-static void n8x0_uart_setup(struct n800_s *s)

- Chardev *radio = qemu_chr_new("bt-dummy-uart", "null", NULL);

- /*

- * Note: We used to connect N8X0_BT_RESET_GPIO and N8X0_BT_WKUP_GPIO

- * here, but this code has been removed with the bluetooth backend.

- */

- omap_uart_attach(s->mpu->uart[BT_UART], radio);

static void n8x0_usb_setup(struct n800_s *s)

{

SysBusDevice *dev;

@@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine,

n8x0_spi_setup(s);

n8x0_dss_setup(s);

n8x0_cbus_setup(s);

- n8x0_uart_setup(s);

if (machine_usb(machine)) {

n8x0_usb_setup(s);

}

From: Xinhao Zhang <zhangxinhao1@huawei.com>

Fix code style. Operator needs spaces both sides.

Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>

Signed-off-by: Kai Deng <dengkai1@huawei.com>

Message-id: 20201103114529.638233-1-zhangxinhao1@huawei.com

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

target/arm/arch_dump.c | 8 ++++----

target/arm/arm-semi.c | 8 ++++----

target/arm/helper.c | 2 +-

3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/arch_dump.c

+++ b/target/arm/arch_dump.c

@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,

for (i = 0; i < 32; ++i) {

uint64_t *q = aa64_vfp_qreg(env, i);

- note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);

- note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);

+ note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]);

+ note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]);

}

if (s->dump_info.d_endian == ELFDATA2MSB) {

@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,

*/

for (i = 0; i < 32; ++i) {

uint64_t tmp = note.vfp.vregs[2*i];

- note.vfp.vregs[2*i] = note.vfp.vregs[2*i+1];

- note.vfp.vregs[2*i+1] = tmp;

+ note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1];

+ note.vfp.vregs[2 * i + 1] = tmp;

}

}

diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/arm-semi.c

+++ b/target/arm/arm-semi.c

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

if (use_gdb_syscalls()) {

arm_semi_open_guestfd = guestfd;

ret = arm_gdb_syscall(cpu, arm_semi_open_cb, "open,%s,%x,1a4", arg0,

- (int)arg2+1, gdb_open_modeflags[arg1]);

+ (int)arg2 + 1, gdb_open_modeflags[arg1]);

} else {

ret = set_swi_errno(env, open(s, open_modeflags[arg1], 0644));

if (ret == (uint32_t)-1) {

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(1);

if (use_gdb_syscalls()) {

ret = arm_gdb_syscall(cpu, arm_semi_cb, "unlink,%s",

- arg0, (int)arg1+1);

+ arg0, (int)arg1 + 1);

} else {

s = lock_user_string(arg0);

if (!s) {

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(3);

if (use_gdb_syscalls()) {

return arm_gdb_syscall(cpu, arm_semi_cb, "rename,%s,%s",

- arg0, (int)arg1+1, arg2, (int)arg3+1);

+ arg0, (int)arg1 + 1, arg2, (int)arg3 + 1);

} else {

char *s2;

s = lock_user_string(arg0);

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(1);

if (use_gdb_syscalls()) {

return arm_gdb_syscall(cpu, arm_semi_cb, "system,%s",

- arg0, (int)arg1+1);

+ arg0, (int)arg1 + 1);

} else {

s = lock_user_string(arg0);

if (!s) {

@@ -XXX,XX +XXX,XX @@ uint32_t HELPER(usad8)(uint32_t a, uint32_t b)

uint32_t sum;

sum = do_usad(a, b);

sum += do_usad(a >> 8, b >> 8);

- sum += do_usad(a >> 16, b >>16);

+ sum += do_usad(a >> 16, b >> 16);

sum += do_usad(a >> 24, b >> 24);

return sum;

}

Checks for UNDEF cases should go before the "is VFP enabled?" access

check, except in special cases. Move a stray UNDEF check in the VTBL

trans function up above the access check.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20201109145324.2859-1-peter.maydell@linaro.org

target/arm/translate-neon.c.inc | 8 ++++----

1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc

--- a/target/arm/translate-neon.c.inc

+++ b/target/arm/translate-neon.c.inc

@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)

return false;

}

- if (!vfp_access_check(s)) {

- return true;

- }

-

if ((a->vn + a->len + 1) > 32) {

/*

* This is UNPREDICTABLE; we choose to UNDEF to avoid the

@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)

return false;

}

+ if (!vfp_access_check(s)) {

+ return true;

+ }

+

desc = tcg_const_i32((a->vn << 2) | a->len);

def = tcg_temp_new_i64();

if (a->op) {