Patches for rc1: nothing major, just some minor bugfixes and

code cleanups.

The following changes since commit f7e1914adad8885a5d4c70239ab90d901ed97e9f:

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201109' into staging (2020-11-10 09:24:56 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201110

for you to fetch changes up to b6c56c8a9a4064ea783f352f43c5df6231a110fa:

target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check (2020-11-10 11:03:48 +0000)

* hw/arm/Kconfig: ARM_V7M depends on PTIMER

* Minor coding style fixes

* docs: add some notes on the sbsa-ref machine

* hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals

* target/arm: Fix neon VTBL/VTBX for len > 1

* hw/arm/armsse: Correct expansion MPC interrupt lines

* hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ

* hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()

* hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input

* hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary

* hw/arm/nseries: Check return value from load_image_targphys()

* tests/qtest/npcm7xx_rng-test: count runs properly

* target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check

Alex Bennée (1):

docs: add some notes on the sbsa-ref machine

AlexChen (1):

ssi: Fix bad printf format specifiers

Andrew Jones (1):

hw/arm/Kconfig: ARM_V7M depends on PTIMER

Havard Skinnemoen (1):

tests/qtest/npcm7xx_rng-test: count runs properly

Peter Maydell (2):

hw/arm/nseries: Check return value from load_image_targphys()

target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check

Philippe Mathieu-Daudé (6):

hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals

hw/arm/armsse: Correct expansion MPC interrupt lines

hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ

hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()

hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input

hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary

From: Xinhao Zhang <zhangxinhao1@huawei.com>

Fix code style. Operator needs spaces both sides.

Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>

Signed-off-by: Kai Deng <dengkai1@huawei.com>

Message-id: 20201103114529.638233-1-zhangxinhao1@huawei.com

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

target/arm/arch_dump.c | 8 ++++----

target/arm/arm-semi.c | 8 ++++----

target/arm/helper.c | 2 +-

3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c

--- a/target/arm/arch_dump.c

+++ b/target/arm/arch_dump.c

@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,

for (i = 0; i < 32; ++i) {

uint64_t *q = aa64_vfp_qreg(env, i);

- note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);

- note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);

+ note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]);

+ note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]);

}

if (s->dump_info.d_endian == ELFDATA2MSB) {

@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,

*/

for (i = 0; i < 32; ++i) {

uint64_t tmp = note.vfp.vregs[2*i];

- note.vfp.vregs[2*i] = note.vfp.vregs[2*i+1];

- note.vfp.vregs[2*i+1] = tmp;

+ note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1];

+ note.vfp.vregs[2 * i + 1] = tmp;

}

}

diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/arm-semi.c

+++ b/target/arm/arm-semi.c

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

if (use_gdb_syscalls()) {

arm_semi_open_guestfd = guestfd;

ret = arm_gdb_syscall(cpu, arm_semi_open_cb, "open,%s,%x,1a4", arg0,

- (int)arg2+1, gdb_open_modeflags[arg1]);

+ (int)arg2 + 1, gdb_open_modeflags[arg1]);

} else {

ret = set_swi_errno(env, open(s, open_modeflags[arg1], 0644));

if (ret == (uint32_t)-1) {

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(1);

if (use_gdb_syscalls()) {

ret = arm_gdb_syscall(cpu, arm_semi_cb, "unlink,%s",

- arg0, (int)arg1+1);

+ arg0, (int)arg1 + 1);

} else {

s = lock_user_string(arg0);

if (!s) {

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(3);

if (use_gdb_syscalls()) {

return arm_gdb_syscall(cpu, arm_semi_cb, "rename,%s,%s",

- arg0, (int)arg1+1, arg2, (int)arg3+1);

+ arg0, (int)arg1 + 1, arg2, (int)arg3 + 1);

} else {

char *s2;

s = lock_user_string(arg0);

@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)

GET_ARG(1);

if (use_gdb_syscalls()) {

return arm_gdb_syscall(cpu, arm_semi_cb, "system,%s",

- arg0, (int)arg1+1);

+ arg0, (int)arg1 + 1);

} else {

s = lock_user_string(arg0);

if (!s) {

@@ -XXX,XX +XXX,XX @@ uint32_t HELPER(usad8)(uint32_t a, uint32_t b)

uint32_t sum;

sum = do_usad(a, b);

sum += do_usad(a >> 8, b >> 8);

- sum += do_usad(a >> 16, b >>16);

+ sum += do_usad(a >> 16, b >> 16);

sum += do_usad(a >> 24, b >> 24);

return sum;

}

From: Andrew Jones <drjones@redhat.com>

commit 32bd322a0134 ("hw/timer/armv7m_systick: Rewrite to use ptimers")

changed armv7m_systick to build on ptimers. Make sure we have ptimers

in the build when building armv7m_systick.

Signed-off-by: Andrew Jones <drjones@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20201104103343.30392-1-drjones@redhat.com

hw/arm/Kconfig | 1 +

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig

--- a/hw/arm/Kconfig

+++ b/hw/arm/Kconfig

@@ -XXX,XX +XXX,XX @@ config ZYNQ

config ARM_V7M

bool

+ select PTIMER

config ALLWINNER_A10

bool

From: Havard Skinnemoen <hskinnemoen@google.com>

The number of runs is equal to the number of 0-1 and 1-0 transitions,

plus one. Currently, it's counting the number of times these transitions

do _not_ happen, plus one.

Source:

https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-22r1a.pdf

section 2.3.4 point (3).

Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>

Message-id: 20201103011457.2959989-2-hskinnemoen@google.com

tests/qtest/npcm7xx_rng-test.c | 2 +-

diff --git a/tests/qtest/npcm7xx_rng-test.c b/tests/qtest/npcm7xx_rng-test.c

--- a/tests/qtest/npcm7xx_rng-test.c

+++ b/tests/qtest/npcm7xx_rng-test.c

@@ -XXX,XX +XXX,XX @@ static double calc_runs_p(const unsigned long *buf, unsigned int nr_bits)

pi = (double)nr_ones / nr_bits;

for (k = 0; k < nr_bits - 1; k++) {

- vn_obs += !(test_bit(k, buf) ^ test_bit(k + 1, buf));

+ vn_obs += (test_bit(k, buf) ^ test_bit(k + 1, buf));

}

vn_obs += 1;

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

We don't need to fill the full pic[] array if we only use

few of the interrupt lines. Directly call qdev_get_gpio_in()

when necessary.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20201107193403.436146-6-f4bug@amsat.org

hw/arm/musicpal.c | 25 +++++++++++++------------

1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c

--- a/hw/arm/musicpal.c

+++ b/hw/arm/musicpal.c

@@ -XXX,XX +XXX,XX @@ static struct arm_boot_info musicpal_binfo = {

static void musicpal_init(MachineState *machine)

{

ARMCPU *cpu;

- qemu_irq pic[32];

DeviceState *dev;

+ DeviceState *pic;

DeviceState *uart_orgate;

DeviceState *i2c_dev;

DeviceState *lcd_dev;

@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)

&error_fatal);

memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);

- dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,

+ pic = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,

qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));

- for (i = 0; i < 32; i++) {

- pic[i] = qdev_get_gpio_in(dev, i);

- }

- sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, pic[MP_TIMER1_IRQ],

- pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],

- pic[MP_TIMER4_IRQ], NULL);

+ sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE,

+ qdev_get_gpio_in(pic, MP_TIMER1_IRQ),

+ qdev_get_gpio_in(pic, MP_TIMER2_IRQ),

+ qdev_get_gpio_in(pic, MP_TIMER3_IRQ),

+ qdev_get_gpio_in(pic, MP_TIMER4_IRQ), NULL);

/* Logically OR both UART IRQs together */

uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));

object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);

qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);

- qdev_connect_gpio_out(DEVICE(uart_orgate), 0, pic[MP_UART_SHARED_IRQ]);

+ qdev_connect_gpio_out(DEVICE(uart_orgate), 0,

+ qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ));

serial_mm_init(address_space_mem, MP_UART1_BASE, 2,

qdev_get_gpio_in(uart_orgate, 0),

@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)

OBJECT(get_system_memory()), &error_fatal);

sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);

sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE);

- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]);

+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,

+ qdev_get_gpio_in(pic, MP_ETH_IRQ));

sysbus_create_simple("mv88w8618_wlan", MP_WLAN_BASE, NULL);

sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL);

dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE,

- pic[MP_GPIO_IRQ]);

+ qdev_get_gpio_in(pic, MP_GPIO_IRQ));

i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL);

i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c");

@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)

NULL);

sysbus_realize_and_unref(s, &error_fatal);

sysbus_mmio_map(s, 0, MP_AUDIO_BASE);

- sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);

+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(pic, MP_AUDIO_IRQ));

musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE;

arm_load_kernel(cpu, machine, &musicpal_binfo);

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

The MusicPal board code connects both of the IRQ outputs of the UART

to the same INTC qemu_irq. Connecting two qemu_irqs outputs directly

to the same input is not valid as it produces subtly wrong behaviour

(for instance if both the IRQ lines are high, and then one goes

low, the INTC input will see this as a high-to-low transition

even though the second IRQ line should still be holding it high).

This kind of wiring needs an explicitly created OR gate; add one.

Inspired-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20201107193403.436146-5-f4bug@amsat.org

hw/arm/musicpal.c | 17 +++++++++++++----

hw/arm/Kconfig | 1 +

2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c

--- a/hw/arm/musicpal.c

+++ b/hw/arm/musicpal.c

@@ -XXX,XX +XXX,XX @@

#include "ui/console.h"

#include "hw/i2c/i2c.h"

#include "hw/irq.h"

+#include "hw/or-irq.h"

#include "hw/audio/wm8750.h"

#include "sysemu/block-backend.h"

#include "sysemu/runstate.h"

@@ -XXX,XX +XXX,XX @@

#define MP_TIMER4_IRQ 7

#define MP_EHCI_IRQ 8

#define MP_ETH_IRQ 9

-#define MP_UART1_IRQ 11

-#define MP_UART2_IRQ 11

+#define MP_UART_SHARED_IRQ 11

#define MP_GPIO_IRQ 12

#define MP_RTC_IRQ 28

#define MP_AUDIO_IRQ 30

@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)

ARMCPU *cpu;

qemu_irq pic[32];

DeviceState *dev;

+ DeviceState *uart_orgate;

DeviceState *i2c_dev;

DeviceState *lcd_dev;

DeviceState *key_dev;

@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)

pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],

pic[MP_TIMER4_IRQ], NULL);

- serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],

+ /* Logically OR both UART IRQs together */

+ uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));

+ object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);

+ qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);

+ qdev_connect_gpio_out(DEVICE(uart_orgate), 0, pic[MP_UART_SHARED_IRQ]);

+ serial_mm_init(address_space_mem, MP_UART1_BASE, 2,

+ qdev_get_gpio_in(uart_orgate, 0),

1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN);

- serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],

+ serial_mm_init(address_space_mem, MP_UART2_BASE, 2,

+ qdev_get_gpio_in(uart_orgate, 1),

1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN);

/* Register flash */

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/Kconfig

+++ b/hw/arm/Kconfig

@@ -XXX,XX +XXX,XX @@ config MUSCA

config MUSICPAL

bool

+ select OR_IRQ

select BITBANG_I2C

select MARVELL_88W8618

select PTIMER

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

We can use one MPC per SRAM bank, but we currently only wire the

IRQ from the first expansion MPC to the IRQ splitter. Fix that.

Fixes: bb75e16d5e6 ("hw/arm/iotkit: Wire up MPC interrupt lines")

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20201107193403.436146-2-f4bug@amsat.org

hw/arm/armsse.c | 3 ++-

1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c

--- a/hw/arm/armsse.c

+++ b/hw/arm/armsse.c

@@ -XXX,XX +XXX,XX @@ static void armsse_realize(DeviceState *dev, Error **errp)

qdev_get_gpio_in(dev_splitter, 0));

qdev_connect_gpio_out(dev_splitter, 0,

qdev_get_gpio_in_named(dev_secctl,

- "mpc_status", 0));

+ "mpc_status",

+ i - IOTS_NUM_EXP_MPC));

}

qdev_connect_gpio_out(dev_splitter, 1,

From: Xinhao Zhang <zhangxinhao1@huawei.com>

Fix code style. Space required before the open parenthesis '('.

Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>

Signed-off-by: Kai Deng <dengkai1@huawei.com>

Message-id: 20201103114529.638233-3-zhangxinhao1@huawei.com

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

target/arm/translate.c | 2 +-

1 file changed, 1 insertion(+), 1 deletion(-)

@@ -XXX,XX +XXX,XX @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)

- Hardware watchpoints.

Hardware breakpoints have already been handled and skip this code.

*/

- switch(dc->base.is_jmp) {

+ switch (dc->base.is_jmp) {

case DISAS_NEXT:

case DISAS_TOO_MANY:

gen_goto_tb(dc, 1, dc->base.pc_next);

The nseries machines have a codepath that allows them to load a

secondary bootloader. This code wasn't checking that the

load_image_targphys() succeeded. Check the return value and report

the error to the user.

While we're in the vicinity, fix the comment style of the

comment documenting what this image load is doing.

Fixes: Coverity CID 1192904

Message-id: 20201103114918.11807-1-peter.maydell@linaro.org

hw/arm/nseries.c | 15 +++++++++++----

1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c

--- a/hw/arm/nseries.c

+++ b/hw/arm/nseries.c

@@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine,

/* No, wait, better start at the ROM. */

s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;

- /* This is intended for loading the `secondary.bin' program from

+ /*

+ * This is intended for loading the `secondary.bin' program from

* Nokia images (the NOLO bootloader). The entry point seems

* to be at OMAP2_Q2_BASE + 0x400000.

*

@@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine,

* for them the entry point needs to be set to OMAP2_SRAM_BASE.

*