From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Connect the support for the Versal Accelerator RAMs (XRAMs).

Reviewed-by: Luc Michel <luc@lmichel.fr>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Message-id: 20210308224637.2949533-3-edgar.iglesias@gmail.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

docs/system/arm/xlnx-versal-virt.rst | 1 +

include/hw/arm/xlnx-versal.h | 13 ++++++++++

hw/arm/xlnx-versal.c | 36 ++++++++++++++++++++++++++++

3 files changed, 50 insertions(+)

diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-versal-virt.rst

index XXXXXXX..XXXXXXX 100644

--- a/docs/system/arm/xlnx-versal-virt.rst

+++ b/docs/system/arm/xlnx-versal-virt.rst

@@ -XXX,XX +XXX,XX @@ Implemented devices:

- 8 ADMA (Xilinx zDMA) channels

- 2 SD Controllers

- OCM (256KB of On Chip Memory)

+- XRAM (4MB of on chip Accelerator RAM)

- DDR memory

QEMU does not yet model any other devices, including the PL and the AI Engine.

diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/arm/xlnx-versal.h

+++ b/include/hw/arm/xlnx-versal.h

@@ -XXX,XX +XXX,XX @@

#include "hw/sysbus.h"

#include "hw/arm/boot.h"

+#include "hw/or-irq.h"

#include "hw/sd/sdhci.h"

#include "hw/intc/arm_gicv3.h"

#include "hw/char/pl011.h"

@@ -XXX,XX +XXX,XX @@

#include "hw/rtc/xlnx-zynqmp-rtc.h"

#include "qom/object.h"

#include "hw/usb/xlnx-usb-subsystem.h"

+#include "hw/misc/xlnx-versal-xramc.h"

#define TYPE_XLNX_VERSAL "xlnx-versal"

OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)

@@ -XXX,XX +XXX,XX @@ OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)

#define XLNX_VERSAL_NR_GEMS 2

#define XLNX_VERSAL_NR_ADMAS 8

#define XLNX_VERSAL_NR_SDS 2

+#define XLNX_VERSAL_NR_XRAM 4

#define XLNX_VERSAL_NR_IRQS 192

struct Versal {

@@ -XXX,XX +XXX,XX @@ struct Versal {

XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS];

VersalUsb2 usb;

} iou;

+

+ struct {

+ qemu_or_irq irq_orgate;

+ XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM];

+ } xram;

} lpd;

/* The Platform Management Controller subsystem. */

@@ -XXX,XX +XXX,XX @@ struct Versal {

#define VERSAL_GEM1_IRQ_0 58

#define VERSAL_GEM1_WAKE_IRQ_0 59

#define VERSAL_ADMA_IRQ_0 60

+#define VERSAL_XRAM_IRQ_0 79

#define VERSAL_RTC_APB_ERR_IRQ 121

#define VERSAL_SD0_IRQ_0 126

#define VERSAL_RTC_ALARM_IRQ 142

@@ -XXX,XX +XXX,XX @@ struct Versal {

#define MM_OCM 0xfffc0000U

#define MM_OCM_SIZE 0x40000

+#define MM_XRAM 0xfe800000

+#define MM_XRAMC 0xff8e0000

+#define MM_XRAMC_SIZE 0x10000

+

#define MM_USB2_CTRL_REGS 0xFF9D0000

#define MM_USB2_CTRL_REGS_SIZE 0x10000

diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/xlnx-versal.c

+++ b/hw/arm/xlnx-versal.c

@@ -XXX,XX +XXX,XX @@

*/

#include "qemu/osdep.h"

+#include "qemu/units.h"

#include "qapi/error.h"

#include "qemu/log.h"

#include "qemu/module.h"

@@ -XXX,XX +XXX,XX @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)

sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]);

}

+static void versal_create_xrams(Versal *s, qemu_irq *pic)

+{

+ int nr_xrams = ARRAY_SIZE(s->lpd.xram.ctrl);

+ DeviceState *orgate;

+ int i;

+

+ /* XRAM IRQs get ORed into a single line. */

+ object_initialize_child(OBJECT(s), "xram-irq-orgate",

+ &s->lpd.xram.irq_orgate, TYPE_OR_IRQ);

+ orgate = DEVICE(&s->lpd.xram.irq_orgate);

+ object_property_set_int(OBJECT(orgate),

+ "num-lines", nr_xrams, &error_fatal);

+ qdev_realize(orgate, NULL, &error_fatal);

+ qdev_connect_gpio_out(orgate, 0, pic[VERSAL_XRAM_IRQ_0]);

+

+ for (i = 0; i < ARRAY_SIZE(s->lpd.xram.ctrl); i++) {

+ SysBusDevice *sbd;

+ MemoryRegion *mr;

+

+ object_initialize_child(OBJECT(s), "xram[*]", &s->lpd.xram.ctrl[i],

+ TYPE_XLNX_XRAM_CTRL);

+ sbd = SYS_BUS_DEVICE(&s->lpd.xram.ctrl[i]);

+ sysbus_realize(sbd, &error_fatal);

+

+ mr = sysbus_mmio_get_region(sbd, 0);

+ memory_region_add_subregion(&s->mr_ps,

+ MM_XRAMC + i * MM_XRAMC_SIZE, mr);

+ mr = sysbus_mmio_get_region(sbd, 1);

+ memory_region_add_subregion(&s->mr_ps, MM_XRAM + i * MiB, mr);

+

+ sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(orgate, i));

+ }

+}

+

/* This takes the board allocated linear DDR memory and creates aliases

* for each split DDR range/aperture on the Versal address map.

*/

@@ -XXX,XX +XXX,XX @@ static void versal_realize(DeviceState *dev, Error **errp)

versal_create_admas(s, pic);

versal_create_sds(s, pic);

versal_create_rtc(s, pic);

+ versal_create_xrams(s, pic);

versal_map_ddr(s);

versal_unimp(s);

--

2.20.1

From: Eric Auger <eric.auger@redhat.com>

With -Werror=maybe-uninitialized configuration we get

../hw/i386/intel_iommu.c: In function ‘vtd_context_device_invalidate’:

../hw/i386/intel_iommu.c:1888:10: error: ‘mask’ may be used

uninitialized in this function [-Werror=maybe-uninitialized]

1888 | mask = ~mask;

| ~~~~~^~~~~~~

Add a g_assert_not_reached() to avoid the error.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Peter Xu <peterx@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20210309102742.30442-2-eric.auger@redhat.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/i386/intel_iommu.c | 2 ++

1 file changed, 2 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/i386/intel_iommu.c

+++ b/hw/i386/intel_iommu.c

@@ -XXX,XX +XXX,XX @@ static void vtd_context_device_invalidate(IntelIOMMUState *s,

case 3:

mask = 7; /* Mask bit 2:0 in the SID field */

break;

+ default:

+ g_assert_not_reached();

}

mask = ~mask;

--

2.20.1

From: Eric Auger <eric.auger@redhat.com>

Currently get_naturally_aligned_size() is used by the intel iommu

to compute the maximum invalidation range based on @size which is

a power of 2 while being aligned with the @start address and less

than the maximum range defined by @gaw.

This helper is also useful for other iommu devices (virtio-iommu,

SMMUv3) to make sure IOMMU UNMAP notifiers only are called with

power of 2 range sizes.

Let's move this latter into dma-helpers.c and rename it into

dma_aligned_pow2_mask(). Also rewrite the helper so that it

accomodates UINT64_MAX values for the size mask and max mask.

It now returns a mask instead of a size. Change the caller.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Peter Xu <peterx@redhat.com>

Message-id: 20210309102742.30442-3-eric.auger@redhat.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

include/sysemu/dma.h | 12 ++++++++++++

hw/i386/intel_iommu.c | 30 +++++++-----------------------

softmmu/dma-helpers.c | 26 ++++++++++++++++++++++++++

3 files changed, 45 insertions(+), 23 deletions(-)

diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h

index XXXXXXX..XXXXXXX 100644

--- a/include/sysemu/dma.h

+++ b/include/sysemu/dma.h

@@ -XXX,XX +XXX,XX @@ uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);

void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,

QEMUSGList *sg, enum BlockAcctType type);

+/**

+ * dma_aligned_pow2_mask: Return the address bit mask of the largest

+ * power of 2 size less or equal than @end - @start + 1, aligned with @start,

+ * and bounded by 1 << @max_addr_bits bits.

+ *

+ * @start: range start address

+ * @end: range end address (greater than @start)

+ * @max_addr_bits: max address bits (<= 64)

+ */

+uint64_t dma_aligned_pow2_mask(uint64_t start, uint64_t end,

+ int max_addr_bits);

+

#endif

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/i386/intel_iommu.c

+++ b/hw/i386/intel_iommu.c

@@ -XXX,XX +XXX,XX @@

#include "hw/i386/x86-iommu.h"

#include "hw/pci-host/q35.h"

#include "sysemu/kvm.h"

+#include "sysemu/dma.h"

#include "sysemu/sysemu.h"

#include "hw/i386/apic_internal.h"

#include "kvm/kvm_i386.h"

@@ -XXX,XX +XXX,XX @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)

return vtd_dev_as;

}

-static uint64_t get_naturally_aligned_size(uint64_t start,

- uint64_t size, int gaw)

-{

- uint64_t max_mask = 1ULL << gaw;

- uint64_t alignment = start ? start & -start : max_mask;

-

- alignment = MIN(alignment, max_mask);

- size = MIN(size, max_mask);

-

- if (alignment <= size) {

- /* Increase the alignment of start */

- return alignment;

- } else {

- /* Find the largest page mask from size */

- return 1ULL << (63 - clz64(size));

- }

-}

-

/* Unmap the whole range in the notifier's scope. */

static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n)

{

@@ -XXX,XX +XXX,XX @@ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n)

while (remain >= VTD_PAGE_SIZE) {

IOMMUTLBEvent event;

- uint64_t mask = get_naturally_aligned_size(start, remain, s->aw_bits);

+ uint64_t mask = dma_aligned_pow2_mask(start, end, s->aw_bits);

+ uint64_t size = mask + 1;

- assert(mask);

+ assert(size);

event.type = IOMMU_NOTIFIER_UNMAP;

event.entry.iova = start;

- event.entry.addr_mask = mask - 1;

+ event.entry.addr_mask = mask;

event.entry.target_as = &address_space_memory;

event.entry.perm = IOMMU_NONE;

/* This field is meaningless for unmap */

@@ -XXX,XX +XXX,XX @@ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n)

memory_region_notify_iommu_one(n, &event);

- start += mask;

- remain -= mask;

+ start += size;

+ remain -= size;

}

assert(!remain);

diff --git a/softmmu/dma-helpers.c b/softmmu/dma-helpers.c

index XXXXXXX..XXXXXXX 100644

--- a/softmmu/dma-helpers.c

+++ b/softmmu/dma-helpers.c

@@ -XXX,XX +XXX,XX @@ void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,

{

block_acct_start(blk_get_stats(blk), cookie, sg->size, type);

}

+

+uint64_t dma_aligned_pow2_mask(uint64_t start, uint64_t end, int max_addr_bits)

+{

+ uint64_t max_mask = UINT64_MAX, addr_mask = end - start;

+ uint64_t alignment_mask, size_mask;

+

+ if (max_addr_bits != 64) {

+ max_mask = (1ULL << max_addr_bits) - 1;

+ }

+

+ alignment_mask = start ? (start & -start) - 1 : max_mask;

+ alignment_mask = MIN(alignment_mask, max_mask);

+ size_mask = MIN(addr_mask, max_mask);

+

+ if (alignment_mask <= size_mask) {

+ /* Increase the alignment of start */

+ return alignment_mask;

+ } else {

+ /* Find the largest page mask from size */

+ if (addr_mask == UINT64_MAX) {

+ return UINT64_MAX;

+ }

+ return (1ULL << (63 - clz64(addr_mask + 1))) - 1;

+ }

+}

+

--

2.20.1

From: Eric Auger <eric.auger@redhat.com>

Unmap notifiers work with an address mask assuming an

invalidation range of a power of 2. Nothing mandates this

in the VIRTIO-IOMMU spec.

So in case the range is not a power of 2, split it into

several invalidations.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Peter Xu <peterx@redhat.com>

Message-id: 20210309102742.30442-4-eric.auger@redhat.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/virtio/virtio-iommu.c | 19 ++++++++++++++++---

1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/virtio/virtio-iommu.c

+++ b/hw/virtio/virtio-iommu.c

@@ -XXX,XX +XXX,XX @@ static void virtio_iommu_notify_unmap(IOMMUMemoryRegion *mr, hwaddr virt_start,

hwaddr virt_end)

{

IOMMUTLBEvent event;

+ uint64_t delta = virt_end - virt_start;

if (!(mr->iommu_notify_flags & IOMMU_NOTIFIER_UNMAP)) {

return;

@@ -XXX,XX +XXX,XX @@ static void virtio_iommu_notify_unmap(IOMMUMemoryRegion *mr, hwaddr virt_start,

event.type = IOMMU_NOTIFIER_UNMAP;

event.entry.target_as = &address_space_memory;

- event.entry.addr_mask = virt_end - virt_start;

- event.entry.iova = virt_start;

event.entry.perm = IOMMU_NONE;

event.entry.translated_addr = 0;

+ event.entry.addr_mask = delta;

+ event.entry.iova = virt_start;

- memory_region_notify_iommu(mr, 0, event);

+ if (delta == UINT64_MAX) {

+ memory_region_notify_iommu(mr, 0, event);

+ }

+

+

+ while (virt_start != virt_end + 1) {

+ uint64_t mask = dma_aligned_pow2_mask(virt_start, virt_end, 64);

+

+ event.entry.addr_mask = mask;

+ event.entry.iova = virt_start;

+ memory_region_notify_iommu(mr, 0, event);

+ virt_start += mask + 1;

+ }

}

static gboolean virtio_iommu_notify_unmap_cb(gpointer key, gpointer value,

--

2.20.1

From: Eric Auger <eric.auger@redhat.com>

If the asid is not set, do not attempt to locate the key directly

as all inserted keys have a valid asid.

Use g_hash_table_foreach_remove instead.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Message-id: 20210309102742.30442-5-eric.auger@redhat.com

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/arm/smmu-common.c | 2 +-

1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/smmu-common.c

+++ b/hw/arm/smmu-common.c

@@ -XXX,XX +XXX,XX @@ inline void

smmu_iotlb_inv_iova(SMMUState *s, int asid, dma_addr_t iova,

uint8_t tg, uint64_t num_pages, uint8_t ttl)

{

- if (ttl && (num_pages == 1)) {

+ if (ttl && (num_pages == 1) && (asid >= 0)) {

SMMUIOTLBKey key = smmu_get_iotlb_key(asid, iova, tg, ttl);

g_hash_table_remove(s->iotlb, &key);

--

2.20.1

Message-id: 20210309102742.30442-7-eric.auger@redhat.com

diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/smmu-internal.h

+++ b/hw/arm/smmu-internal.h

@@ -XXX,XX +XXX,XX @@ typedef struct SMMUIOTLBPageInvInfo {

uint64_t mask;

} SMMUIOTLBPageInvInfo;

+typedef struct SMMUSIDRange {

+ uint32_t start;

+ uint32_t end;

+} SMMUSIDRange;

+

#endif

From: Eric Auger <eric.auger@redhat.com>

Convert all sid printouts to sid=0x%x.

Signed-off-by: Eric Auger <eric.auger@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20210309102742.30442-8-eric.auger@redhat.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/arm/trace-events | 24 ++++++++++++------------

1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/hw/arm/trace-events b/hw/arm/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/trace-events

+++ b/hw/arm/trace-events

@@ -XXX,XX +XXX,XX @@ smmuv3_cmdq_opcode(const char *opcode) "<--- %s"

smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d "

smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) "Error on %s command execution: %d"

smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)"

-smmuv3_record_event(const char *type, uint32_t sid) "%s sid=%d"

-smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "SID:0x%x features:0x%x, sid_split:0x%x"

+smmuv3_record_event(const char *type, uint32_t sid) "%s sid=0x%x"

+smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "sid=0x%x features:0x%x, sid_split:0x%x"

smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) "strtab_base:0x%"PRIx64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx64" l2_off:0x%x max_l2_ste:%d"

smmuv3_get_ste(uint64_t addr) "STE addr: 0x%"PRIx64

-smmuv3_translate_disable(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=%d bypass (smmu disabled) iova:0x%"PRIx64" is_write=%d"

-smmuv3_translate_bypass(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=%d STE bypass iova:0x%"PRIx64" is_write=%d"

-smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=%d abort on iova:0x%"PRIx64" is_write=%d"

-smmuv3_translate_success(const char *n, uint16_t sid, uint64_t iova, uint64_t translated, int perm) "%s sid=%d iova=0x%"PRIx64" translated=0x%"PRIx64" perm=0x%x"

+smmuv3_translate_disable(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x bypass (smmu disabled) iova:0x%"PRIx64" is_write=%d"

+smmuv3_translate_bypass(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x STE bypass iova:0x%"PRIx64" is_write=%d"

+smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x abort on iova:0x%"PRIx64" is_write=%d"

+smmuv3_translate_success(const char *n, uint16_t sid, uint64_t iova, uint64_t translated, int perm) "%s sid=0x%x iova=0x%"PRIx64" translated=0x%"PRIx64" perm=0x%x"

smmuv3_get_cd(uint64_t addr) "CD addr: 0x%"PRIx64

smmuv3_decode_cd(uint32_t oas) "oas=%d"

smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz, bool had) "TT[%d]:tsz:%d ttb:0x%"PRIx64" granule_sz:%d had:%d"

-smmuv3_cmdq_cfgi_ste(int streamid) "streamid =%d"

+smmuv3_cmdq_cfgi_ste(int streamid) "streamid= 0x%x"