By using scripts/checkpatch.pl, it is found that many files in hw/intc/
contain lines with more than 80 characters.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
---
 hw/intc/apic.c           | 3 ++-
 hw/intc/arm_gic.c        | 5 +++--
 hw/intc/arm_gic_common.c | 3 ++-
 hw/intc/ioapic.c         | 3 ++-
 hw/intc/xics.c           | 3 ++-
 hw/intc/xics_kvm.c       | 3 ++-
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index b6a05e5439..89c2558f78 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -426,7 +426,8 @@ static void apic_eoi(APICCommonState *s)
     if (isrv < 0)
         return;
     apic_reset_bit(s->isr, isrv);
-    if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && apic_get_bit(s->tmr, isrv)) {
+    if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) &&
+        apic_get_bit(s->tmr, isrv)) {
         ioapic_eoi_broadcast(isrv);
     }
     apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC);
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index c60dc6b5e6..7580ef25c1 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -1976,8 +1976,9 @@ static MemTxResult gic_hyp_write(void *opaque, int cpu, hwaddr addr,
     return MEMTX_OK;
 }
 
-static MemTxResult gic_thiscpu_hyp_read(void *opaque, hwaddr addr, uint64_t *data,
-                                    unsigned size, MemTxAttrs attrs)
+static MemTxResult gic_thiscpu_hyp_read(void *opaque, hwaddr addr,
+                                        uint64_t *data, unsigned size,
+                                        MemTxAttrs attrs)
 {
     GICState *s = (GICState *)opaque;
 
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index 7b44d5625b..337ef239be 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -87,7 +87,8 @@ static const VMStateDescription vmstate_gic_virt_state = {
         /* Virtual CPU interfaces */
         VMSTATE_UINT32_SUB_ARRAY(cpu_ctlr, GICState, GIC_NCPU, GIC_NCPU),
         VMSTATE_UINT16_SUB_ARRAY(priority_mask, GICState, GIC_NCPU, GIC_NCPU),
-        VMSTATE_UINT16_SUB_ARRAY(running_priority, GICState, GIC_NCPU, GIC_NCPU),
+        VMSTATE_UINT16_SUB_ARRAY(running_priority, GICState, GIC_NCPU,
+                                 GIC_NCPU),
         VMSTATE_UINT16_SUB_ARRAY(current_pending, GICState, GIC_NCPU, GIC_NCPU),
         VMSTATE_UINT8_SUB_ARRAY(bpr, GICState, GIC_NCPU, GIC_NCPU),
         VMSTATE_UINT8_SUB_ARRAY(abpr, GICState, GIC_NCPU, GIC_NCPU),
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index bca71b5934..68d5548fd9 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -237,7 +237,8 @@ void ioapic_eoi_broadcast(int vector)
             entry = s->ioredtbl[n];
 
             if ((entry & IOAPIC_VECTOR_MASK) != vector ||
-                ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) != IOAPIC_TRIGGER_LEVEL) {
+                ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) !=
+                IOAPIC_TRIGGER_LEVEL) {
                 continue;
             }
 
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 68f9d44feb..c1bee454b5 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -322,7 +322,8 @@ static void icp_realize(DeviceState *dev, Error **errp)
         break;
 
     default:
-        error_setg(errp, "XICS interrupt controller does not support this CPU bus model");
+        error_setg(errp, "XICS interrupt controller does not support this "
+                   "CPU bus model");
         return;
     }
 
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 68bb1914b9..a8a2327062 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -400,7 +400,8 @@ int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers,
     /* Create the KVM XICS device */
     rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
     if (rc < 0) {
-        error_setg_errno(&local_err, -rc, "Error on KVM_CREATE_DEVICE for XICS");
+        error_setg_errno(&local_err, -rc,
+                         "Error on KVM_CREATE_DEVICE for XICS");
         goto fail;
     }
 
-- 
2.23.0