[PATCH 2/2] hw/arm/sbsa-ref : allocate IRQs for SMMUv3

Graeme Gregory posted 2 patches 5 years, 4 months ago
Maintainers: Radoslaw Biernacki <rad@semihalf.com>, Leif Lindholm <leif@nuviainc.com>, Peter Maydell <peter.maydell@linaro.org>
There is a newer version of this series
[PATCH 2/2] hw/arm/sbsa-ref : allocate IRQs for SMMUv3
Posted by Graeme Gregory 5 years, 4 months ago
Original commit did not allocate IRQs for the SMMUv3 in the irqmap
effectively using irq 0->3 (shared with other devices). Assuming
original intent was to allocate unique IRQs then add an allocation
to the irqmap.

Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part")
Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
---
 hw/arm/sbsa-ref.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 47e83252c1..9109fb58be 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -138,6 +138,7 @@ static const int sbsa_ref_irqmap[] = {
     [SBSA_SECURE_UART_MM] = 9,
     [SBSA_AHCI] = 10,
     [SBSA_EHCI] = 11,
+    [SBSA_SMMU] = 12, /* ... to 15 */
 };
 
 static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
-- 
2.25.1


Re: [PATCH 2/2] hw/arm/sbsa-ref : allocate IRQs for SMMUv3
Posted by Philippe Mathieu-Daudé 5 years, 4 months ago
On 9/29/20 11:42 AM, Graeme Gregory wrote:
> Original commit did not allocate IRQs for the SMMUv3 in the irqmap
> effectively using irq 0->3 (shared with other devices). Assuming
> original intent was to allocate unique IRQs then add an allocation
> to the irqmap.
> 
> Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part")
> Signed-off-by: Graeme Gregory <graeme@nuviainc.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  hw/arm/sbsa-ref.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
> index 47e83252c1..9109fb58be 100644
> --- a/hw/arm/sbsa-ref.c
> +++ b/hw/arm/sbsa-ref.c
> @@ -138,6 +138,7 @@ static const int sbsa_ref_irqmap[] = {
>      [SBSA_SECURE_UART_MM] = 9,
>      [SBSA_AHCI] = 10,
>      [SBSA_EHCI] = 11,
> +    [SBSA_SMMU] = 12, /* ... to 15 */
>  };
>  
>  static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
>