A clock mux can be configured to select one of its 10 sources through
the cm_ctl register. It also embeds yet another clock divider, composed
of an integer part and a fractionnal part. The number of bits of each
part is mux dependant.
Signed-off-by: Luc Michel <luc@lmichel.fr>
---
hw/misc/bcm2835_cprman.c | 43 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
index 8df2db0fd9..75bc11939b 100644
--- a/hw/misc/bcm2835_cprman.c
+++ b/hw/misc/bcm2835_cprman.c
@@ -229,19 +229,60 @@ static const TypeInfo cprman_pll_channel_info = {
};
/* clock mux */
+static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
+{
+ return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
+}
+
static void clock_mux_update(CprmanClockMuxState *mux)
{
- clock_update(mux->out, 0);
+ uint64_t freq, div;
+ uint32_t src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
+ bool enabled = clock_mux_is_enabled(mux);
+
+ *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
+
+ if (!enabled) {
+ clock_update(mux->out, 0);
+ return;
+ }
+
+ freq = clock_get_hz(mux->srcs[src]);
+
+ if (mux->int_bits == 0 && mux->frac_bits == 0) {
+ clock_update_hz(mux->out, freq);
+ return;
+ }
+
+ /*
+ * The divider has an integer and a fractional part. The size of each part
+ * varies with the muxes (int_bits and frac_bits). Both parts are
+ * concatenated, with the integer part always starting at bit 12.
+ */
+ div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
+ div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
+
+ freq = (freq << mux->frac_bits) / div;
+
+ clock_update_hz(mux->out, freq);
}
static void clock_mux_src_update(void *opaque)
{
CprmanClockMuxState **backref = opaque;
CprmanClockMuxState *s = *backref;
+ CprmanClockMuxSource src = backref - s->backref;
+ uint32_t current_src;
+
+ current_src = FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC);
+
+ if (current_src != src) {
+ return;
+ }
clock_mux_update(s);
}
static void clock_mux_init(Object *obj)
--
2.28.0
On 9/25/20 12:17 PM, Luc Michel wrote:
> A clock mux can be configured to select one of its 10 sources through
> the cm_ctl register. It also embeds yet another clock divider, composed
> of an integer part and a fractionnal part. The number of bits of each
Typo "fractional".
> part is mux dependant.
Typo "dependent"?
>
> Signed-off-by: Luc Michel <luc@lmichel.fr>
> ---
> hw/misc/bcm2835_cprman.c | 43 +++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 42 insertions(+), 1 deletion(-)
>
> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> index 8df2db0fd9..75bc11939b 100644
> --- a/hw/misc/bcm2835_cprman.c
> +++ b/hw/misc/bcm2835_cprman.c
> @@ -229,19 +229,60 @@ static const TypeInfo cprman_pll_channel_info = {
> };
>
>
> /* clock mux */
>
> +static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
> +{
> + return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
> +}
> +
> static void clock_mux_update(CprmanClockMuxState *mux)
> {
> - clock_update(mux->out, 0);
> + uint64_t freq, div;
> + uint32_t src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
> + bool enabled = clock_mux_is_enabled(mux);
> +
> + *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
> +
> + if (!enabled) {
> + clock_update(mux->out, 0);
> + return;
> + }
> +
> + freq = clock_get_hz(mux->srcs[src]);
> +
> + if (mux->int_bits == 0 && mux->frac_bits == 0) {
> + clock_update_hz(mux->out, freq);
> + return;
> + }
> +
> + /*
> + * The divider has an integer and a fractional part. The size of each part
> + * varies with the muxes (int_bits and frac_bits). Both parts are
> + * concatenated, with the integer part always starting at bit 12.
> + */
> + div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
> + div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
> +
> + freq = (freq << mux->frac_bits) / div;
> +
> + clock_update_hz(mux->out, freq);
> }
>
> static void clock_mux_src_update(void *opaque)
> {
> CprmanClockMuxState **backref = opaque;
> CprmanClockMuxState *s = *backref;
> + CprmanClockMuxSource src = backref - s->backref;
> + uint32_t current_src;
> +
> + current_src = FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC);
> +
> + if (current_src != src) {
> + return;
> + }
>
> clock_mux_update(s);
> }
>
> static void clock_mux_init(Object *obj)
>
On 9/26/20 11:40 PM, Philippe Mathieu-Daudé wrote:
> On 9/25/20 12:17 PM, Luc Michel wrote:
>> A clock mux can be configured to select one of its 10 sources through
>> the cm_ctl register. It also embeds yet another clock divider, composed
>> of an integer part and a fractionnal part. The number of bits of each
>
> Typo "fractional".
>
>> part is mux dependant.
>
> Typo "dependent"?
>
>>
>> Signed-off-by: Luc Michel <luc@lmichel.fr>
>> ---
>> hw/misc/bcm2835_cprman.c | 43 +++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 42 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
>> index 8df2db0fd9..75bc11939b 100644
>> --- a/hw/misc/bcm2835_cprman.c
>> +++ b/hw/misc/bcm2835_cprman.c
>> @@ -229,19 +229,60 @@ static const TypeInfo cprman_pll_channel_info = {
>> };
>>
>>
>> /* clock mux */
>>
>> +static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
>> +{
>> + return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
>> +}
>> +
>> static void clock_mux_update(CprmanClockMuxState *mux)
>> {
>> - clock_update(mux->out, 0);
>> + uint64_t freq, div;
>> + uint32_t src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
>> + bool enabled = clock_mux_is_enabled(mux);
>> +
>> + *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
>> +
>> + if (!enabled) {
>> + clock_update(mux->out, 0);
>> + return;
>> + }
>> +
>> + freq = clock_get_hz(mux->srcs[src]);
>> +
>> + if (mux->int_bits == 0 && mux->frac_bits == 0) {
>> + clock_update_hz(mux->out, freq);
>> + return;
>> + }
>> +
>> + /*
>> + * The divider has an integer and a fractional part. The size of each part
>> + * varies with the muxes (int_bits and frac_bits). Both parts are
>> + * concatenated, with the integer part always starting at bit 12.
>> + */
>> + div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
>> + div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
Eventually:
div &= MAKE_64BIT_MASK(mux->int_bits + mux->frac_bits, 64);
>> +
>> + freq = (freq << mux->frac_bits) / div;
Maybe:
freq = muldiv64(freq, 1 << mux->frac_bits, div);
>> +
>> + clock_update_hz(mux->out, freq);
>> }
>>
>> static void clock_mux_src_update(void *opaque)
>> {
>> CprmanClockMuxState **backref = opaque;
>> CprmanClockMuxState *s = *backref;
>> + CprmanClockMuxSource src = backref - s->backref;
>> + uint32_t current_src;
Maybe avoid current_src and use in place.
Otherwise:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> +
>> + current_src = FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC);
>> +
>> + if (current_src != src) {
>> + return;
>> + }
>>
>> clock_mux_update(s);
>> }
>>
>> static void clock_mux_init(Object *obj)
>>
>
On 16:51 Fri 02 Oct , Philippe Mathieu-Daudé wrote:
> On 9/26/20 11:40 PM, Philippe Mathieu-Daudé wrote:
> > On 9/25/20 12:17 PM, Luc Michel wrote:
> >> A clock mux can be configured to select one of its 10 sources through
> >> the cm_ctl register. It also embeds yet another clock divider, composed
> >> of an integer part and a fractionnal part. The number of bits of each
> >
> > Typo "fractional".
> >
> >> part is mux dependant.
> >
> > Typo "dependent"?
> >
> >>
> >> Signed-off-by: Luc Michel <luc@lmichel.fr>
> >> ---
> >> hw/misc/bcm2835_cprman.c | 43 +++++++++++++++++++++++++++++++++++++++-
> >> 1 file changed, 42 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> >> index 8df2db0fd9..75bc11939b 100644
> >> --- a/hw/misc/bcm2835_cprman.c
> >> +++ b/hw/misc/bcm2835_cprman.c
> >> @@ -229,19 +229,60 @@ static const TypeInfo cprman_pll_channel_info = {
> >> };
> >>
> >>
> >> /* clock mux */
> >>
> >> +static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
> >> +{
> >> + return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
> >> +}
> >> +
> >> static void clock_mux_update(CprmanClockMuxState *mux)
> >> {
> >> - clock_update(mux->out, 0);
> >> + uint64_t freq, div;
> >> + uint32_t src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
> >> + bool enabled = clock_mux_is_enabled(mux);
> >> +
> >> + *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
> >> +
> >> + if (!enabled) {
> >> + clock_update(mux->out, 0);
> >> + return;
> >> + }
> >> +
> >> + freq = clock_get_hz(mux->srcs[src]);
> >> +
> >> + if (mux->int_bits == 0 && mux->frac_bits == 0) {
> >> + clock_update_hz(mux->out, freq);
> >> + return;
> >> + }
> >> +
> >> + /*
> >> + * The divider has an integer and a fractional part. The size of each part
> >> + * varies with the muxes (int_bits and frac_bits). Both parts are
> >> + * concatenated, with the integer part always starting at bit 12.
> >> + */
> >> + div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
> >> + div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
>
> Eventually:
>
> div &= MAKE_64BIT_MASK(mux->int_bits + mux->frac_bits, 64);
I think this is MAKE_64BIT_MASK(0, mux->int_bits + mux->frac_bits)
(The shift macro parameter is 0 to have the ones positioned at the
mask's LSBs.
I'll use this macro in my next re-roll.
>
> >> +
> >> + freq = (freq << mux->frac_bits) / div;
>
> Maybe:
>
> freq = muldiv64(freq, 1 << mux->frac_bits, div);
OK
>
> >> +
> >> + clock_update_hz(mux->out, freq);
> >> }
> >>
> >> static void clock_mux_src_update(void *opaque)
> >> {
> >> CprmanClockMuxState **backref = opaque;
> >> CprmanClockMuxState *s = *backref;
> >> + CprmanClockMuxSource src = backref - s->backref;
> >> + uint32_t current_src;
>
> Maybe avoid current_src and use in place.
OK
>
> Otherwise:
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Thanks !
--
Luc
>
> >> +
> >> + current_src = FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC);
> >> +
> >> + if (current_src != src) {
> >> + return;
> >> + }
> >>
> >> clock_mux_update(s);
> >> }
> >>
> >> static void clock_mux_init(Object *obj)
> >>
> >
--
On 20:37 Sun 04 Oct , Luc Michel wrote:
> On 16:51 Fri 02 Oct , Philippe Mathieu-Daudé wrote:
> > On 9/26/20 11:40 PM, Philippe Mathieu-Daudé wrote:
> > > On 9/25/20 12:17 PM, Luc Michel wrote:
> > >> A clock mux can be configured to select one of its 10 sources through
> > >> the cm_ctl register. It also embeds yet another clock divider, composed
> > >> of an integer part and a fractionnal part. The number of bits of each
> > >
> > > Typo "fractional".
> > >
> > >> part is mux dependant.
> > >
> > > Typo "dependent"?
> > >
> > >>
> > >> Signed-off-by: Luc Michel <luc@lmichel.fr>
> > >> ---
> > >> hw/misc/bcm2835_cprman.c | 43 +++++++++++++++++++++++++++++++++++++++-
> > >> 1 file changed, 42 insertions(+), 1 deletion(-)
> > >>
> > >> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> > >> index 8df2db0fd9..75bc11939b 100644
> > >> --- a/hw/misc/bcm2835_cprman.c
> > >> +++ b/hw/misc/bcm2835_cprman.c
> > >> @@ -229,19 +229,60 @@ static const TypeInfo cprman_pll_channel_info = {
> > >> };
> > >>
> > >>
> > >> /* clock mux */
> > >>
> > >> +static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
> > >> +{
> > >> + return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
> > >> +}
> > >> +
> > >> static void clock_mux_update(CprmanClockMuxState *mux)
> > >> {
> > >> - clock_update(mux->out, 0);
> > >> + uint64_t freq, div;
> > >> + uint32_t src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
> > >> + bool enabled = clock_mux_is_enabled(mux);
> > >> +
> > >> + *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
> > >> +
> > >> + if (!enabled) {
> > >> + clock_update(mux->out, 0);
> > >> + return;
> > >> + }
> > >> +
> > >> + freq = clock_get_hz(mux->srcs[src]);
> > >> +
> > >> + if (mux->int_bits == 0 && mux->frac_bits == 0) {
> > >> + clock_update_hz(mux->out, freq);
> > >> + return;
> > >> + }
> > >> +
> > >> + /*
> > >> + * The divider has an integer and a fractional part. The size of each part
> > >> + * varies with the muxes (int_bits and frac_bits). Both parts are
> > >> + * concatenated, with the integer part always starting at bit 12.
> > >> + */
> > >> + div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
> > >> + div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
> >
> > Eventually:
> >
> > div &= MAKE_64BIT_MASK(mux->int_bits + mux->frac_bits, 64);
> I think this is MAKE_64BIT_MASK(0, mux->int_bits + mux->frac_bits)
> (The shift macro parameter is 0 to have the ones positioned at the
> mask's LSBs.
> I'll use this macro in my next re-roll.
Actually, I won't, because switching to muldiv64 implied some
modifications. The muldiv64 divisor parameter is uint32_t. Since there
is no MAKE_32BIT_MASK, and I don't use all the "features" of this macro
anyway (shift = 0 in my case), I'll keep this form (but I'll switch to
uin32_t for div).
--
Luc
>
> >
> > >> +
> > >> + freq = (freq << mux->frac_bits) / div;
> >
> > Maybe:
> >
> > freq = muldiv64(freq, 1 << mux->frac_bits, div);
> OK
>
> >
> > >> +
> > >> + clock_update_hz(mux->out, freq);
> > >> }
> > >>
> > >> static void clock_mux_src_update(void *opaque)
> > >> {
> > >> CprmanClockMuxState **backref = opaque;
> > >> CprmanClockMuxState *s = *backref;
> > >> + CprmanClockMuxSource src = backref - s->backref;
> > >> + uint32_t current_src;
> >
> > Maybe avoid current_src and use in place.
> OK
>
> >
> > Otherwise:
> > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Thanks !
>
> --
> Luc
>
> >
> > >> +
> > >> + current_src = FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC);
> > >> +
> > >> + if (current_src != src) {
> > >> + return;
> > >> + }
> > >>
> > >> clock_mux_update(s);
> > >> }
> > >>
> > >> static void clock_mux_init(Object *obj)
> > >>
> > >
>
> --
--
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