For some reason the xilinx can bus patches built in my local config
but not in the merge-test ones; dropped those.
-- PMM
The following changes since commit a68694cd1f3e5448cca814ff39b871f9ebd71ed5:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200914' into staging (2020-09-14 12:18:58 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200914-1
for you to fetch changes up to 4fe986dd4480308ecf07200cfbd3c3d494a0f639:
tests/acceptance: console boot tests for quanta-gsj (2020-09-14 14:24:59 +0100)
----------------------------------------------------------------
* hw/misc/a9scu: Do not allow invalid CPU count
* hw/misc/a9scu: Minor cleanups
* hw/timer/armv7m_systick: assert that board code set system_clock_scale
* decodetree: Improve identifier matching
* target/arm: Clean up neon fp insn size field decode
* target/arm: Remove KVM support for 32-bit Arm hosts
* hw/arm/mps2: New board models mps2-an386, mps2-an500
* Deprecate Unicore32 port
* Deprecate lm32 port
* target/arm: Count PMU events when MDCR.SPME is set
* hw/arm: versal-virt: Correct the tx/rx GEM clocks
* New Nuvoton iBMC board models npcm750-evb, quanta-gsj
----------------------------------------------------------------
Aaron Lindsay (1):
target/arm: Count PMU events when MDCR.SPME is set
Edgar E. Iglesias (1):
hw/arm: versal-virt: Correct the tx/rx GEM clocks
Havard Skinnemoen (14):
hw/misc: Add NPCM7xx System Global Control Registers device model
hw/misc: Add NPCM7xx Clock Controller device model
hw/timer: Add NPCM7xx Timer device model
hw/arm: Add NPCM730 and NPCM750 SoC models
hw/arm: Add two NPCM7xx-based machines
roms: Add virtual Boot ROM for NPCM7xx SoCs
hw/arm: Load -bios image as a boot ROM for npcm7xx
hw/nvram: NPCM7xx OTP device model
hw/mem: Stubbed out NPCM7xx Memory Controller model
hw/ssi: NPCM7xx Flash Interface Unit device model
hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj
hw/arm/npcm7xx: add board setup stub for CPU and UART clocks
docs/system: Add Nuvoton machine documentation
tests/acceptance: console boot tests for quanta-gsj
Peter Maydell (11):
hw/timer/armv7m_systick: assert that board code set system_clock_scale
target/arm: Convert Neon 3-same-fp size field to MO_* in decode
target/arm: Convert Neon VCVT fp size field to MO_* in decode
target/arm: Convert VCMLA, VCADD size field to MO_* in decode
target/arm: Remove KVM support for 32-bit Arm hosts
target/arm: Remove no-longer-reachable 32-bit KVM code
hw/arm/mps2: New board model mps2-an386
hw/arm/mps2: New board model mps2-an500
docs/system/arm/mps2.rst: Make board list consistent
Deprecate Unicore32 port
Deprecate lm32 port
Philippe Mathieu-Daudé (4):
hw/misc/a9scu: Do not allow invalid CPU count
hw/misc/a9scu: Simplify setting MemoryRegionOps::valid fields
hw/misc/a9scu: Simplify setting MemoryRegionOps::impl fields
hw/misc/a9scu: Report unimplemented accesses with qemu_log_mask(UNIMP)
Richard Henderson (1):
decodetree: Improve identifier matching
docs/system/arm/mps2.rst | 20 +-
docs/system/arm/nuvoton.rst | 92 +++++
docs/system/deprecated.rst | 32 +-
docs/system/target-arm.rst | 1 +
configure | 2 +-
default-configs/arm-softmmu.mak | 1 +
include/hw/arm/npcm7xx.h | 112 +++++++
include/hw/mem/npcm7xx_mc.h | 36 ++
include/hw/misc/npcm7xx_clk.h | 48 +++
include/hw/misc/npcm7xx_gcr.h | 43 +++
include/hw/nvram/npcm7xx_otp.h | 79 +++++
include/hw/ssi/npcm7xx_fiu.h | 73 ++++
include/hw/timer/npcm7xx_timer.h | 78 +++++
target/arm/kvm-consts.h | 7 -
target/arm/kvm_arm.h | 6 -
target/arm/neon-dp.decode | 18 +-
target/arm/neon-shared.decode | 18 +-
tests/decode/succ_ident1.decode | 7 +
hw/arm/mps2.c | 97 +++++-
hw/arm/npcm7xx.c | 532 +++++++++++++++++++++++++++++
hw/arm/npcm7xx_boards.c | 197 +++++++++++
hw/arm/xlnx-versal-virt.c | 2 +-
hw/mem/npcm7xx_mc.c | 84 +++++
hw/misc/a9scu.c | 59 ++--
hw/misc/npcm7xx_clk.c | 266 +++++++++++++++
hw/misc/npcm7xx_gcr.c | 269 +++++++++++++++
hw/nvram/npcm7xx_otp.c | 440 ++++++++++++++++++++++++
hw/ssi/npcm7xx_fiu.c | 572 +++++++++++++++++++++++++++++++
hw/timer/armv7m_systick.c | 8 +
hw/timer/npcm7xx_timer.c | 543 ++++++++++++++++++++++++++++++
target/arm/cpu.c | 101 +++---
target/arm/helper.c | 2 +-
target/arm/kvm.c | 7 -
target/arm/kvm32.c | 595 ---------------------------------
.gitmodules | 3 +
MAINTAINERS | 10 +
hw/arm/Kconfig | 9 +
hw/arm/meson.build | 1 +
hw/mem/meson.build | 1 +
hw/misc/meson.build | 4 +
hw/misc/trace-events | 8 +
hw/nvram/meson.build | 1 +
hw/ssi/meson.build | 1 +
hw/ssi/trace-events | 11 +
hw/timer/meson.build | 1 +
hw/timer/trace-events | 5 +
pc-bios/README | 6 +
pc-bios/meson.build | 1 +
pc-bios/npcm7xx_bootrom.bin | Bin 0 -> 768 bytes
roms/Makefile | 7 +
roms/vbootrom | 1 +
scripts/decodetree.py | 46 ++-
target/arm/meson.build | 5 +-
target/arm/translate-neon.c.inc | 42 ++-
tests/acceptance/boot_linux_console.py | 83 +++++
55 files changed, 3910 insertions(+), 783 deletions(-)
create mode 100644 docs/system/arm/nuvoton.rst
create mode 100644 include/hw/arm/npcm7xx.h
create mode 100644 include/hw/mem/npcm7xx_mc.h
create mode 100644 include/hw/misc/npcm7xx_clk.h
create mode 100644 include/hw/misc/npcm7xx_gcr.h
create mode 100644 include/hw/nvram/npcm7xx_otp.h
create mode 100644 include/hw/ssi/npcm7xx_fiu.h
create mode 100644 include/hw/timer/npcm7xx_timer.h
create mode 100644 tests/decode/succ_ident1.decode
create mode 100644 hw/arm/npcm7xx.c
create mode 100644 hw/arm/npcm7xx_boards.c
create mode 100644 hw/mem/npcm7xx_mc.c
create mode 100644 hw/misc/npcm7xx_clk.c
create mode 100644 hw/misc/npcm7xx_gcr.c
create mode 100644 hw/nvram/npcm7xx_otp.c
create mode 100644 hw/ssi/npcm7xx_fiu.c
create mode 100644 hw/timer/npcm7xx_timer.c
delete mode 100644 target/arm/kvm32.c
create mode 100644 pc-bios/npcm7xx_bootrom.bin
create mode 160000 roms/vbootrom