[v1] Support disable/enable CPU features for AArch64

[RFC 9/9] target/arm: Add more CPU features

Peng Liang posted 9 patches 5 years, 6 months ago

Diff against v2 v3
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Maintainers: Peter Maydell <peter.maydell@linaro.org>, "Michael S. Tsirkin" <mst@redhat.com>, Cornelia Huck <cohuck@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>

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[RFC 9/9] target/arm: Add more CPU features

Posted by Peng Liang 5 years, 6 months ago

Add i8mm, bf16, and dgh CPU features for AArch64.

Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
---
 target/arm/cpu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 0f620e8afe..9e2ddbc3ed 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1319,6 +1319,9 @@ static struct CPUFeatureInfo cpu_features[] = {
     FIELD_INFO(ID_AA64ISAR1, FRINTTS, false, 1, 0, false),
     FIELD_INFO(ID_AA64ISAR1, SB, false, 1, 0, false),
     FIELD_INFO(ID_AA64ISAR1, SPECRES, false, 1, 0, false),
+    FIELD_INFO(ID_AA64ISAR1, I8MM, false, 1, 0, false),
+    FIELD_INFO(ID_AA64ISAR1, BF16, false, 1, 0, false),
+    FIELD_INFO(ID_AA64ISAR1, DGH, false, 1, 0, false),
 
     FIELD_INFO(ID_AA64PFR0, EL0, false, 1, 0, false),
     FIELD_INFO(ID_AA64PFR0, EL1, false, 1, 0, false),
-- 
2.18.4