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[PATCH 02/11] target/riscv/vector_helper: Fix build on 32-bit big endian targets

Posted by Thomas Huth 5 years, 6 months ago

The code currently fails to compile on 32-bit big endian targets:

 target/riscv/vector_helper.c: In function 'vext_clear':
 target/riscv/vector_helper.c:154:16: error: cast to pointer from integer
 of different size [-Werror=int-to-pointer-cast]
         memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1);
                ^
 target/riscv/vector_helper.c:155:16: error: cast to pointer from integer
 of different size [-Werror=int-to-pointer-cast]
         memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2);
                ^
 cc1: all warnings being treated as errors

We should not use "long long" (i.e. 64-bit) values here to avoid the
problem. Switch to our QEMU_ALIGN_PTR_DOWN/UP macros instead.

Fixes: 751538d5da ("add vector stride load and store instructions")
Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 target/riscv/vector_helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 39f44d1029..793af99067 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -151,8 +151,8 @@ static void vext_clear(void *tail, uint32_t cnt, uint32_t tot)
     if (cnt % 8) {
         part1 = 8 - (cnt % 8);
         part2 = tot - cnt - part1;
-        memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1);
-        memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2);
+        memset(QEMU_ALIGN_PTR_DOWN(tail, 8), 0, part1);
+        memset(QEMU_ALIGN_PTR_UP(tail, 8), 0, part2);
     } else {
         memset(tail, 0, part2);
     }
-- 
2.18.1

Re: [PATCH 02/11] target/riscv/vector_helper: Fix build on 32-bit big endian targets

Posted by Richard Henderson 5 years, 6 months ago

On 8/4/20 10:00 AM, Thomas Huth wrote:
> The code currently fails to compile on 32-bit big endian targets:
> 
>  target/riscv/vector_helper.c: In function 'vext_clear':
>  target/riscv/vector_helper.c:154:16: error: cast to pointer from integer
>  of different size [-Werror=int-to-pointer-cast]
>          memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1);
>                 ^
>  target/riscv/vector_helper.c:155:16: error: cast to pointer from integer
>  of different size [-Werror=int-to-pointer-cast]
>          memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2);
>                 ^
>  cc1: all warnings being treated as errors
> 
> We should not use "long long" (i.e. 64-bit) values here to avoid the
> problem. Switch to our QEMU_ALIGN_PTR_DOWN/UP macros instead.
> 
> Fixes: 751538d5da ("add vector stride load and store instructions")
> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  target/riscv/vector_helper.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 02/11] target/riscv/vector_helper: Fix build on 32-bit big endian targets

Posted by Philippe Mathieu-Daudé 5 years, 6 months ago

On 8/4/20 7:00 PM, Thomas Huth wrote:
> The code currently fails to compile on 32-bit big endian targets:

s/target/host/ here and in subject?

> 
>  target/riscv/vector_helper.c: In function 'vext_clear':
>  target/riscv/vector_helper.c:154:16: error: cast to pointer from integer
>  of different size [-Werror=int-to-pointer-cast]
>          memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1);
>                 ^
>  target/riscv/vector_helper.c:155:16: error: cast to pointer from integer
>  of different size [-Werror=int-to-pointer-cast]
>          memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2);
>                 ^
>  cc1: all warnings being treated as errors
> 
> We should not use "long long" (i.e. 64-bit) values here to avoid the
> problem. Switch to our QEMU_ALIGN_PTR_DOWN/UP macros instead.
> 
> Fixes: 751538d5da ("add vector stride load and store instructions")
> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  target/riscv/vector_helper.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 39f44d1029..793af99067 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -151,8 +151,8 @@ static void vext_clear(void *tail, uint32_t cnt, uint32_t tot)
>      if (cnt % 8) {
>          part1 = 8 - (cnt % 8);
>          part2 = tot - cnt - part1;
> -        memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1);
> -        memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2);
> +        memset(QEMU_ALIGN_PTR_DOWN(tail, 8), 0, part1);
> +        memset(QEMU_ALIGN_PTR_UP(tail, 8), 0, part2);
>      } else {
>          memset(tail, 0, part2);
>      }
>

Re: [PATCH 02/11] target/riscv/vector_helper: Fix build on 32-bit big endian targets

Posted by Thomas Huth 5 years, 6 months ago

On 04/08/2020 19.46, Philippe Mathieu-Daudé wrote:
> On 8/4/20 7:00 PM, Thomas Huth wrote:
>> The code currently fails to compile on 32-bit big endian targets:
> 
> s/target/host/ here and in subject?

Yes, "host" is better, I'll change that.

 Thanks,
  Thomas