| 1 | Couple of last-minute things for rc3... | 1 | v2: drop pvpanic-pci patches. |
|---|---|---|---|
| 2 | 2 | ||
| 3 | -- PMM | 3 | The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c: |
| 4 | 4 | ||
| 5 | The following changes since commit d15532d91be177e7528310e0110e39f915779a99: | 5 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000) |
| 6 | |||
| 7 | Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20200804' into staging (2020-08-04 11:53:20 +0100) | ||
| 8 | 6 | ||
| 9 | are available in the Git repository at: | 7 | are available in the Git repository at: |
| 10 | 8 | ||
| 11 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200804 | 9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1 |
| 12 | 10 | ||
| 13 | for you to fetch changes up to d250bb19ced3b702c7c37731855f6876d0cc7995: | 11 | for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8: |
| 14 | 12 | ||
| 15 | target/arm: Fix decode of LDRA[AB] instructions (2020-08-04 16:40:19 +0100) | 13 | docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000) |
| 16 | 14 | ||
| 17 | ---------------------------------------------------------------- | 15 | ---------------------------------------------------------------- |
| 18 | target-arm queue: | 16 | target-arm queue: |
| 19 | * Fix decode of LDRA[AB] instructions | 17 | * Implement IMPDEF pauth algorithm |
| 20 | * docs/devel: Document decodetree no-overlap groups | 18 | * Support ARMv8.4-SEL2 |
| 19 | * Fix bug where we were truncating predicate vector lengths in SVE insns | ||
| 20 | * npcm7xx_adc-test: Fix memleak in adc_qom_set | ||
| 21 | * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error | ||
| 22 | * docs: Build and install all the docs in a single manual | ||
| 21 | 23 | ||
| 22 | ---------------------------------------------------------------- | 24 | ---------------------------------------------------------------- |
| 23 | Peter Collingbourne (1): | 25 | Gan Qixin (1): |
| 24 | target/arm: Fix decode of LDRA[AB] instructions | 26 | npcm7xx_adc-test: Fix memleak in adc_qom_set |
| 25 | 27 | ||
| 26 | Richard Henderson (1): | 28 | Peter Maydell (1): |
| 27 | docs/devel: Document decodetree no-overlap groups | 29 | docs: Build and install all the docs in a single manual |
| 28 | 30 | ||
| 29 | docs/devel/decodetree.rst | 29 ++++++++++++++++++----------- | 31 | Philippe Mathieu-Daudé (1): |
| 30 | target/arm/translate-a64.c | 6 ++++-- | 32 | target/arm/m_helper: Silence GCC 10 maybe-uninitialized error |
| 31 | 2 files changed, 22 insertions(+), 13 deletions(-) | ||
| 32 | 33 | ||
| 34 | Richard Henderson (7): | ||
| 35 | target/arm: Implement an IMPDEF pauth algorithm | ||
| 36 | target/arm: Add cpu properties to control pauth | ||
| 37 | target/arm: Use object_property_add_bool for "sve" property | ||
| 38 | target/arm: Introduce PREDDESC field definitions | ||
| 39 | target/arm: Update PFIRST, PNEXT for pred_desc | ||
| 40 | target/arm: Update ZIP, UZP, TRN for pred_desc | ||
| 41 | target/arm: Update REV, PUNPK for pred_desc | ||
| 42 | |||
| 43 | Rémi Denis-Courmont (19): | ||
| 44 | target/arm: remove redundant tests | ||
| 45 | target/arm: add arm_is_el2_enabled() helper | ||
| 46 | target/arm: use arm_is_el2_enabled() where applicable | ||
| 47 | target/arm: use arm_hcr_el2_eff() where applicable | ||
| 48 | target/arm: factor MDCR_EL2 common handling | ||
| 49 | target/arm: Define isar_feature function to test for presence of SEL2 | ||
| 50 | target/arm: add 64-bit S-EL2 to EL exception table | ||
| 51 | target/arm: add MMU stage 1 for Secure EL2 | ||
| 52 | target/arm: add ARMv8.4-SEL2 system registers | ||
| 53 | target/arm: handle VMID change in secure state | ||
| 54 | target/arm: do S1_ptw_translate() before address space lookup | ||
| 55 | target/arm: translate NS bit in page-walks | ||
| 56 | target/arm: generalize 2-stage page-walk condition | ||
| 57 | target/arm: secure stage 2 translation regime | ||
| 58 | target/arm: set HPFAR_EL2.NS on secure stage 2 faults | ||
| 59 | target/arm: revector to run-time pick target EL | ||
| 60 | target/arm: Implement SCR_EL2.EEL2 | ||
| 61 | target/arm: enable Secure EL2 in max CPU | ||
| 62 | target/arm: refactor vae1_tlbmask() | ||
| 63 | |||
| 64 | docs/conf.py | 46 ++++- | ||
| 65 | docs/devel/conf.py | 15 -- | ||
| 66 | docs/index.html.in | 17 -- | ||
| 67 | docs/interop/conf.py | 28 --- | ||
| 68 | docs/meson.build | 64 +++--- | ||
| 69 | docs/specs/conf.py | 16 -- | ||
| 70 | docs/system/arm/cpu-features.rst | 21 ++ | ||
| 71 | docs/system/conf.py | 28 --- | ||
| 72 | docs/tools/conf.py | 37 ---- | ||
| 73 | docs/user/conf.py | 15 -- | ||
| 74 | include/qemu/xxhash.h | 98 +++++++++ | ||
| 75 | target/arm/cpu-param.h | 2 +- | ||
| 76 | target/arm/cpu.h | 107 ++++++++-- | ||
| 77 | target/arm/internals.h | 45 +++++ | ||
| 78 | target/arm/cpu.c | 23 ++- | ||
| 79 | target/arm/cpu64.c | 65 ++++-- | ||
| 80 | target/arm/helper-a64.c | 8 +- | ||
| 81 | target/arm/helper.c | 414 ++++++++++++++++++++++++++------------- | ||
| 82 | target/arm/m_helper.c | 2 +- | ||
| 83 | target/arm/monitor.c | 1 + | ||
| 84 | target/arm/op_helper.c | 4 +- | ||
| 85 | target/arm/pauth_helper.c | 27 ++- | ||
| 86 | target/arm/sve_helper.c | 33 ++-- | ||
| 87 | target/arm/tlb_helper.c | 3 + | ||
| 88 | target/arm/translate-a64.c | 4 + | ||
| 89 | target/arm/translate-sve.c | 31 ++- | ||
| 90 | target/arm/translate.c | 36 +++- | ||
| 91 | tests/qtest/arm-cpu-features.c | 13 ++ | ||
| 92 | tests/qtest/npcm7xx_adc-test.c | 1 + | ||
| 93 | .gitlab-ci.yml | 4 +- | ||
| 94 | 30 files changed, 770 insertions(+), 438 deletions(-) | ||
| 95 | delete mode 100644 docs/devel/conf.py | ||
| 96 | delete mode 100644 docs/index.html.in | ||
| 97 | delete mode 100644 docs/interop/conf.py | ||
| 98 | delete mode 100644 docs/specs/conf.py | ||
| 99 | delete mode 100644 docs/system/conf.py | ||
| 100 | delete mode 100644 docs/tools/conf.py | ||
| 101 | delete mode 100644 docs/user/conf.py | ||
| 102 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
| 2 | 1 | ||
| 3 | When support for this feature went in, the update to the | ||
| 4 | documentation was forgotten. | ||
| 5 | |||
| 6 | Fixes: 067e8b0f45d6 | ||
| 7 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 8 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | Message-id: 20200803205708.315829-1-richard.henderson@linaro.org | ||
| 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 12 | --- | ||
| 13 | docs/devel/decodetree.rst | 29 ++++++++++++++++++----------- | ||
| 14 | 1 file changed, 18 insertions(+), 11 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/docs/devel/decodetree.rst b/docs/devel/decodetree.rst | ||
| 17 | index XXXXXXX..XXXXXXX 100644 | ||
| 18 | --- a/docs/devel/decodetree.rst | ||
| 19 | +++ b/docs/devel/decodetree.rst | ||
| 20 | @@ -XXX,XX +XXX,XX @@ Pattern Groups | ||
| 21 | |||
| 22 | Syntax:: | ||
| 23 | |||
| 24 | - group := '{' ( pat_def | group )+ '}' | ||
| 25 | + group := overlap_group | no_overlap_group | ||
| 26 | + overlap_group := '{' ( pat_def | group )+ '}' | ||
| 27 | + no_overlap_group := '[' ( pat_def | group )+ ']' | ||
| 28 | |||
| 29 | -A *group* begins with a lone open-brace, with all subsequent lines | ||
| 30 | -indented two spaces, and ending with a lone close-brace. Groups | ||
| 31 | -may be nested, increasing the required indentation of the lines | ||
| 32 | -within the nested group to two spaces per nesting level. | ||
| 33 | +A *group* begins with a lone open-brace or open-bracket, with all | ||
| 34 | +subsequent lines indented two spaces, and ending with a lone | ||
| 35 | +close-brace or close-bracket. Groups may be nested, increasing the | ||
| 36 | +required indentation of the lines within the nested group to two | ||
| 37 | +spaces per nesting level. | ||
| 38 | |||
| 39 | -Unlike ungrouped patterns, grouped patterns are allowed to overlap. | ||
| 40 | -Conflicts are resolved by selecting the patterns in order. If all | ||
| 41 | -of the fixedbits for a pattern match, its translate function will | ||
| 42 | -be called. If the translate function returns false, then subsequent | ||
| 43 | -patterns within the group will be matched. | ||
| 44 | +Patterns within overlap groups are allowed to overlap. Conflicts are | ||
| 45 | +resolved by selecting the patterns in order. If all of the fixedbits | ||
| 46 | +for a pattern match, its translate function will be called. If the | ||
| 47 | +translate function returns false, then subsequent patterns within the | ||
| 48 | +group will be matched. | ||
| 49 | + | ||
| 50 | +Patterns within no-overlap groups are not allowed to overlap, just | ||
| 51 | +the same as ungrouped patterns. Thus no-overlap groups are intended | ||
| 52 | +to be nested inside overlap groups. | ||
| 53 | |||
| 54 | The following example from PA-RISC shows specialization of the *or* | ||
| 55 | instruction:: | ||
| 56 | @@ -XXX,XX +XXX,XX @@ instruction:: | ||
| 57 | When the *cf* field is zero, the instruction has no side effects, | ||
| 58 | and may be specialized. When the *rt* field is zero, the output | ||
| 59 | is discarded and so the instruction has no effect. When the *rt2* | ||
| 60 | -field is zero, the operation is ``reg[rt] | 0`` and so encodes | ||
| 61 | +field is zero, the operation is ``reg[r1] | 0`` and so encodes | ||
| 62 | the canonical register copy operation. | ||
| 63 | |||
| 64 | The output from the generator might look like:: | ||
| 65 | -- | ||
| 66 | 2.20.1 | ||
| 67 | |||
| 68 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Peter Collingbourne <pcc@google.com> | ||
| 2 | 1 | ||
| 3 | These instructions use zero as the discriminator, not SP. | ||
| 4 | |||
| 5 | Signed-off-by: Peter Collingbourne <pcc@google.com> | ||
| 6 | Message-id: 20200804002849.30268-1-pcc@google.com | ||
| 7 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | --- | ||
| 11 | target/arm/translate-a64.c | 6 ++++-- | ||
| 12 | 1 file changed, 4 insertions(+), 2 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/arm/translate-a64.c | ||
| 17 | +++ b/target/arm/translate-a64.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ static void disas_ldst_pac(DisasContext *s, uint32_t insn, | ||
| 19 | |||
| 20 | if (s->pauth_active) { | ||
| 21 | if (use_key_a) { | ||
| 22 | - gen_helper_autda(dirty_addr, cpu_env, dirty_addr, cpu_X[31]); | ||
| 23 | + gen_helper_autda(dirty_addr, cpu_env, dirty_addr, | ||
| 24 | + new_tmp_a64_zero(s)); | ||
| 25 | } else { | ||
| 26 | - gen_helper_autdb(dirty_addr, cpu_env, dirty_addr, cpu_X[31]); | ||
| 27 | + gen_helper_autdb(dirty_addr, cpu_env, dirty_addr, | ||
| 28 | + new_tmp_a64_zero(s)); | ||
| 29 | } | ||
| 30 | } | ||
| 31 | |||
| 32 | -- | ||
| 33 | 2.20.1 | ||
| 34 | |||
| 35 | diff view generated by jsdifflib |