[PATCH v2] hw/misc/edu: support pci device state migration

Zeng Guang posted 1 patch 3 years, 9 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200723084355.18370-1-guang.zeng@intel.com
Maintainers: Jiri Slaby <jslaby@suse.cz>
hw/misc/edu.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
[PATCH v2] hw/misc/edu: support pci device state migration
Posted by Zeng Guang 3 years, 9 months ago
Currently edu device doesn't support live migration. Part of PCI
configuration information would be lost after migration.

PCI device state in source VM:
     Bus  0, device   3, function 0:
     Class 0255: PCI device 1234:11e8
     PCI subsystem 1af4:1100
     IRQ 11, pin A
     BAR0: 32 bit memory at 0xfea00000 [0xfeafffff].
     id ""

PCI device state in destination VM:
     Bus  0, device   3, function 0:
     Class 0255: PCI device 1234:11e8
     PCI subsystem 1af4:1100
     IRQ 0, pin A
     BAR0: 32 bit memory at 0xffffffffffffffff [0x000ffffe].
     id ""

Add VMState for edu device to support migration.

Signed-off-by: Gao Chao <chao.gao@intel.com>
Signed-off-by: Zeng Guang <guang.zeng@intel.com>
Reviewed-by: Wei Wang <wei.w.wang@intel.com>
---
 hw/misc/edu.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index ec617e63f3..5f3fecac41 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -27,6 +27,7 @@
 #include "hw/pci/pci.h"
 #include "hw/hw.h"
 #include "hw/pci/msi.h"
+#include "migration/vmstate.h"
 #include "qemu/timer.h"
 #include "qemu/main-loop.h" /* iothread mutex */
 #include "qemu/module.h"
@@ -70,7 +71,7 @@ typedef struct {
         dma_addr_t cmd;
     } dma;
     QEMUTimer dma_timer;
-    char dma_buf[DMA_SIZE];
+    uint8_t dma_buf[DMA_SIZE];
     uint64_t dma_mask;
 } EduState;
 
@@ -405,6 +406,28 @@ static void edu_instance_init(Object *obj)
                                    &edu->dma_mask, OBJ_PROP_FLAG_READWRITE);
 }
 
+static const VMStateDescription vmstate_edu = {
+    .name = "edu",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_PCI_DEVICE(pdev, EduState),
+        VMSTATE_BOOL(stopping, EduState),
+        VMSTATE_UINT32(addr4, EduState),
+        VMSTATE_UINT32(fact, EduState),
+        VMSTATE_UINT32(status, EduState),
+        VMSTATE_UINT32(irq_status, EduState),
+        VMSTATE_UINT64(dma.src, EduState),
+        VMSTATE_UINT64(dma.dst, EduState),
+        VMSTATE_UINT64(dma.cnt, EduState),
+        VMSTATE_UINT64(dma.cmd, EduState),
+        VMSTATE_TIMER(dma_timer, EduState),
+        VMSTATE_BUFFER(dma_buf, EduState),
+        VMSTATE_UINT64(dma_mask, EduState),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static void edu_class_init(ObjectClass *class, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(class);
@@ -415,6 +438,7 @@ static void edu_class_init(ObjectClass *class, void *data)
     k->vendor_id = PCI_VENDOR_ID_QEMU;
     k->device_id = 0x11e8;
     k->revision = 0x10;
+    dc->vmsd = &vmstate_edu;
     k->class_id = PCI_CLASS_OTHERS;
     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 }
-- 
2.17.1


Re: [PATCH v2] hw/misc/edu: support pci device state migration
Posted by Peter Maydell 3 years, 9 months ago
On Thu, 23 Jul 2020 at 10:01, Zeng Guang <guang.zeng@intel.com> wrote:
>
> Currently edu device doesn't support live migration. Part of PCI
> configuration information would be lost after migration.
>
> PCI device state in source VM:
>      Bus  0, device   3, function 0:
>      Class 0255: PCI device 1234:11e8
>      PCI subsystem 1af4:1100
>      IRQ 11, pin A
>      BAR0: 32 bit memory at 0xfea00000 [0xfeafffff].
>      id ""
>
> PCI device state in destination VM:
>      Bus  0, device   3, function 0:
>      Class 0255: PCI device 1234:11e8
>      PCI subsystem 1af4:1100
>      IRQ 0, pin A
>      BAR0: 32 bit memory at 0xffffffffffffffff [0x000ffffe].
>      id ""
>
> Add VMState for edu device to support migration.
>
> Signed-off-by: Gao Chao <chao.gao@intel.com>
> Signed-off-by: Zeng Guang <guang.zeng@intel.com>
> Reviewed-by: Wei Wang <wei.w.wang@intel.com>


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM