[v2] target/riscv: support vector extension v0.9

[RFC v2 64/76] target/riscv: rvv-0.9: single-width scaling shift instructions

Posted by frank.chang@sifive.com 5 years, 6 months ago

From: Frank Chang <frank.chang@sifive.com>

Zero-extend vssra.vi immediate value.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
 target/riscv/insn_trans/trans_rvv.inc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/insn_trans/trans_rvv.inc.c b/target/riscv/insn_trans/trans_rvv.inc.c
index 10d8b8b00d..fb8478a456 100644
--- a/target/riscv/insn_trans/trans_rvv.inc.c
+++ b/target/riscv/insn_trans/trans_rvv.inc.c
@@ -2406,7 +2406,7 @@ GEN_OPIVV_TRANS(vssra_vv, opivv_check)
 GEN_OPIVX_TRANS(vssrl_vx,  opivx_check)
 GEN_OPIVX_TRANS(vssra_vx,  opivx_check)
 GEN_OPIVI_TRANS(vssrl_vi, IMM_ZX, vssrl_vx, opivx_check)
-GEN_OPIVI_TRANS(vssra_vi, IMM_SX, vssra_vx, opivx_check)
+GEN_OPIVI_TRANS(vssra_vi, IMM_ZX, vssra_vx, opivx_check)
 
 /* Vector Narrowing Fixed-Point Clip Instructions */
 GEN_OPIWV_NARROW_TRANS(vnclipu_wv)
-- 
2.17.1

Re: [RFC v2 64/76] target/riscv: rvv-0.9: single-width scaling shift instructions

Posted by Richard Henderson 5 years, 6 months ago

On 7/22/20 2:16 AM, frank.chang@sifive.com wrote:
>  GEN_OPIVI_TRANS(vssrl_vi, IMM_ZX, vssrl_vx, opivx_check)
> -GEN_OPIVI_TRANS(vssra_vi, IMM_SX, vssra_vx, opivx_check)
> +GEN_OPIVI_TRANS(vssra_vi, IMM_ZX, vssra_vx, opivx_check)
>  

I think both vssrl and vssra should use IMM_TRUNC_SEW.


r~