1
Last lot of target-arm changes to squeeze in before rc1:
1
Arm queue; bugfixes only.
2
* various minor Arm bug fixes
3
* David Carlier's Haiku build portability fixes
4
* Wentong Wu's fixes for icount handling in the nios2 target
5
2
6
The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
3
thanks
4
-- PMM
7
5
8
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
6
The following changes since commit 48aa8f0ac536db3550a35c295ff7de94e4c33739:
7
8
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2020-11-16' into staging (2020-11-17 11:07:00 +0000)
9
9
10
are available in the Git repository at:
10
are available in the Git repository at:
11
11
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201117
13
13
14
for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
14
for you to fetch changes up to ab135622cf478585bdfcb68b85e4a817d74a0c42:
15
15
16
hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
16
tmp105: Correct handling of temperature limit checks (2020-11-17 12:56:33 +0000)
17
17
18
----------------------------------------------------------------
18
----------------------------------------------------------------
19
target-arm queue:
19
target-arm queue:
20
* hw/arm/bcm2836: Remove unused 'cpu_type' field
20
* hw/arm/virt: ARM_VIRT must select ARM_GIC
21
* target/arm: Fix mtedesc for do_mem_zpz
21
* exynos: Fix bad printf format specifiers
22
* Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
22
* hw/input/ps2.c: Remove remnants of printf debug
23
* target/arm: Don't do raw writes for PMINTENCLR
23
* target/openrisc: Remove dead code attempting to check "is timer disabled"
24
* virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
24
* register: Remove unnecessary NULL check
25
* build: Fix various issues with building on Haiku
25
* util/cutils: Fix Coverity array overrun in freq_to_str()
26
* target/nios2: fix wrctl behaviour when using icount
26
* configure: Make "does libgio work" test pull in some actual functions
27
* hw/arm/tosa: Encapsulate misc GPIO handling in a device
27
* tmp105: reset the T_low and T_High registers
28
* hw/arm/palm.c: Encapsulate misc GPIO handling in a device
28
* tmp105: Correct handling of temperature limit checks
29
* hw/arm/aspeed: Do not create and attach empty SD cards by default
30
29
31
----------------------------------------------------------------
30
----------------------------------------------------------------
32
Aaron Lindsay (1):
31
Alex Chen (1):
33
target/arm: Don't do raw writes for PMINTENCLR
32
exynos: Fix bad printf format specifiers
34
33
35
David CARLIER (8):
34
Alistair Francis (1):
36
build: Enable BSD symbols for Haiku
35
register: Remove unnecessary NULL check
37
util/qemu-openpty.c: Don't assume pty.h is glibc-only
38
build: Check that mlockall() exists
39
osdep.h: Always include <sys/signal.h> if it exists
40
osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
41
bswap.h: Include <endian.h> on Haiku for bswap operations
42
util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
43
util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku
44
36
45
Eric Auger (1):
37
Andrew Jones (1):
46
virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
38
hw/arm/virt: ARM_VIRT must select ARM_GIC
47
39
48
Gerd Hoffmann (1):
40
Peter Maydell (5):
49
util/drm: make portable by avoiding struct dirent d_type
41
hw/input/ps2.c: Remove remnants of printf debug
42
target/openrisc: Remove dead code attempting to check "is timer disabled"
43
configure: Make "does libgio work" test pull in some actual functions
44
hw/misc/tmp105: reset the T_low and T_High registers
45
tmp105: Correct handling of temperature limit checks
50
46
51
Jean-Christophe Dubois (3):
47
Philippe Mathieu-Daudé (1):
52
Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
48
util/cutils: Fix Coverity array overrun in freq_to_str()
53
Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
54
Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor
55
49
56
Peter Maydell (4):
50
configure | 11 +++++--
57
hw/arm/tosa.c: Detabify
51
hw/misc/tmp105.h | 7 +++++
58
hw/arm/tosa: Encapsulate misc GPIO handling in a device
52
hw/core/register.c | 4 ---
59
hw/arm/palm.c: Detabify
53
hw/input/ps2.c | 9 ------
60
hw/arm/palm.c: Encapsulate misc GPIO handling in a device
54
hw/misc/tmp105.c | 73 ++++++++++++++++++++++++++++++++++++++------
55
hw/timer/exynos4210_mct.c | 4 +--
56
hw/timer/exynos4210_pwm.c | 8 ++---
57
target/openrisc/sys_helper.c | 3 --
58
util/cutils.c | 3 +-
59
hw/arm/Kconfig | 1 +
60
10 files changed, 89 insertions(+), 34 deletions(-)
61
61
62
Philippe Mathieu-Daudé (2):
63
hw/arm/bcm2836: Remove unused 'cpu_type' field
64
hw/arm/aspeed: Do not create and attach empty SD cards by default
65
66
Richard Henderson (1):
67
target/arm: Fix mtedesc for do_mem_zpz
68
69
Wentong Wu (4):
70
target/nios2: add DISAS_NORETURN case for nothing more to generate
71
target/nios2: in line the semantics of DISAS_UPDATE with other targets
72
target/nios2: Use gen_io_start around wrctl instruction
73
hw/nios2: exit to main CPU loop only when unmasking interrupts
74
75
configure | 38 ++++++++++++-
76
include/hw/arm/bcm2836.h | 1 -
77
include/hw/arm/fsl-imx25.h | 1 +
78
include/hw/arm/fsl-imx6.h | 1 +
79
include/hw/arm/fsl-imx7.h | 1 +
80
include/qemu/bswap.h | 2 +
81
include/qemu/osdep.h | 6 +-
82
hw/arm/aspeed.c | 9 +--
83
hw/arm/fsl-imx25.c | 7 +++
84
hw/arm/fsl-imx6.c | 7 +++
85
hw/arm/fsl-imx7.c | 9 +++
86
hw/arm/palm.c | 111 +++++++++++++++++++++++++------------
87
hw/arm/tosa.c | 132 +++++++++++++++++++++++++++++---------------
88
hw/nios2/cpu_pic.c | 3 +-
89
hw/virtio/virtio-iommu.c | 1 +
90
hw/xen/xen-legacy-backend.c | 1 -
91
os-posix.c | 4 ++
92
target/arm/helper.c | 4 +-
93
target/arm/translate-sve.c | 2 +-
94
target/nios2/translate.c | 12 +++-
95
util/compatfd.c | 2 +
96
util/drm.c | 19 +++++--
97
util/oslib-posix.c | 20 ++++++-
98
util/qemu-openpty.c | 2 +-
99
24 files changed, 292 insertions(+), 103 deletions(-)
100
diff view generated by jsdifflib
1
From: Eric Auger <eric.auger@redhat.com>
1
From: Andrew Jones <drjones@redhat.com>
2
2
3
Coverity points out (CID 1430180) that the new case is missing
3
The removal of the selection of A15MPCORE from ARM_VIRT also
4
break or a /* fallthrough */ comment. Break is the right thing to
4
removed what A15MPCORE selects, ARM_GIC. We still need ARM_GIC.
5
do as in that case, tail is not used.
6
5
7
Fixes 1733eebb9e ("virtio-iommu: Implement RESV_MEM probe request")
6
Fixes: bec3c97e0cf9 ("hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals")
8
Signed-off-by: Eric Auger <eric.auger@redhat.com>
7
Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
9
Reported-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Andrew Jones <drjones@redhat.com>
10
Message-id: 20200708160147.18426-1-eric.auger@redhat.com
9
Reviewed-by: Miroslav Rezanina <mrezanin@redhat.com>
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
11
Message-id: 20201111143440.112763-1-drjones@redhat.com
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
13
---
14
hw/virtio/virtio-iommu.c | 1 +
14
hw/arm/Kconfig | 1 +
15
1 file changed, 1 insertion(+)
15
1 file changed, 1 insertion(+)
16
16
17
diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
17
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
18
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
19
--- a/hw/virtio/virtio-iommu.c
19
--- a/hw/arm/Kconfig
20
+++ b/hw/virtio/virtio-iommu.c
20
+++ b/hw/arm/Kconfig
21
@@ -XXX,XX +XXX,XX @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq)
21
@@ -XXX,XX +XXX,XX @@ config ARM_VIRT
22
ptail = (struct virtio_iommu_req_tail *)
22
imply VFIO_PLATFORM
23
(buf + s->config.probe_size);
23
imply VFIO_XGMAC
24
ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf);
24
imply TPM_TIS_SYSBUS
25
+ break;
25
+ select ARM_GIC
26
}
26
select ACPI
27
default:
27
select ARM_SMMUV3
28
tail.status = VIRTIO_IOMMU_S_UNSUPP;
28
select GPIO_KEY
29
--
29
--
30
2.20.1
30
2.20.1
31
31
32
32
diff view generated by jsdifflib
1
Currently we have a free-floating set of IRQs and a function
1
From: Alex Chen <alex.chen@huawei.com>
2
tosa_out_switch() which handle the GPIO lines on the tosa board which
3
connect to LEDs, and another free-floating IRQ and tosa_reset()
4
function to handle the GPIO line that resets the system. Encapsulate
5
this behaviour in a simple QOM device.
6
2
7
This commit fixes Coverity issue CID 1421929 (which pointed out that
3
We should use printf format specifier "%u" instead of "%d" for
8
the 'outsignals' in tosa_gpio_setup() were leaked), because it
4
argument of type "unsigned int".
9
removes the use of the qemu_allocate_irqs() API from this code
10
entirely.
11
5
6
Reported-by: Euler Robot <euler.robot@huawei.com>
7
Signed-off-by: Alex Chen <alex.chen@huawei.com>
8
Message-id: 20201111073651.72804-1-alex.chen@huawei.com
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
14
Message-id: 20200628203748.14250-3-peter.maydell@linaro.org
15
---
11
---
16
hw/arm/tosa.c | 88 +++++++++++++++++++++++++++++++++++++--------------
12
hw/timer/exynos4210_mct.c | 4 ++--
17
1 file changed, 64 insertions(+), 24 deletions(-)
13
hw/timer/exynos4210_pwm.c | 8 ++++----
14
2 files changed, 6 insertions(+), 6 deletions(-)
18
15
19
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
16
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
20
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
21
--- a/hw/arm/tosa.c
18
--- a/hw/timer/exynos4210_mct.c
22
+++ b/hw/arm/tosa.c
19
+++ b/hw/timer/exynos4210_mct.c
23
@@ -XXX,XX +XXX,XX @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
20
@@ -XXX,XX +XXX,XX @@ static void exynos4210_gcomp_raise_irq(void *opaque, uint32_t id)
24
pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
21
/* If CSTAT is pending and IRQ is enabled */
25
}
22
if ((s->reg.int_cstat & G_INT_CSTAT_COMP(id)) &&
26
23
(s->reg.int_enb & G_INT_ENABLE(id))) {
27
-static void tosa_out_switch(void *opaque, int line, int level)
24
- DPRINTF("gcmp timer[%d] IRQ\n", id);
28
+/*
25
+ DPRINTF("gcmp timer[%u] IRQ\n", id);
29
+ * Encapsulation of some GPIO line behaviour for the Tosa board
26
qemu_irq_raise(s->irq[id]);
30
+ *
31
+ * QEMU interface:
32
+ * + named GPIO inputs "leds[0..3]": assert to light LEDs
33
+ * + named GPIO input "reset": when asserted, resets the system
34
+ */
35
+
36
+#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
37
+#define TOSA_MISC_GPIO(obj) \
38
+ OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO)
39
+
40
+typedef struct TosaMiscGPIOState {
41
+ SysBusDevice parent_obj;
42
+} TosaMiscGPIOState;
43
+
44
+static void tosa_gpio_leds(void *opaque, int line, int level)
45
{
46
switch (line) {
47
- case 0:
48
- fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
49
- break;
50
- case 1:
51
- fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
52
- break;
53
- case 2:
54
- fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
55
- break;
56
- case 3:
57
- fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
58
- break;
59
- default:
60
- fprintf(stderr, "Uhandled out event: %d = %d\n", line, level);
61
- break;
62
+ case 0:
63
+ fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
64
+ break;
65
+ case 1:
66
+ fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
67
+ break;
68
+ case 2:
69
+ fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
70
+ break;
71
+ case 3:
72
+ fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
73
+ break;
74
+ default:
75
+ g_assert_not_reached();
76
}
27
}
77
}
28
}
78
29
@@ -XXX,XX +XXX,XX @@ static void exynos4210_mct_update_freq(Exynos4210MCTState *s)
79
@@ -XXX,XX +XXX,XX @@ static void tosa_reset(void *opaque, int line, int level)
30
MCT_CFG_GET_DIVIDER(s->reg_mct_cfg));
31
32
if (freq != s->freq) {
33
- DPRINTF("freq=%dHz\n", s->freq);
34
+ DPRINTF("freq=%uHz\n", s->freq);
35
36
/* global timer */
37
tx_ptimer_set_freq(s->g_timer.ptimer_frc, s->freq);
38
diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/timer/exynos4210_pwm.c
41
+++ b/hw/timer/exynos4210_pwm.c
42
@@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_update_freq(Exynos4210PWMState *s, uint32_t id)
43
44
if (freq != s->timer[id].freq) {
45
ptimer_set_freq(s->timer[id].ptimer, s->timer[id].freq);
46
- DPRINTF("freq=%dHz\n", s->timer[id].freq);
47
+ DPRINTF("freq=%uHz\n", s->timer[id].freq);
80
}
48
}
81
}
49
}
82
50
83
+static void tosa_misc_gpio_init(Object *obj)
51
@@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_tick(void *opaque)
84
+{
52
uint32_t id = s->id;
85
+ DeviceState *dev = DEVICE(obj);
53
bool cmp;
86
+
54
87
+ qdev_init_gpio_in_named(dev, tosa_gpio_leds, "leds", 4);
55
- DPRINTF("timer %d tick\n", id);
88
+ qdev_init_gpio_in_named(dev, tosa_reset, "reset", 1);
56
+ DPRINTF("timer %u tick\n", id);
89
+}
57
90
+
58
/* set irq status */
91
static void tosa_gpio_setup(PXA2xxState *cpu,
59
p->reg_tint_cstat |= TINT_CSTAT_STATUS(id);
92
DeviceState *scp0,
60
93
DeviceState *scp1,
61
/* raise IRQ */
94
TC6393xbState *tmio)
62
if (p->reg_tint_cstat & TINT_CSTAT_ENABLE(id)) {
95
{
63
- DPRINTF("timer %d IRQ\n", id);
96
- qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
64
+ DPRINTF("timer %u IRQ\n", id);
97
- qemu_irq reset;
65
qemu_irq_raise(p->timer[id].irq);
98
+ DeviceState *misc_gpio;
66
}
99
+
67
100
+ misc_gpio = sysbus_create_simple(TYPE_TOSA_MISC_GPIO, -1, NULL);
68
@@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_tick(void *opaque)
101
69
}
102
/* MMC/SD host */
70
103
pxa2xx_mmci_handlers(cpu->mmc,
71
if (cmp) {
104
@@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu,
72
- DPRINTF("auto reload timer %d count to %x\n", id,
105
qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT)));
73
+ DPRINTF("auto reload timer %u count to %x\n", id,
106
74
p->timer[id].reg_tcntb);
107
/* Handle reset */
75
ptimer_set_count(p->timer[id].ptimer, p->timer[id].reg_tcntb);
108
- reset = qemu_allocate_irq(tosa_reset, cpu, 0);
76
ptimer_run(p->timer[id].ptimer, 1);
109
- qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, reset);
110
+ qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET,
111
+ qdev_get_gpio_in_named(misc_gpio, "reset", 0));
112
113
/* PCMCIA signals: card's IRQ and Card-Detect */
114
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
115
@@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu,
116
qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ),
117
NULL);
118
119
- qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]);
120
- qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
121
- qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
122
- qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
123
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED,
124
+ qdev_get_gpio_in_named(misc_gpio, "leds", 0));
125
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED,
126
+ qdev_get_gpio_in_named(misc_gpio, "leds", 1));
127
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED,
128
+ qdev_get_gpio_in_named(misc_gpio, "leds", 2));
129
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED,
130
+ qdev_get_gpio_in_named(misc_gpio, "leds", 3));
131
132
qdev_connect_gpio_out(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio));
133
134
@@ -XXX,XX +XXX,XX @@ static const TypeInfo tosa_ssp_info = {
135
.class_init = tosa_ssp_class_init,
136
};
137
138
+static const TypeInfo tosa_misc_gpio_info = {
139
+ .name = "tosa-misc-gpio",
140
+ .parent = TYPE_SYS_BUS_DEVICE,
141
+ .instance_size = sizeof(TosaMiscGPIOState),
142
+ .instance_init = tosa_misc_gpio_init,
143
+ /*
144
+ * No class init required: device has no internal state so does not
145
+ * need to set up reset or vmstate, and has no realize method.
146
+ */
147
+};
148
+
149
static void tosa_register_types(void)
150
{
151
type_register_static(&tosa_dac_info);
152
type_register_static(&tosa_ssp_info);
153
+ type_register_static(&tosa_misc_gpio_info);
154
}
155
156
type_init(tosa_register_types)
157
--
77
--
158
2.20.1
78
2.20.1
159
79
160
80
diff view generated by jsdifflib
1
Remove hard-tabs from palm.c.
1
In commit 5edab03d4040 we added tracepoints to the ps2 keyboard
2
and mouse emulation. However we didn't remove all the debug-by-printf
3
support. In fact there is only one printf() remaining, and it is
4
redundant with the trace_ps2_write_mouse() event next to it.
5
Remove the printf() and the now-unused DEBUG* macros.
2
6
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Li Qiang <liq3ea@gmail.com>
8
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
6
Message-id: 20200628214230.2592-2-peter.maydell@linaro.org
10
Message-id: 20201101133258.4240-1-peter.maydell@linaro.org
7
---
11
---
8
hw/arm/palm.c | 64 +++++++++++++++++++++++++--------------------------
12
hw/input/ps2.c | 9 ---------
9
1 file changed, 32 insertions(+), 32 deletions(-)
13
1 file changed, 9 deletions(-)
10
14
11
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
15
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
12
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
13
--- a/hw/arm/palm.c
17
--- a/hw/input/ps2.c
14
+++ b/hw/arm/palm.c
18
+++ b/hw/input/ps2.c
15
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps static_ops = {
19
@@ -XXX,XX +XXX,XX @@
16
/* Palm Tunsgten|E support */
20
17
21
#include "trace.h"
18
/* Shared GPIOs */
22
19
-#define PALMTE_USBDETECT_GPIO    0
23
-/* debug PC keyboard */
20
-#define PALMTE_USB_OR_DC_GPIO    1
24
-//#define DEBUG_KBD
21
-#define PALMTE_TSC_GPIO        4
25
-
22
-#define PALMTE_PINTDAV_GPIO    6
26
-/* debug PC keyboard : only mouse */
23
-#define PALMTE_MMC_WP_GPIO    8
27
-//#define DEBUG_MOUSE
24
-#define PALMTE_MMC_POWER_GPIO    9
28
-
25
-#define PALMTE_HDQ_GPIO        11
29
/* Keyboard Commands */
26
-#define PALMTE_HEADPHONES_GPIO    14
30
#define KBD_CMD_SET_LEDS    0xED    /* Set keyboard leds */
27
-#define PALMTE_SPEAKER_GPIO    15
31
#define KBD_CMD_ECHO     0xEE
28
+#define PALMTE_USBDETECT_GPIO 0
32
@@ -XXX,XX +XXX,XX @@ void ps2_write_mouse(void *opaque, int val)
29
+#define PALMTE_USB_OR_DC_GPIO 1
33
PS2MouseState *s = (PS2MouseState *)opaque;
30
+#define PALMTE_TSC_GPIO 4
34
31
+#define PALMTE_PINTDAV_GPIO 6
35
trace_ps2_write_mouse(opaque, val);
32
+#define PALMTE_MMC_WP_GPIO 8
36
-#ifdef DEBUG_MOUSE
33
+#define PALMTE_MMC_POWER_GPIO 9
37
- printf("kbd: write mouse 0x%02x\n", val);
34
+#define PALMTE_HDQ_GPIO 11
38
-#endif
35
+#define PALMTE_HEADPHONES_GPIO 14
39
switch(s->common.write_cmd) {
36
+#define PALMTE_SPEAKER_GPIO 15
40
default:
37
/* MPU private GPIOs */
41
case -1:
38
-#define PALMTE_DC_GPIO        2
39
-#define PALMTE_MMC_SWITCH_GPIO    4
40
-#define PALMTE_MMC1_GPIO    6
41
-#define PALMTE_MMC2_GPIO    7
42
-#define PALMTE_MMC3_GPIO    11
43
+#define PALMTE_DC_GPIO 2
44
+#define PALMTE_MMC_SWITCH_GPIO 4
45
+#define PALMTE_MMC1_GPIO 6
46
+#define PALMTE_MMC2_GPIO 7
47
+#define PALMTE_MMC3_GPIO 11
48
49
static MouseTransformInfo palmte_pointercal = {
50
.x = 320,
51
@@ -XXX,XX +XXX,XX @@ static struct {
52
int column;
53
} palmte_keymap[0x80] = {
54
[0 ... 0x7f] = { -1, -1 },
55
- [0x3b] = { 0, 0 },    /* F1    -> Calendar */
56
- [0x3c] = { 1, 0 },    /* F2    -> Contacts */
57
- [0x3d] = { 2, 0 },    /* F3    -> Tasks List */
58
- [0x3e] = { 3, 0 },    /* F4    -> Note Pad */
59
- [0x01] = { 4, 0 },    /* Esc    -> Power */
60
- [0x4b] = { 0, 1 },    /*      Left */
61
- [0x50] = { 1, 1 },    /*      Down */
62
- [0x48] = { 2, 1 },    /*     Up */
63
- [0x4d] = { 3, 1 },    /*     Right */
64
- [0x4c] = { 4, 1 },    /*      Centre */
65
- [0x39] = { 4, 1 },    /* Spc    -> Centre */
66
+ [0x3b] = { 0, 0 }, /* F1 -> Calendar */
67
+ [0x3c] = { 1, 0 }, /* F2 -> Contacts */
68
+ [0x3d] = { 2, 0 }, /* F3 -> Tasks List */
69
+ [0x3e] = { 3, 0 }, /* F4 -> Note Pad */
70
+ [0x01] = { 4, 0 }, /* Esc -> Power */
71
+ [0x4b] = { 0, 1 }, /* Left */
72
+ [0x50] = { 1, 1 }, /* Down */
73
+ [0x48] = { 2, 1 }, /* Up */
74
+ [0x4d] = { 3, 1 }, /* Right */
75
+ [0x4c] = { 4, 1 }, /* Centre */
76
+ [0x39] = { 4, 1 }, /* Spc -> Centre */
77
};
78
79
static void palmte_button_event(void *opaque, int keycode)
80
@@ -XXX,XX +XXX,XX @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
81
[PALMTE_MMC_SWITCH_GPIO]));
82
83
misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
84
- qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,    misc_gpio[0]);
85
- qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,    misc_gpio[1]);
86
- qdev_connect_gpio_out(cpu->gpio, 11,            misc_gpio[2]);
87
- qdev_connect_gpio_out(cpu->gpio, 12,            misc_gpio[3]);
88
- qdev_connect_gpio_out(cpu->gpio, 13,            misc_gpio[4]);
89
- omap_mpuio_out_set(cpu->mpuio, 1,                misc_gpio[5]);
90
- omap_mpuio_out_set(cpu->mpuio, 3,                misc_gpio[6]);
91
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
92
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
93
+ qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
94
+ qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
95
+ qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
96
+ omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
97
+ omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
98
99
/* Reset some inputs to initial state. */
100
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
101
--
42
--
102
2.20.1
43
2.20.1
103
44
104
45
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
In the mtspr helper we attempt to check for "is the timer disabled"
2
with "if (env->ttmr & TIMER_NONE)". This is wrong because TIMER_NONE
3
is zero and the condition is always false (Coverity complains about
4
the dead code.)
2
5
3
Since added in commit 2bea128c3d, each SDHCI is wired with a SD
6
The correct check would be to test whether the TTMR_M field in the
4
card, using empty card when no block drive provided. This is not
7
register is equal to TIMER_NONE instead. However, the
5
the desired behavior. The SDHCI exposes a SD bus to plug cards
8
cpu_openrisc_timer_update() function checks whether the timer is
6
on, if no card available, it is fine to have an unplugged bus.
9
enabled (it looks at cpu->env.is_counting, which is set to 0 via
10
cpu_openrisc_count_stop() when the TTMR_M field is set to
11
TIMER_NONE), so there's no need to check for "timer disabled" in the
12
target/openrisc code. Instead, simply remove the dead code.
7
13
8
Avoid creating unnecessary SD card device when no block drive
14
Fixes: Coverity CID 1005812
9
provided.
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
Acked-by: Stafford Horne <shorne@gmail.com>
17
Message-id: 20201103114654.18540-1-peter.maydell@linaro.org
18
---
19
target/openrisc/sys_helper.c | 3 ---
20
1 file changed, 3 deletions(-)
10
21
11
Fixes: 2bea128c3d ("hw/sd/aspeed_sdhci: New device")
22
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
12
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
13
Message-id: 20200705173402.15620-1-f4bug@amsat.org
14
Reviewed-by: Cédric Le Goater <clg@kaod.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
17
hw/arm/aspeed.c | 9 +++++----
18
1 file changed, 5 insertions(+), 4 deletions(-)
19
20
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
21
index XXXXXXX..XXXXXXX 100644
23
index XXXXXXX..XXXXXXX 100644
22
--- a/hw/arm/aspeed.c
24
--- a/target/openrisc/sys_helper.c
23
+++ b/hw/arm/aspeed.c
25
+++ b/target/openrisc/sys_helper.c
24
@@ -XXX,XX +XXX,XX @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
26
@@ -XXX,XX +XXX,XX @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
25
{
27
26
DeviceState *card;
28
case TO_SPR(10, 1): /* TTCR */
27
29
cpu_openrisc_count_set(cpu, rb);
28
- card = qdev_new(TYPE_SD_CARD);
30
- if (env->ttmr & TIMER_NONE) {
29
- if (dinfo) {
31
- return;
30
- qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
32
- }
31
- &error_fatal);
33
cpu_openrisc_timer_update(cpu);
32
+ if (!dinfo) {
34
break;
33
+ return;
35
#endif
34
}
35
+ card = qdev_new(TYPE_SD_CARD);
36
+ qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
37
+ &error_fatal);
38
qdev_realize_and_unref(card,
39
qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
40
&error_fatal);
41
--
36
--
42
2.20.1
37
2.20.1
43
38
44
39
diff view generated by jsdifflib
1
From: Gerd Hoffmann <kraxel@redhat.com>
1
From: Alistair Francis <alistair.francis@wdc.com>
2
2
3
Given this isn't perforance critical at all lets avoid the non-portable
3
This patch fixes CID 1432800 by removing an unnecessary check.
4
d_type and use fstat instead to check whenever the file is a chardev.
5
4
6
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
5
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
7
Reported-by: David Carlier <devnexen@gmail.com>
8
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Message-id: 20200703145614.16684-10-peter.maydell@linaro.org
12
Message-id: 20200701180302.14821-1-kraxel@redhat.com
13
[PMM: fixed comment style; tweaked subject line]
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
8
---
17
util/drm.c | 19 ++++++++++++++-----
9
hw/core/register.c | 4 ----
18
1 file changed, 14 insertions(+), 5 deletions(-)
10
1 file changed, 4 deletions(-)
19
11
20
diff --git a/util/drm.c b/util/drm.c
12
diff --git a/hw/core/register.c b/hw/core/register.c
21
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
22
--- a/util/drm.c
14
--- a/hw/core/register.c
23
+++ b/util/drm.c
15
+++ b/hw/core/register.c
24
@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
16
@@ -XXX,XX +XXX,XX @@ static RegisterInfoArray *register_init_block(DeviceState *owner,
25
{
17
int index = rae[i].addr / data_size;
26
DIR *dir;
18
RegisterInfo *r = &ri[index];
27
struct dirent *e;
19
28
- int r, fd;
20
- if (data + data_size * index == 0 || !&rae[i]) {
29
+ struct stat st;
30
+ int r, fd, ret;
31
char *p;
32
33
if (rendernode) {
34
@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
35
36
fd = -1;
37
while ((e = readdir(dir))) {
38
- if (e->d_type != DT_CHR) {
39
- continue;
21
- continue;
40
- }
22
- }
41
-
23
-
42
if (strncmp(e->d_name, "renderD", 7)) {
24
/* Init the register, this will zero it. */
43
continue;
25
object_initialize((void *)r, sizeof(*r), TYPE_REGISTER);
44
}
26
45
@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
46
g_free(p);
47
continue;
48
}
49
+
50
+ /*
51
+ * prefer fstat() over checking e->d_type == DT_CHR for
52
+ * portability reasons
53
+ */
54
+ ret = fstat(r, &st);
55
+ if (ret < 0 || (st.st_mode & S_IFMT) != S_IFCHR) {
56
+ close(r);
57
+ g_free(p);
58
+ continue;
59
+ }
60
+
61
fd = r;
62
g_free(p);
63
break;
64
--
27
--
65
2.20.1
28
2.20.1
66
29
67
30
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
The 'cpu_type' has been moved from BCM283XState to BCM283XClass
3
Fix Coverity CID 1435957: Memory - illegal accesses (OVERRUN):
4
in commit 210f47840d, but we forgot to remove the old variable.
5
Do it now.
6
4
7
Fixes: 210f47840d ("hw/arm/bcm2836: Hardcode correct CPU type")
5
>>> Overrunning array "suffixes" of 7 8-byte elements at element
6
index 7 (byte offset 63) using index "idx" (which evaluates to 7).
7
8
Note, the biggest input value freq_to_str() can accept is UINT64_MAX,
9
which is ~18.446 EHz, less than 1000 EHz.
10
11
Reported-by: Eduardo Habkost <ehabkost@redhat.com>
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
12
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
13
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Message-id: 20200703200459.23294-1-f4bug@amsat.org
14
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
15
Reviewed-by: Luc Michel <luc@lmichel.fr>
16
Message-id: 20201101215755.2021421-1-f4bug@amsat.org
17
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
18
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
19
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
---
20
---
13
include/hw/arm/bcm2836.h | 1 -
21
util/cutils.c | 3 ++-
14
1 file changed, 1 deletion(-)
22
1 file changed, 2 insertions(+), 1 deletion(-)
15
23
16
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
24
diff --git a/util/cutils.c b/util/cutils.c
17
index XXXXXXX..XXXXXXX 100644
25
index XXXXXXX..XXXXXXX 100644
18
--- a/include/hw/arm/bcm2836.h
26
--- a/util/cutils.c
19
+++ b/include/hw/arm/bcm2836.h
27
+++ b/util/cutils.c
20
@@ -XXX,XX +XXX,XX @@ typedef struct BCM283XState {
28
@@ -XXX,XX +XXX,XX @@ char *freq_to_str(uint64_t freq_hz)
21
DeviceState parent_obj;
29
double freq = freq_hz;
22
/*< public >*/
30
size_t idx = 0;
23
31
24
- char *cpu_type;
32
- while (freq >= 1000.0 && idx < ARRAY_SIZE(suffixes)) {
25
uint32_t enabled_cpus;
33
+ while (freq >= 1000.0) {
26
34
freq /= 1000.0;
27
struct {
35
idx++;
36
}
37
+ assert(idx < ARRAY_SIZE(suffixes));
38
39
return g_strdup_printf("%0.3g %sHz", freq, suffixes[idx]);
40
}
28
--
41
--
29
2.20.1
42
2.20.1
30
43
31
44
diff view generated by jsdifflib
Deleted patch
1
From: Richard Henderson <richard.henderson@linaro.org>
2
1
3
The mtedesc that was constructed was not actually passed in.
4
Found by Coverity (CID 1429996).
5
6
Fixes: d28d12f008e
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Message-id: 20200706202345.193676-1-richard.henderson@linaro.org
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
12
target/arm/translate-sve.c | 2 +-
13
1 file changed, 1 insertion(+), 1 deletion(-)
14
15
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/target/arm/translate-sve.c
18
+++ b/target/arm/translate-sve.c
19
@@ -XXX,XX +XXX,XX @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
20
desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
21
desc <<= SVE_MTEDESC_SHIFT;
22
}
23
- desc = simd_desc(vsz, vsz, scale);
24
+ desc = simd_desc(vsz, vsz, desc | scale);
25
t_desc = tcg_const_i32(desc);
26
27
tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg));
28
--
29
2.20.1
30
31
diff view generated by jsdifflib
Deleted patch
1
From: Jean-Christophe Dubois <jcd@tribudubois.net>
2
1
3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
4
Message-id: 9f8923ecd974160ae8f634c275b1100c2cbe66d7.1593806826.git.jcd@tribudubois.net
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
[PMM: updated for object_property_set_uint() argument reordering]
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
9
include/hw/arm/fsl-imx25.h | 1 +
10
hw/arm/fsl-imx25.c | 7 +++++++
11
2 files changed, 8 insertions(+)
12
13
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/arm/fsl-imx25.h
16
+++ b/include/hw/arm/fsl-imx25.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX25State {
18
MemoryRegion rom[2];
19
MemoryRegion iram;
20
MemoryRegion iram_alias;
21
+ uint32_t phy_num;
22
} FslIMX25State;
23
24
/**
25
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/fsl-imx25.c
28
+++ b/hw/arm/fsl-imx25.c
29
@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
30
epit_table[i].irq));
31
}
32
33
+ object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err);
34
qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
35
36
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) {
37
@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
38
&s->iram_alias);
39
}
40
41
+static Property fsl_imx25_properties[] = {
42
+ DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
43
+ DEFINE_PROP_END_OF_LIST(),
44
+};
45
+
46
static void fsl_imx25_class_init(ObjectClass *oc, void *data)
47
{
48
DeviceClass *dc = DEVICE_CLASS(oc);
49
50
+ device_class_set_props(dc, fsl_imx25_properties);
51
dc->realize = fsl_imx25_realize;
52
dc->desc = "i.MX25 SOC";
53
/*
54
--
55
2.20.1
56
57
diff view generated by jsdifflib
Deleted patch
1
From: Jean-Christophe Dubois <jcd@tribudubois.net>
2
1
3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
4
Message-id: 05a64e83eb1c0c865ac077b22c599425c024c02c.1593806826.git.jcd@tribudubois.net
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
[PMM: updated for object_property_set_uint() argument reordering]
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
9
include/hw/arm/fsl-imx6.h | 1 +
10
hw/arm/fsl-imx6.c | 7 +++++++
11
2 files changed, 8 insertions(+)
12
13
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/arm/fsl-imx6.h
16
+++ b/include/hw/arm/fsl-imx6.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State {
18
MemoryRegion caam;
19
MemoryRegion ocram;
20
MemoryRegion ocram_alias;
21
+ uint32_t phy_num;
22
} FslIMX6State;
23
24
25
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/fsl-imx6.c
28
+++ b/hw/arm/fsl-imx6.c
29
@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
30
spi_table[i].irq));
31
}
32
33
+ object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err);
34
qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
35
if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) {
36
return;
37
@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
38
&s->ocram_alias);
39
}
40
41
+static Property fsl_imx6_properties[] = {
42
+ DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
43
+ DEFINE_PROP_END_OF_LIST(),
44
+};
45
+
46
static void fsl_imx6_class_init(ObjectClass *oc, void *data)
47
{
48
DeviceClass *dc = DEVICE_CLASS(oc);
49
50
+ device_class_set_props(dc, fsl_imx6_properties);
51
dc->realize = fsl_imx6_realize;
52
dc->desc = "i.MX6 SOC";
53
/* Reason: Uses serial_hd() in the realize() function */
54
--
55
2.20.1
56
57
diff view generated by jsdifflib
Deleted patch
1
From: Jean-Christophe Dubois <jcd@tribudubois.net>
2
1
3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
4
Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
[PMM: updated for object_property_set_uint() argument reordering]
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
9
include/hw/arm/fsl-imx7.h | 1 +
10
hw/arm/fsl-imx7.c | 9 +++++++++
11
2 files changed, 10 insertions(+)
12
13
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/arm/fsl-imx7.h
16
+++ b/include/hw/arm/fsl-imx7.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX7State {
18
IMX7GPRState gpr;
19
ChipideaState usb[FSL_IMX7_NUM_USBS];
20
DesignwarePCIEHost pcie;
21
+ uint32_t phy_num[FSL_IMX7_NUM_ETHS];
22
} FslIMX7State;
23
24
enum FslIMX7MemoryMap {
25
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/fsl-imx7.c
28
+++ b/hw/arm/fsl-imx7.c
29
@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
30
FSL_IMX7_ENET2_ADDR,
31
};
32
33
+ object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
34
+ s->phy_num[i], &error_abort);
35
object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
36
FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
37
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
38
@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
39
FSL_IMX7_PCIE_PHY_SIZE);
40
}
41
42
+static Property fsl_imx7_properties[] = {
43
+ DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
44
+ DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
45
+ DEFINE_PROP_END_OF_LIST(),
46
+};
47
+
48
static void fsl_imx7_class_init(ObjectClass *oc, void *data)
49
{
50
DeviceClass *dc = DEVICE_CLASS(oc);
51
52
+ device_class_set_props(dc, fsl_imx7_properties);
53
dc->realize = fsl_imx7_realize;
54
55
/* Reason: Uses serial_hds and nd_table in realize() directly */
56
--
57
2.20.1
58
59
diff view generated by jsdifflib
Deleted patch
1
From: Aaron Lindsay <aaron@os.amperecomputing.com>
2
1
3
Raw writes to this register when in KVM mode can cause interrupts to be
4
raised (even when the PMU is disabled). Because the underlying state is
5
already aliased to PMINTENSET (which already provides raw write
6
functions), we can safely disable raw accesses to PMINTENCLR entirely.
7
8
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
9
Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
---
13
target/arm/helper.c | 4 ++--
14
1 file changed, 2 insertions(+), 2 deletions(-)
15
16
diff --git a/target/arm/helper.c b/target/arm/helper.c
17
index XXXXXXX..XXXXXXX 100644
18
--- a/target/arm/helper.c
19
+++ b/target/arm/helper.c
20
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
21
.resetvalue = 0x0 },
22
{ .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,
23
.access = PL1_RW, .accessfn = access_tpm,
24
- .type = ARM_CP_ALIAS | ARM_CP_IO,
25
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
26
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
27
.writefn = pmintenclr_write, },
28
{ .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
29
.opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
30
.access = PL1_RW, .accessfn = access_tpm,
31
- .type = ARM_CP_ALIAS | ARM_CP_IO,
32
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
33
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
34
.writefn = pmintenclr_write },
35
{ .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
36
--
37
2.20.1
38
39
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Tell Haiku to provide various BSD functions by setting BSD_SOURCE
4
and linking libbsd.
5
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Message-id: 20200703145614.16684-2-peter.maydell@linaro.org
10
[PMM: expanded commit message]
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
14
configure | 4 ++--
15
1 file changed, 2 insertions(+), 2 deletions(-)
16
17
diff --git a/configure b/configure
18
index XXXXXXX..XXXXXXX 100755
19
--- a/configure
20
+++ b/configure
21
@@ -XXX,XX +XXX,XX @@ SunOS)
22
;;
23
Haiku)
24
haiku="yes"
25
- QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS $QEMU_CFLAGS"
26
- LIBS="-lposix_error_mapper -lnetwork $LIBS"
27
+ QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS -DBSD_SOURCE $QEMU_CFLAGS"
28
+ LIBS="-lposix_error_mapper -lnetwork -lbsd $LIBS"
29
;;
30
Linux)
31
audio_drv_list="try-pa oss"
32
--
33
2.20.1
34
35
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Instead of using an OS-specific ifdef test to select the "openpty()
4
is in pty.h" codepath, make configure check for the existence of
5
the header and use the new CONFIG_PTY instead.
6
7
This is necessary to build on Haiku, which also provides openpty()
8
via pty.h.
9
10
Signed-off-by: David Carlier <devnexen@gmail.com>
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Message-id: 20200703145614.16684-3-peter.maydell@linaro.org
14
[PMM: Expanded commit message; rename to HAVE_PTY_H]
15
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
16
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
17
---
18
configure | 9 +++++++++
19
util/qemu-openpty.c | 2 +-
20
2 files changed, 10 insertions(+), 1 deletion(-)
21
22
diff --git a/configure b/configure
23
index XXXXXXX..XXXXXXX 100755
24
--- a/configure
25
+++ b/configure
26
@@ -XXX,XX +XXX,XX @@ else
27
l2tpv3=no
28
fi
29
30
+if check_include "pty.h" ; then
31
+ pty_h=yes
32
+else
33
+ pty_h=no
34
+fi
35
+
36
#########################################
37
# vhost interdependencies and host support
38
39
@@ -XXX,XX +XXX,XX @@ fi
40
if test "$sheepdog" = "yes" ; then
41
echo "CONFIG_SHEEPDOG=y" >> $config_host_mak
42
fi
43
+if test "$pty_h" = "yes" ; then
44
+ echo "HAVE_PTY_H=y" >> $config_host_mak
45
+fi
46
if test "$fuzzing" = "yes" ; then
47
if test "$have_fuzzer" = "yes"; then
48
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
49
diff --git a/util/qemu-openpty.c b/util/qemu-openpty.c
50
index XXXXXXX..XXXXXXX 100644
51
--- a/util/qemu-openpty.c
52
+++ b/util/qemu-openpty.c
53
@@ -XXX,XX +XXX,XX @@
54
#include "qemu/osdep.h"
55
#include "qemu-common.h"
56
57
-#if defined(__GLIBC__)
58
+#if defined HAVE_PTY_H
59
# include <pty.h>
60
#elif defined CONFIG_BSD
61
# include <termios.h>
62
--
63
2.20.1
64
65
diff view generated by jsdifflib
1
From: David CARLIER <devnexen@gmail.com>
1
In commit 76346b6264a9b01979 we tried to add a configure check that
2
the libgio pkg-config data was correct, which builds an executable
3
linked against it. Unfortunately this doesn't catch the problem
4
(missing static library dependency info), because a "do nothing" test
5
source file doesn't have any symbol references that cause the linker
6
to pull in .o files from libgio.a, and so we don't see the "missing
7
symbols from libmount" error that a full QEMU link triggers.
2
8
3
Instead of assuming that all POSIX platforms provide mlockall(),
9
(The ineffective test went unnoticed because of a typo that
4
test for it in configure. If the host doesn't provide this platform
10
effectively disabled libgio unconditionally, but after commit
5
then os_mlock() will fail -ENOSYS, as it does already on Windows.
11
3569a5dfc11f2 fixed that, a static link of the system emulator on
12
Ubuntu stopped working again.)
6
13
7
This is necessary for Haiku, which does not have mlockall().
14
Improve the gio test by having the test source fragment reference a
15
g_dbus function (which is what is indirectly causing us to end up
16
wanting functions from libmount).
8
17
9
Signed-off-by: David Carlier <devnexen@gmail.com>
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
18
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
Message-id: 20200703145614.16684-4-peter.maydell@linaro.org
19
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
13
[PMM: Expanded commit message; rename to HAVE_MLOCKALL]
20
Message-id: 20201116104617.18333-1-peter.maydell@linaro.org
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
21
---
17
configure | 15 +++++++++++++++
22
configure | 11 +++++++++--
18
os-posix.c | 4 ++++
23
1 file changed, 9 insertions(+), 2 deletions(-)
19
2 files changed, 19 insertions(+)
20
24
21
diff --git a/configure b/configure
25
diff --git a/configure b/configure
22
index XXXXXXX..XXXXXXX 100755
26
index XXXXXXX..XXXXXXX 100755
23
--- a/configure
27
--- a/configure
24
+++ b/configure
28
+++ b/configure
25
@@ -XXX,XX +XXX,XX @@ else
29
@@ -XXX,XX +XXX,XX @@ if $pkg_config --atleast-version=$glib_req_ver gio-2.0; then
26
pty_h=no
30
# Check that the libraries actually work -- Ubuntu 18.04 ships
27
fi
31
# with pkg-config --static --libs data for gio-2.0 that is missing
28
32
# -lblkid and will give a link error.
29
+cat > $TMPC <<EOF
33
- write_c_skeleton
30
+#include <sys/mman.h>
34
- if compile_prog "" "$gio_libs" ; then
31
+int main(int argc, char *argv[]) {
35
+ cat > $TMPC <<EOF
32
+ return mlockall(MCL_FUTURE);
36
+#include <gio/gio.h>
37
+int main(void)
38
+{
39
+ g_dbus_proxy_new_sync(0, 0, 0, 0, 0, 0, 0, 0);
40
+ return 0;
33
+}
41
+}
34
+EOF
42
+EOF
35
+if compile_prog "" "" ; then
43
+ if compile_prog "$gio_cflags" "$gio_libs" ; then
36
+ have_mlockall=yes
44
gio=yes
37
+else
45
else
38
+ have_mlockall=no
46
gio=no
39
+fi
40
+
41
#########################################
42
# vhost interdependencies and host support
43
44
@@ -XXX,XX +XXX,XX @@ fi
45
if test "$pty_h" = "yes" ; then
46
echo "HAVE_PTY_H=y" >> $config_host_mak
47
fi
48
+if test "$have_mlockall" = "yes" ; then
49
+ echo "HAVE_MLOCKALL=y" >> $config_host_mak
50
+fi
51
if test "$fuzzing" = "yes" ; then
52
if test "$have_fuzzer" = "yes"; then
53
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
54
diff --git a/os-posix.c b/os-posix.c
55
index XXXXXXX..XXXXXXX 100644
56
--- a/os-posix.c
57
+++ b/os-posix.c
58
@@ -XXX,XX +XXX,XX @@ bool is_daemonized(void)
59
60
int os_mlock(void)
61
{
62
+#ifdef HAVE_MLOCKALL
63
int ret = 0;
64
65
ret = mlockall(MCL_CURRENT | MCL_FUTURE);
66
@@ -XXX,XX +XXX,XX @@ int os_mlock(void)
67
}
68
69
return ret;
70
+#else
71
+ return -ENOSYS;
72
+#endif
73
}
74
--
47
--
75
2.20.1
48
2.20.1
76
49
77
50
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Regularize our handling of <sys/signal.h>: currently we include it in
4
osdep.h, but only for OpenBSD, and we include it without an ifdef
5
guard in a couple of C files. This causes problems for Haiku, which
6
doesn't have that header.
7
8
Instead, check in configure whether sys/signal.h exists, and if it
9
does then always include it from osdep.h.
10
11
Signed-off-by: David Carlier <devnexen@gmail.com>
12
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
13
Reviewed-by: Thomas Huth <thuth@redhat.com>
14
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
Message-id: 20200703145614.16684-5-peter.maydell@linaro.org
17
[PMM: Expanded commit message; rename to HAVE_SYS_SIGNAL_H]
18
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
19
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20
---
21
configure | 10 ++++++++++
22
include/qemu/osdep.h | 2 +-
23
hw/xen/xen-legacy-backend.c | 1 -
24
util/oslib-posix.c | 1 -
25
4 files changed, 11 insertions(+), 3 deletions(-)
26
27
diff --git a/configure b/configure
28
index XXXXXXX..XXXXXXX 100755
29
--- a/configure
30
+++ b/configure
31
@@ -XXX,XX +XXX,XX @@ if check_include "libdrm/drm.h" ; then
32
have_drm_h=yes
33
fi
34
35
+#########################################
36
+# sys/signal.h check
37
+have_sys_signal_h=no
38
+if check_include "sys/signal.h" ; then
39
+ have_sys_signal_h=yes
40
+fi
41
+
42
##########################################
43
# VTE probe
44
45
@@ -XXX,XX +XXX,XX @@ fi
46
if test "$have_openpty" = "yes" ; then
47
echo "HAVE_OPENPTY=y" >> $config_host_mak
48
fi
49
+if test "$have_sys_signal_h" = "yes" ; then
50
+ echo "HAVE_SYS_SIGNAL_H=y" >> $config_host_mak
51
+fi
52
53
# Work around a system header bug with some kernel/XFS header
54
# versions where they both try to define 'struct fsxattr':
55
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
56
index XXXXXXX..XXXXXXX 100644
57
--- a/include/qemu/osdep.h
58
+++ b/include/qemu/osdep.h
59
@@ -XXX,XX +XXX,XX @@ extern int daemon(int, int);
60
#include <setjmp.h>
61
#include <signal.h>
62
63
-#ifdef __OpenBSD__
64
+#ifdef HAVE_SYS_SIGNAL_H
65
#include <sys/signal.h>
66
#endif
67
68
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
69
index XXXXXXX..XXXXXXX 100644
70
--- a/hw/xen/xen-legacy-backend.c
71
+++ b/hw/xen/xen-legacy-backend.c
72
@@ -XXX,XX +XXX,XX @@
73
*/
74
75
#include "qemu/osdep.h"
76
-#include <sys/signal.h>
77
78
#include "hw/sysbus.h"
79
#include "hw/boards.h"
80
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
81
index XXXXXXX..XXXXXXX 100644
82
--- a/util/oslib-posix.c
83
+++ b/util/oslib-posix.c
84
@@ -XXX,XX +XXX,XX @@
85
#include "qemu/sockets.h"
86
#include "qemu/thread.h"
87
#include <libgen.h>
88
-#include <sys/signal.h>
89
#include "qemu/cutils.h"
90
91
#ifdef CONFIG_LINUX
92
--
93
2.20.1
94
95
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Haiku doesn't provide SIGIO; fix this up in osdep.h by defining it as
4
equal to SIGPOLL.
5
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Thomas Huth <thuth@redhat.com>
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Message-id: 20200703145614.16684-6-peter.maydell@linaro.org
11
[PMM: Expanded commit message]
12
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
14
---
15
include/qemu/osdep.h | 4 ++++
16
1 file changed, 4 insertions(+)
17
18
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
19
index XXXXXXX..XXXXXXX 100644
20
--- a/include/qemu/osdep.h
21
+++ b/include/qemu/osdep.h
22
@@ -XXX,XX +XXX,XX @@ void qemu_anon_ram_free(void *ptr, size_t size);
23
#define HAVE_CHARDEV_PARPORT 1
24
#endif
25
26
+#if defined(__HAIKU__)
27
+#define SIGIO SIGPOLL
28
+#endif
29
+
30
#if defined(CONFIG_LINUX)
31
#ifndef BUS_MCEERR_AR
32
#define BUS_MCEERR_AR 4
33
--
34
2.20.1
35
36
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Haiku puts the bswap* functions in <endian.h>; pull in that
4
include file on that platform.
5
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Thomas Huth <thuth@redhat.com>
9
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Message-id: 20200703145614.16684-7-peter.maydell@linaro.org
12
[PMM: Expanded commit message]
13
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
14
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
15
---
16
include/qemu/bswap.h | 2 ++
17
1 file changed, 2 insertions(+)
18
19
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
20
index XXXXXXX..XXXXXXX 100644
21
--- a/include/qemu/bswap.h
22
+++ b/include/qemu/bswap.h
23
@@ -XXX,XX +XXX,XX @@
24
# include <machine/bswap.h>
25
#elif defined(__FreeBSD__)
26
# include <sys/endian.h>
27
+#elif defined(__HAIKU__)
28
+# include <endian.h>
29
#elif defined(CONFIG_BYTESWAP_H)
30
# include <byteswap.h>
31
32
--
33
2.20.1
34
35
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
util/compatfd.c includes <sys/syscall.h> so that the CONFIG_SIGNALFD
4
code can use SYS_signalfd. Guard the #include with CONFIG_SIGNALFD
5
to avoid portability issues on hosts like Haiku which do not
6
provide that header file.
7
8
Signed-off-by: David Carlier <devnexen@gmail.com>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Reviewed-by: Thomas Huth <thuth@redhat.com>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
Message-id: 20200703145614.16684-8-peter.maydell@linaro.org
13
[PMM: Expanded commit message]
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
17
util/compatfd.c | 2 ++
18
1 file changed, 2 insertions(+)
19
20
diff --git a/util/compatfd.c b/util/compatfd.c
21
index XXXXXXX..XXXXXXX 100644
22
--- a/util/compatfd.c
23
+++ b/util/compatfd.c
24
@@ -XXX,XX +XXX,XX @@
25
#include "qemu/osdep.h"
26
#include "qemu/thread.h"
27
28
+#if defined(CONFIG_SIGNALFD)
29
#include <sys/syscall.h>
30
+#endif
31
32
struct sigfd_compat_info
33
{
34
--
35
2.20.1
36
37
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
The qemu_init_exec_dir() function is inherently non-portable;
4
provide an implementation for Haiku hosts.
5
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Message-id: 20200703145614.16684-9-peter.maydell@linaro.org
10
[PMM: Expanded commit message]
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
14
util/oslib-posix.c | 19 +++++++++++++++++++
15
1 file changed, 19 insertions(+)
16
17
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
18
index XXXXXXX..XXXXXXX 100644
19
--- a/util/oslib-posix.c
20
+++ b/util/oslib-posix.c
21
@@ -XXX,XX +XXX,XX @@
22
#include <mach-o/dyld.h>
23
#endif
24
25
+#ifdef __HAIKU__
26
+#include <kernel/image.h>
27
+#endif
28
+
29
#include "qemu/mmap-alloc.h"
30
31
#ifdef CONFIG_DEBUG_STACK_USAGE
32
@@ -XXX,XX +XXX,XX @@ void qemu_init_exec_dir(const char *argv0)
33
}
34
}
35
}
36
+#elif defined(__HAIKU__)
37
+ {
38
+ image_info ii;
39
+ int32_t c = 0;
40
+
41
+ *buf = '\0';
42
+ while (get_next_image_info(0, &c, &ii) == B_OK) {
43
+ if (ii.type == B_APP_IMAGE) {
44
+ strncpy(buf, ii.name, sizeof(buf));
45
+ buf[sizeof(buf) - 1] = 0;
46
+ p = buf;
47
+ break;
48
+ }
49
+ }
50
+ }
51
#endif
52
/* If we don't have any way of figuring out the actual executable
53
location then try argv[0]. */
54
--
55
2.20.1
56
57
diff view generated by jsdifflib
Deleted patch
1
From: Wentong Wu <wentong.wu@intel.com>
2
1
3
Add DISAS_NORETURN case for nothing more to generate because at runtime
4
execution will never return from some helper call. And at the same time
5
replace DISAS_UPDATE in t_gen_helper_raise_exception and gen_exception
6
with the newly added DISAS_NORETURN.
7
8
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
9
Message-id: 20200710233433.19729-1-wentong.wu@intel.com
10
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
---
13
target/nios2/translate.c | 5 +++--
14
1 file changed, 3 insertions(+), 2 deletions(-)
15
16
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
17
index XXXXXXX..XXXXXXX 100644
18
--- a/target/nios2/translate.c
19
+++ b/target/nios2/translate.c
20
@@ -XXX,XX +XXX,XX @@ static void t_gen_helper_raise_exception(DisasContext *dc,
21
tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc);
22
gen_helper_raise_exception(dc->cpu_env, tmp);
23
tcg_temp_free_i32(tmp);
24
- dc->is_jmp = DISAS_UPDATE;
25
+ dc->is_jmp = DISAS_NORETURN;
26
}
27
28
static bool use_goto_tb(DisasContext *dc, uint32_t dest)
29
@@ -XXX,XX +XXX,XX @@ static void gen_exception(DisasContext *dc, uint32_t excp)
30
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
31
gen_helper_raise_exception(cpu_env, tmp);
32
tcg_temp_free_i32(tmp);
33
- dc->is_jmp = DISAS_UPDATE;
34
+ dc->is_jmp = DISAS_NORETURN;
35
}
36
37
/* generate intermediate code for basic block 'tb'. */
38
@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
39
tcg_gen_exit_tb(NULL, 0);
40
break;
41
42
+ case DISAS_NORETURN:
43
case DISAS_TB_JUMP:
44
/* nothing more to generate */
45
break;
46
--
47
2.20.1
48
49
diff view generated by jsdifflib
Deleted patch
1
From: Wentong Wu <wentong.wu@intel.com>
2
1
3
In line the semantics of DISAS_UPDATE on nios2 target with other targets
4
which is to explicitly write the PC back into the cpu state before doing
5
a tcg_gen_exit_tb().
6
7
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
8
Message-id: 20200710233433.19729-2-wentong.wu@intel.com
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
12
target/nios2/translate.c | 2 +-
13
1 file changed, 1 insertion(+), 1 deletion(-)
14
15
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/target/nios2/translate.c
18
+++ b/target/nios2/translate.c
19
@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
20
/* Indicate where the next block should start */
21
switch (dc->is_jmp) {
22
case DISAS_NEXT:
23
+ case DISAS_UPDATE:
24
/* Save the current PC back into the CPU register */
25
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
26
tcg_gen_exit_tb(NULL, 0);
27
@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
28
29
default:
30
case DISAS_JUMP:
31
- case DISAS_UPDATE:
32
/* The jump will already have updated the PC register */
33
tcg_gen_exit_tb(NULL, 0);
34
break;
35
--
36
2.20.1
37
38
diff view generated by jsdifflib
Deleted patch
1
From: Wentong Wu <wentong.wu@intel.com>
2
1
3
wrctl instruction on nios2 target will cause checking cpu
4
interrupt but tcg_handle_interrupt() will call cpu_abort()
5
if the CPU gets an interrupt while it's not in 'can do IO'
6
state, so add gen_io_start around wrctl instruction. Also
7
at the same time, end the onging TB with DISAS_UPDATE.
8
9
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
10
Message-id: 20200710233433.19729-3-wentong.wu@intel.com
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
14
target/nios2/translate.c | 5 +++++
15
1 file changed, 5 insertions(+)
16
17
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
18
index XXXXXXX..XXXXXXX 100644
19
--- a/target/nios2/translate.c
20
+++ b/target/nios2/translate.c
21
@@ -XXX,XX +XXX,XX @@
22
#include "exec/cpu_ldst.h"
23
#include "exec/translator.h"
24
#include "qemu/qemu-print.h"
25
+#include "exec/gen-icount.h"
26
27
/* is_jmp field values */
28
#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
29
@@ -XXX,XX +XXX,XX @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags)
30
/* If interrupts were enabled using WRCTL, trigger them. */
31
#if !defined(CONFIG_USER_ONLY)
32
if ((instr.imm5 + CR_BASE) == CR_STATUS) {
33
+ if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
34
+ gen_io_start();
35
+ }
36
gen_helper_check_interrupts(dc->cpu_env);
37
+ dc->is_jmp = DISAS_UPDATE;
38
}
39
#endif
40
}
41
--
42
2.20.1
43
44
diff view generated by jsdifflib
Deleted patch
1
From: Wentong Wu <wentong.wu@intel.com>
2
1
3
Only when guest code is unmasking interrupts, terminate the excution
4
of translated code and exit to the main CPU loop to handle previous
5
pended interrupts because of the interrupts mask by guest code.
6
7
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
8
Message-id: 20200710233433.19729-4-wentong.wu@intel.com
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
12
hw/nios2/cpu_pic.c | 3 ++-
13
1 file changed, 2 insertions(+), 1 deletion(-)
14
15
diff --git a/hw/nios2/cpu_pic.c b/hw/nios2/cpu_pic.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/hw/nios2/cpu_pic.c
18
+++ b/hw/nios2/cpu_pic.c
19
@@ -XXX,XX +XXX,XX @@ static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
20
21
void nios2_check_interrupts(CPUNios2State *env)
22
{
23
- if (env->irq_pending) {
24
+ if (env->irq_pending &&
25
+ (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
26
env->irq_pending = 0;
27
cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
28
}
29
--
30
2.20.1
31
32
diff view generated by jsdifflib
1
Remove the hardcoded tabs from hw/arm/tosa.c. There aren't
1
The TMP105 datasheet (https://www.ti.com/lit/gpn/tmp105) says that the
2
many, but since they're all in constant #defines they're not
2
power-up reset values for the T_low and T_high registers are 80 degrees C
3
going to go away with our usual "only when we touch a function"
3
and 75 degrees C, which are 0x500 and 0x4B0 hex according to table 5. These
4
policy on reformatting.
4
values are then shifted right by four bits to give the register reset
5
values, since both registers store the 12 bits of temperature data in bits
6
[15..4] of a 16 bit register.
7
8
We were resetting these registers to zero, which is problematic for Linux
9
guests which enable the alert interrupt and then immediately take an
10
unexpected overtemperature alert because the current temperature is above
11
freezing...
5
12
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
14
Reviewed-by: Cédric Le Goater <clg@kaod.org>
8
Message-id: 20200628203748.14250-2-peter.maydell@linaro.org
15
Message-id: 20201110150023.25533-2-peter.maydell@linaro.org
9
---
16
---
10
hw/arm/tosa.c | 44 ++++++++++++++++++++++----------------------
17
hw/misc/tmp105.c | 3 +++
11
1 file changed, 22 insertions(+), 22 deletions(-)
18
1 file changed, 3 insertions(+)
12
19
13
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
20
diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c
14
index XXXXXXX..XXXXXXX 100644
21
index XXXXXXX..XXXXXXX 100644
15
--- a/hw/arm/tosa.c
22
--- a/hw/misc/tmp105.c
16
+++ b/hw/arm/tosa.c
23
+++ b/hw/misc/tmp105.c
17
@@ -XXX,XX +XXX,XX @@
24
@@ -XXX,XX +XXX,XX @@ static void tmp105_reset(I2CSlave *i2c)
18
#include "hw/sysbus.h"
25
s->faults = tmp105_faultq[(s->config >> 3) & 3];
19
#include "exec/address-spaces.h"
26
s->alarm = 0;
20
27
21
-#define TOSA_RAM 0x04000000
28
+ s->limit[0] = 0x4b00; /* T_LOW, 75 degrees C */
22
-#define TOSA_ROM    0x00800000
29
+ s->limit[1] = 0x5000; /* T_HIGH, 80 degrees C */
23
+#define TOSA_RAM 0x04000000
30
+
24
+#define TOSA_ROM 0x00800000
31
tmp105_interrupt_update(s);
25
32
}
26
-#define TOSA_GPIO_USB_IN        (5)
33
27
-#define TOSA_GPIO_nSD_DETECT    (9)
28
-#define TOSA_GPIO_ON_RESET        (19)
29
-#define TOSA_GPIO_CF_IRQ        (21)    /* CF slot0 Ready */
30
-#define TOSA_GPIO_CF_CD            (13)
31
-#define TOSA_GPIO_TC6393XB_INT (15)
32
-#define TOSA_GPIO_JC_CF_IRQ        (36)    /* CF slot1 Ready */
33
+#define TOSA_GPIO_USB_IN (5)
34
+#define TOSA_GPIO_nSD_DETECT (9)
35
+#define TOSA_GPIO_ON_RESET (19)
36
+#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
37
+#define TOSA_GPIO_CF_CD (13)
38
+#define TOSA_GPIO_TC6393XB_INT (15)
39
+#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
40
41
-#define TOSA_SCOOP_GPIO_BASE    1
42
-#define TOSA_GPIO_IR_POWERDWN    (TOSA_SCOOP_GPIO_BASE + 2)
43
-#define TOSA_GPIO_SD_WP            (TOSA_SCOOP_GPIO_BASE + 3)
44
-#define TOSA_GPIO_PWR_ON        (TOSA_SCOOP_GPIO_BASE + 4)
45
+#define TOSA_SCOOP_GPIO_BASE 1
46
+#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
47
+#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
48
+#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
49
50
-#define TOSA_SCOOP_JC_GPIO_BASE        1
51
-#define TOSA_GPIO_BT_LED        (TOSA_SCOOP_JC_GPIO_BASE + 0)
52
-#define TOSA_GPIO_NOTE_LED        (TOSA_SCOOP_JC_GPIO_BASE + 1)
53
-#define TOSA_GPIO_CHRG_ERR_LED        (TOSA_SCOOP_JC_GPIO_BASE + 2)
54
-#define TOSA_GPIO_TC6393XB_L3V_ON    (TOSA_SCOOP_JC_GPIO_BASE + 5)
55
-#define TOSA_GPIO_WLAN_LED        (TOSA_SCOOP_JC_GPIO_BASE + 7)
56
+#define TOSA_SCOOP_JC_GPIO_BASE 1
57
+#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
58
+#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
59
+#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
60
+#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
61
+#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
62
63
-#define    DAC_BASE    0x4e
64
-#define DAC_CH1        0
65
-#define DAC_CH2        1
66
+#define DAC_BASE 0x4e
67
+#define DAC_CH1 0
68
+#define DAC_CH2 1
69
70
static void tosa_microdrive_attach(PXA2xxState *cpu)
71
{
72
--
34
--
73
2.20.1
35
2.20.1
74
36
75
37
diff view generated by jsdifflib
1
Replace the free-floating set of IRQs and palmte_onoff_gpios()
1
The TMP105 datasheet says that in Interrupt Mode (when TM==1) the device
2
function with a simple QOM device that encapsulates this
2
signals an alert when the temperature equals or exceeds the T_high value and
3
behaviour.
3
then remains high until a device register is read or the device responds to
4
the SMBUS Alert Response address, or the device is put into Shutdown Mode.
5
Thereafter the Alert pin will only be re-signalled when temperature falls
6
below T_low; alert can then be cleared in the same set of ways, and the
7
device returns to its initial "alert when temperature goes above T_high"
8
mode. (If this textual description is confusing, see figure 3 in the
9
TI datasheet at https://www.ti.com/lit/gpn/tmp105 .)
4
10
5
This fixes Coverity issue CID 1421944, which points out that
11
We were misimplementing this as a simple "always alert if temperature is
6
the memory returned by qemu_allocate_irqs() is leaked.
12
above T_high or below T_low" condition, which gives a spurious alert on
13
startup if using the "T_high = 80 degrees C, T_low = 75 degrees C" reset
14
limit values.
15
16
Implement the correct (hysteresis) behaviour by tracking whether we
17
are currently looking for the temperature to rise over T_high or
18
for it to fall below T_low. Our implementation of the comparator
19
mode (TM==0) wasn't wrong, but rephrase it to match the way that
20
interrupt mode is now handled for clarity.
7
21
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
22
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Reviewed-by: Li Qiang <liq3ea@gmail.com>
23
Reviewed-by: Cédric Le Goater <clg@kaod.org>
10
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
24
Message-id: 20201110150023.25533-3-peter.maydell@linaro.org
11
Message-id: 20200628214230.2592-3-peter.maydell@linaro.org
12
---
25
---
13
hw/arm/palm.c | 61 +++++++++++++++++++++++++++++++++++++++++++--------
26
hw/misc/tmp105.h | 7 +++++
14
1 file changed, 52 insertions(+), 9 deletions(-)
27
hw/misc/tmp105.c | 70 +++++++++++++++++++++++++++++++++++++++++-------
28
2 files changed, 68 insertions(+), 9 deletions(-)
15
29
16
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
30
diff --git a/hw/misc/tmp105.h b/hw/misc/tmp105.h
17
index XXXXXXX..XXXXXXX 100644
31
index XXXXXXX..XXXXXXX 100644
18
--- a/hw/arm/palm.c
32
--- a/hw/misc/tmp105.h
19
+++ b/hw/arm/palm.c
33
+++ b/hw/misc/tmp105.h
20
@@ -XXX,XX +XXX,XX @@ static void palmte_button_event(void *opaque, int keycode)
34
@@ -XXX,XX +XXX,XX @@ struct TMP105State {
21
!(keycode & 0x80));
35
int16_t limit[2];
36
int faults;
37
uint8_t alarm;
38
+ /*
39
+ * The TMP105 initially looks for a temperature rising above T_high;
40
+ * once this is detected, the condition it looks for next is the
41
+ * temperature falling below T_low. This flag is false when initially
42
+ * looking for T_high, true when looking for T_low.
43
+ */
44
+ bool detect_falling;
45
};
46
47
#endif
48
diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c
49
index XXXXXXX..XXXXXXX 100644
50
--- a/hw/misc/tmp105.c
51
+++ b/hw/misc/tmp105.c
52
@@ -XXX,XX +XXX,XX @@ static void tmp105_alarm_update(TMP105State *s)
53
return;
54
}
55
56
- if ((s->config >> 1) & 1) {                    /* TM */
57
- if (s->temperature >= s->limit[1])
58
- s->alarm = 1;
59
- else if (s->temperature < s->limit[0])
60
- s->alarm = 1;
61
+ if (s->config >> 1 & 1) {
62
+ /*
63
+ * TM == 1 : Interrupt mode. We signal Alert when the
64
+ * temperature rises above T_high, and expect the guest to clear
65
+ * it (eg by reading a device register).
66
+ */
67
+ if (s->detect_falling) {
68
+ if (s->temperature < s->limit[0]) {
69
+ s->alarm = 1;
70
+ s->detect_falling = false;
71
+ }
72
+ } else {
73
+ if (s->temperature >= s->limit[1]) {
74
+ s->alarm = 1;
75
+ s->detect_falling = true;
76
+ }
77
+ }
78
} else {
79
- if (s->temperature >= s->limit[1])
80
- s->alarm = 1;
81
- else if (s->temperature < s->limit[0])
82
- s->alarm = 0;
83
+ /*
84
+ * TM == 0 : Comparator mode. We signal Alert when the temperature
85
+ * rises above T_high, and stop signalling it when the temperature
86
+ * falls below T_low.
87
+ */
88
+ if (s->detect_falling) {
89
+ if (s->temperature < s->limit[0]) {
90
+ s->alarm = 0;
91
+ s->detect_falling = false;
92
+ }
93
+ } else {
94
+ if (s->temperature >= s->limit[1]) {
95
+ s->alarm = 1;
96
+ s->detect_falling = true;
97
+ }
98
+ }
99
}
100
101
tmp105_interrupt_update(s);
102
@@ -XXX,XX +XXX,XX @@ static int tmp105_post_load(void *opaque, int version_id)
103
return 0;
22
}
104
}
23
105
24
+/*
106
+static bool detect_falling_needed(void *opaque)
25
+ * Encapsulation of some GPIO line behaviour for the Palm board
107
+{
26
+ *
108
+ TMP105State *s = opaque;
27
+ * QEMU interface:
28
+ * + unnamed GPIO inputs 0..6: for the various miscellaneous input lines
29
+ */
30
+
109
+
31
+#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
110
+ /*
32
+#define PALM_MISC_GPIO(obj) \
111
+ * We only need to migrate the detect_falling bool if it's set;
33
+ OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO)
112
+ * for migration from older machines we assume that it is false
34
+
113
+ * (ie temperature is not out of range).
35
+typedef struct PalmMiscGPIOState {
114
+ */
36
+ SysBusDevice parent_obj;
115
+ return s->detect_falling;
37
+} PalmMiscGPIOState;
38
+
39
static void palmte_onoff_gpios(void *opaque, int line, int level)
40
{
41
switch (line) {
42
@@ -XXX,XX +XXX,XX @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
43
}
44
}
45
46
+static void palm_misc_gpio_init(Object *obj)
47
+{
48
+ DeviceState *dev = DEVICE(obj);
49
+
50
+ qdev_init_gpio_in(dev, palmte_onoff_gpios, 7);
51
+}
116
+}
52
+
117
+
53
+static const TypeInfo palm_misc_gpio_info = {
118
+static const VMStateDescription vmstate_tmp105_detect_falling = {
54
+ .name = TYPE_PALM_MISC_GPIO,
119
+ .name = "TMP105/detect-falling",
55
+ .parent = TYPE_SYS_BUS_DEVICE,
120
+ .version_id = 1,
56
+ .instance_size = sizeof(PalmMiscGPIOState),
121
+ .minimum_version_id = 1,
57
+ .instance_init = palm_misc_gpio_init,
122
+ .needed = detect_falling_needed,
58
+ /*
123
+ .fields = (VMStateField[]) {
59
+ * No class init required: device has no internal state so does not
124
+ VMSTATE_BOOL(detect_falling, TMP105State),
60
+ * need to set up reset or vmstate, and has no realize method.
125
+ VMSTATE_END_OF_LIST()
61
+ */
126
+ }
62
+};
127
+};
63
+
128
+
64
static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
129
static const VMStateDescription vmstate_tmp105 = {
65
{
130
.name = "TMP105",
66
- qemu_irq *misc_gpio;
131
.version_id = 0,
67
+ DeviceState *misc_gpio;
132
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tmp105 = {
68
+
133
VMSTATE_UINT8(alarm, TMP105State),
69
+ misc_gpio = sysbus_create_simple(TYPE_PALM_MISC_GPIO, -1, NULL);
134
VMSTATE_I2C_SLAVE(i2c, TMP105State),
70
135
VMSTATE_END_OF_LIST()
71
omap_mmc_handlers(cpu->mmc,
136
+ },
72
qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO),
137
+ .subsections = (const VMStateDescription*[]) {
73
qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio)
138
+ &vmstate_tmp105_detect_falling,
74
[PALMTE_MMC_SWITCH_GPIO]));
139
+ NULL
75
140
}
76
- misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
141
};
77
- qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
142
78
- qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
143
@@ -XXX,XX +XXX,XX @@ static void tmp105_reset(I2CSlave *i2c)
79
- qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
144
s->config = 0;
80
- qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
145
s->faults = tmp105_faultq[(s->config >> 3) & 3];
81
- qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
146
s->alarm = 0;
82
- omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
147
+ s->detect_falling = false;
83
- omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
148
84
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,
149
s->limit[0] = 0x4b00; /* T_LOW, 75 degrees C */
85
+ qdev_get_gpio_in(misc_gpio, 0));
150
s->limit[1] = 0x5000; /* T_HIGH, 80 degrees C */
86
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,
87
+ qdev_get_gpio_in(misc_gpio, 1));
88
+ qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2));
89
+ qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3));
90
+ qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4));
91
+ omap_mpuio_out_set(cpu->mpuio, 1, qdev_get_gpio_in(misc_gpio, 5));
92
+ omap_mpuio_out_set(cpu->mpuio, 3, qdev_get_gpio_in(misc_gpio, 6));
93
94
/* Reset some inputs to initial state. */
95
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
96
@@ -XXX,XX +XXX,XX @@ static void palmte_machine_init(MachineClass *mc)
97
}
98
99
DEFINE_MACHINE("cheetah", palmte_machine_init)
100
+
101
+static void palm_register_types(void)
102
+{
103
+ type_register_static(&palm_misc_gpio_info);
104
+}
105
+
106
+type_init(palm_register_types)
107
--
151
--
108
2.20.1
152
2.20.1
109
153
110
154
diff view generated by jsdifflib